35 #include <sys/ioctl.h>
36 #include <linux/i2c-dev.h>
37 #include <linux/videodev2.h>
38 #include <linux/v4l2-mediabus.h>
63 .dev_name =
"/dev/video0",
64 .subdev_name =
"/dev/v4l-subdev0",
65 .format = V4L2_PIX_FMT_UYVY,
66 .subdev_format = V4L2_MBUS_FMT_UYVY8_2X8,
71 .camera_intrinsics = {
86 #define MT9V117_PATCH_LINE_NUM 13
88 0xf0, 0x00, 0x72, 0xcf, 0xff, 0x00, 0x3e, 0xd0, 0x92, 0x00,
89 0x71, 0xcf, 0xff, 0xff, 0xf2, 0x18, 0xb1, 0x10, 0x92, 0x05,
90 0xb1, 0x11, 0x92, 0x04, 0xb1, 0x12, 0x70, 0xcf, 0xff, 0x00,
91 0x30, 0xc0, 0x90, 0x00, 0x7f, 0xe0, 0xb1, 0x13, 0x70, 0xcf,
92 0xff, 0xff, 0xe7, 0x1c, 0x88, 0x36, 0x09, 0x0f, 0x00, 0xb3
96 0xf0, 0x30, 0x69, 0x13, 0xe1, 0x80, 0xd8, 0x08, 0x20, 0xca,
97 0x03, 0x22, 0x71, 0xcf, 0xff, 0xff, 0xe5, 0x68, 0x91, 0x35,
98 0x22, 0x0a, 0x1f, 0x80, 0xff, 0xff, 0xf2, 0x18, 0x29, 0x05,
99 0x00, 0x3e, 0x12, 0x22, 0x11, 0x01, 0x21, 0x04, 0x0f, 0x81,
100 0x00, 0x00, 0xff, 0xf0, 0x21, 0x8c, 0xf0, 0x10, 0x1a, 0x22
104 0xf0, 0x60, 0x10, 0x44, 0x12, 0x20, 0x11, 0x02, 0xf7, 0x87,
105 0x22, 0x4f, 0x03, 0x83, 0x1a, 0x20, 0x10, 0xc4, 0xf0, 0x09,
106 0xba, 0xae, 0x7b, 0x50, 0x1a, 0x20, 0x10, 0x84, 0x21, 0x45,
107 0x01, 0xc1, 0x1a, 0x22, 0x10, 0x44, 0x70, 0xcf, 0xff, 0x00,
108 0x3e, 0xd0, 0xb0, 0x60, 0xb0, 0x25, 0x7e, 0xe0, 0x78, 0xe0
112 0xf0, 0x90, 0x71, 0xcf, 0xff, 0xff, 0xf2, 0x18, 0x91, 0x12,
113 0x72, 0xcf, 0xff, 0xff, 0xe7, 0x1c, 0x8a, 0x57, 0x20, 0x04,
114 0x0f, 0x80, 0x00, 0x00, 0xff, 0xf0, 0xe2, 0x80, 0x20, 0xc5,
115 0x01, 0x61, 0x20, 0xc5, 0x03, 0x22, 0xb1, 0x12, 0x71, 0xcf,
116 0xff, 0x00, 0x3e, 0xd0, 0xb1, 0x04, 0x7e, 0xe0, 0x78, 0xe0
120 0xf0, 0xc0, 0x70, 0xcf, 0xff, 0xff, 0xe7, 0x1c, 0x88, 0x57,
121 0x71, 0xcf, 0xff, 0xff, 0xf2, 0x18, 0x91, 0x13, 0xea, 0x84,
122 0xb8, 0xa9, 0x78, 0x10, 0xf0, 0x03, 0xb8, 0x89, 0xb8, 0x8c,
123 0xb1, 0x13, 0x71, 0xcf, 0xff, 0x00, 0x30, 0xc0, 0xb1, 0x00,
124 0x7e, 0xe0, 0xc0, 0xf1, 0x09, 0x1e, 0x03, 0xc0, 0xc1, 0xa1
128 0xf0, 0xf0, 0x75, 0x08, 0x76, 0x28, 0x77, 0x48, 0xc2, 0x40,
129 0xd8, 0x20, 0x71, 0xcf, 0x00, 0x03, 0x20, 0x67, 0xda, 0x02,
130 0x08, 0xae, 0x03, 0xa0, 0x73, 0xc9, 0x0e, 0x25, 0x13, 0xc0,
131 0x0b, 0x5e, 0x01, 0x60, 0xd8, 0x06, 0xff, 0xbc, 0x0c, 0xce,
132 0x01, 0x00, 0xd8, 0x00, 0xb8, 0x9e, 0x0e, 0x5a, 0x03, 0x20
136 0xf1, 0x20, 0xd9, 0x01, 0xd8, 0x00, 0xb8, 0x9e, 0x0e, 0xb6,
137 0x03, 0x20, 0xd9, 0x01, 0x8d, 0x14, 0x08, 0x17, 0x01, 0x91,
138 0x8d, 0x16, 0xe8, 0x07, 0x0b, 0x36, 0x01, 0x60, 0xd8, 0x07,
139 0x0b, 0x52, 0x01, 0x60, 0xd8, 0x11, 0x8d, 0x14, 0xe0, 0x87,
140 0xd8, 0x00, 0x20, 0xca, 0x02, 0x62, 0x00, 0xc9, 0x03, 0xe0
144 0xf1, 0x50, 0xc0, 0xa1, 0x78, 0xe0, 0xc0, 0xf1, 0x08, 0xb2,
145 0x03, 0xc0, 0x76, 0xcf, 0xff, 0xff, 0xe5, 0x40, 0x75, 0xcf,
146 0xff, 0xff, 0xe5, 0x68, 0x95, 0x17, 0x96, 0x40, 0x77, 0xcf,
147 0xff, 0xff, 0xe5, 0x42, 0x95, 0x38, 0x0a, 0x0d, 0x00, 0x01,
148 0x97, 0x40, 0x0a, 0x11, 0x00, 0x40, 0x0b, 0x0a, 0x01, 0x00
152 0xf1, 0x80, 0x95, 0x17, 0xb6, 0x00, 0x95, 0x18, 0xb7, 0x00,
153 0x76, 0xcf, 0xff, 0xff, 0xe5, 0x44, 0x96, 0x20, 0x95, 0x15,
154 0x08, 0x13, 0x00, 0x40, 0x0e, 0x1e, 0x01, 0x20, 0xd9, 0x00,
155 0x95, 0x15, 0xb6, 0x00, 0xff, 0xa1, 0x75, 0xcf, 0xff, 0xff,
156 0xe7, 0x1c, 0x77, 0xcf, 0xff, 0xff, 0xe5, 0x46, 0x97, 0x40
160 0xf1, 0xb0, 0x8d, 0x16, 0x76, 0xcf, 0xff, 0xff, 0xe5, 0x48,
161 0x8d, 0x37, 0x08, 0x0d, 0x00, 0x81, 0x96, 0x40, 0x09, 0x15,
162 0x00, 0x80, 0x0f, 0xd6, 0x01, 0x00, 0x8d, 0x16, 0xb7, 0x00,
163 0x8d, 0x17, 0xb6, 0x00, 0xff, 0xb0, 0xff, 0xbc, 0x00, 0x41,
164 0x03, 0xc0, 0xc0, 0xf1, 0x0d, 0x9e, 0x01, 0x00, 0xe8, 0x04
168 0xf1, 0xe0, 0xff, 0x88, 0xf0, 0x0a, 0x0d, 0x6a, 0x01, 0x00,
169 0x0d, 0x8e, 0x01, 0x00, 0xe8, 0x7e, 0xff, 0x85, 0x0d, 0x72,
170 0x01, 0x00, 0xff, 0x8c, 0xff, 0xa7, 0xff, 0xb2, 0xd8, 0x00,
171 0x73, 0xcf, 0xff, 0xff, 0xf2, 0x40, 0x23, 0x15, 0x00, 0x01,
172 0x81, 0x41, 0xe0, 0x02, 0x81, 0x20, 0x08, 0xf7, 0x81, 0x34
176 0xf2, 0x10, 0xa1, 0x40, 0xd8, 0x00, 0xc0, 0xd1, 0x7e, 0xe0,
177 0x53, 0x51, 0x30, 0x34, 0x20, 0x6f, 0x6e, 0x5f, 0x73, 0x74,
178 0x61, 0x72, 0x74, 0x5f, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d,
179 0x69, 0x6e, 0x67, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x0a,
180 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
184 0xf2, 0x40, 0xff, 0xff, 0xe8, 0x28, 0xff, 0xff, 0xf0, 0xe8,
185 0xff, 0xff, 0xe8, 0x08, 0xff, 0xff, 0xf1, 0x54
221 }
else if (
len == 2) {
224 }
else if (
len == 4) {
230 printf(
"[MT9V117] write_reg with incorrect length %d\r\n",
len);
315 for (
uint8_t retries = 100; retries > 0; retries--) {
323 printf(
"[MT9V117] Applying patch failed (No OK)\r\n");
329 printf(
"[MT9V117] Applying patch failed after 10 retries\r\n");
385 int gpio129 = open(
"/sys/class/gpio/gpio129/value", O_WRONLY | O_CREAT | O_TRUNC, 0666);
386 wc += write(gpio129,
"0", 1);
387 wc += write(gpio129,
"1", 1);
391 printf(
"[MT9V117] Couldn't write to GPIO 129\n");
396 int pwm9 = open(
"/sys/class/pwm/pwm_9/run", O_WRONLY | O_CREAT | O_TRUNC, 0666);
398 wc += write(pwm9,
"0", 1);
399 wc += write(pwm9,
"1", 1);
403 printf(
"[MT9V117] Couldn't write to PWM\n");
417 printf(
"[MT9V117] Didn't get correct response from CHIP_ID (expected: 0x%04X, got: 0x%04X)\r\n",
MT9V117_CHIP_ID_RESP,
455 for (
uint8_t retries = 100; retries > 0; retries--) {
463 printf(
"[MT9V117] Switching config failed (No OK)\r\n");
472 printf(
"[MT9V117] Could not switch to new config\r\n");
static const float offset[]
volatile uint8_t buf[I2C_BUF_LEN]
Transaction buffer With I2C_BUF_LEN number of bytes.
enum I2CTransactionStatus status
Transaction status.
uint8_t slave_addr
Slave address.
bool i2c_blocking_transceive(struct i2c_periph *p, struct i2c_transaction *t, uint8_t s_addr, uint8_t len_w, uint16_t len_r)
Submit a write/read transaction and wait for it to complete.
bool i2c_blocking_transmit(struct i2c_periph *p, struct i2c_transaction *t, uint8_t s_addr, uint8_t len)
Submit a write only transaction and wait for it to complete.
@ I2CTransDone
transaction set to done by user level
static uint8_t patch_line3[]
static uint8_t patch_line8[]
static uint8_t patch_line9[]
static const struct mt9v117_patch_t mt9v117_patch_lines[MT9V117_PATCH_LINE_NUM]
static uint8_t patch_line10[]
static uint8_t patch_line2[]
static uint8_t patch_line6[]
static uint8_t patch_line7[]
static uint8_t patch_line4[]
static uint8_t patch_line13[]
static void write_reg(struct mt9v117_t *mt, uint16_t addr, uint32_t val, uint16_t len)
Write multiple bytes to a single register.
static uint32_t read_reg(struct mt9v117_t *mt, uint16_t addr, uint16_t len)
Read multiple bytes from a register.
static uint8_t patch_line12[]
void mt9v117_init(struct mt9v117_t *mt)
Initialisation of the Aptina MT9V117 CMOS sensor (1/6 inch VGA, bottom camera)
static void mt9v117_config(struct mt9v117_t *mt)
static uint8_t patch_line5[]
static uint8_t patch_line11[]
static void write_var(struct mt9v117_t *mt, uint16_t var, uint16_t offset, uint32_t val, uint16_t len)
static uint8_t patch_line1[]
struct video_config_t bottom_camera
static void mt9v117_write_patch(struct mt9v117_t *mt)
#define MT9V117_PATCH_LINE_NUM
static uint32_t read_var(struct mt9v117_t *mt, uint16_t var, uint16_t offset, uint16_t len)
Initialization and configuration of the MT9V117 CMOS Chip.
#define MT9V117_TARGET_FPS
struct i2c_transaction i2c_trans
I2C transaction for comminication with CMOS chip.
#define MT9V117_TARGET_LUMA
struct i2c_periph * i2c_periph
I2C peripheral used to communicate over.
#define MT9V117_LOW_LIGHT_VAR
#define MT9V117_CAM_SENSOR_CONTROL_READ_MODE_OFFSET
#define MT9V117_COMMAND_APPLY_PATCH
#define MT9V117_CAM_SENSOR_CFG_X_ADDR_END_OFFSET
#define MT9V117_PATCHLDR_PATCH_ID_OFFSET
#define MT9V117_AE_TRACK_JUMP_DIVISOR
#define MT9V117_CAM_OUTPUT_HEIGHT_OFFSET
#define MT9V117_AE_TRACK_VAR
#define MT9V117_PATCHLDR_LOADER_ADDRESS_OFFSET
#define MT9V117_CAM_STAT_AE_INITIAL_WINDOW_XEND_OFFSET
#define MT9V117_CAM_SENSOR_CFG_TARGET_FDZONE_60_OFFSET
#define MT9V117_CAM_OUTPUT_FORMAT_OFFSET
#define MT9V117_CAM_SENSOR_CFG_Y_ADDR_END_OFFSET
#define MT9V117_CAM_STAT_AE_INITIAL_WINDOW_YEND_OFFSET
#define MT9V117_LOGICAL_ADDRESS_ACCESS
#define MT9V117_COMMAND_SET_STATE
#define MT9V117_PATCHLDR_FIRMWARE_ID_OFFSET
#define MT9V117_CAM_STAT_AE_INITIAL_WINDOW_XSTART_OFFSET
#define MT9V117_CAM_LL_STOP_GAIN_METRIC_OFFSET
#define MT9V117_RESET_SOC_I2C
#define MT9V117_CAM_SENSOR_CFG_Y_ADDR_START_OFFSET
#define MT9V117_PATCHLDR_VAR
#define MT9V117_CHIP_ID
Request the chip ID.
#define MT9V117_CAM_AET_SKIP_FRAMES
#define MT9V117_CAM_SENSOR_CFG_X_ADDR_START_OFFSET
#define MT9V117_CAM_STAT_AE_INITIAL_WINDOW_YSTART_OFFSET
#define MT9V117_CAM_STAT_AWB_HG_WINDOW_YSTART_OFFSET
#define MT9V117_CHIP_ID_RESP
Should be the response to CHIP_ID.
#define MT9V117_ADDRESS
The i2c address of the chip.
#define MT9V117_CAM_CROP_WINDOW_YOFFSET_OFFSET
#define MT9V117_CAM_CROP_MODE_OFFSET
#define MT9V117_CAM_SENSOR_CFG_FRAME_LENGTH_LINES_OFFSET
#define MT9V117_AE_RULE_ALGO_AVERAGE
#define MT9V117_CAM_SENSOR_CFG_MAX_FDZONE_60_OFFSET
#define MT9V117_COMMAND_OK
#define MT9V117_CAM_STAT_AWB_HG_WINDOW_XEND_OFFSET
#define MT9V117_CAM_SENSOR_CONTROL_Y_SKIP_EN
#define MT9V117_AE_RULE_VAR
#define MT9V117_CAM_OUTPUT_FORMAT_BT656_ENABLE
#define MT9V117_PHYSICAL_ADDRESS_ACCESS
#define MT9V117_CAM_STAT_AWB_HG_WINDOW_YEND_OFFSET
#define MT9V117_CAM_LL_START_GAIN_METRIC_OFFSET
#define MT9V117_AWB_PIXEL_THRESHOLD_COUNT_OFFSET
#define MT9V117_SYSMGR_VAR
#define MT9V117_CAM_CROP_WINDOW_WIDTH_OFFSET
#define MT9V117_CAM_CROP_WINDOW_XOFFSET_OFFSET
#define MT9V117_AE_RULE_ALGO_OFFSET
#define MT9V117_RESET_MISC_CTRL
#define MT9V117_CAM_CTRL_VAR
#define MT9V117_ACCESS_CTL_STAT
#define MT9V117_CAM_OUTPUT_WIDTH_OFFSET
#define MT9V117_SYS_STATE_ENTER_CONFIG_CHANGE
#define MT9V117_SYSMGR_NEXT_STATE_OFFSET
#define MT9V117_CAM_STAT_AWB_HG_WINDOW_XSTART_OFFSET
#define MT9V117_CAM_SENSOR_CFG_CPIPE_LAST_ROW_OFFSET
#define MT9V117_CAM_CROP_WINDOW_HEIGHT_OFFSET
struct img_size_t output_size
Output image size.
unsigned short uint16_t
Typedef defining 16 bit unsigned short type.
unsigned int uint32_t
Typedef defining 32 bit unsigned int type.
unsigned char uint8_t
Typedef defining 8 bit unsigned char type.