Paparazzi UAS  v5.17_devel-10-ge0a23a5
Paparazzi is a free software Unmanned Aircraft System.
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Modules Pages
mt9v117.c
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2016 Freek van Tienen <freek.v.tienen@gmail.com>
3  *
4  * This file is part of Paparazzi.
5  *
6  * Paparazzi is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2, or (at your option)
9  * any later version.
10  *
11  * Paparazzi is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with paparazzi; see the file COPYING. If not, see
18  * <http://www.gnu.org/licenses/>.
19  *
20  */
21 
27 #include "std.h"
28 #include "mt9v117.h"
29 #include "mt9v117_regs.h"
31 
32 #include <stdio.h>
33 #include <unistd.h>
34 #include <fcntl.h>
35 #include <sys/ioctl.h>
36 #include <linux/i2c-dev.h>
37 #include <linux/videodev2.h>
38 #include <linux/v4l2-mediabus.h>
39 
40 #include "generated/airframe.h"
41 #ifdef BOARD_DISCO
42 #include "boards/disco.h"
43 #else
44 #include "boards/bebop.h"
45 #endif
46 
47 
48 /* Camera structure */
50  .output_size = {
51  .w = 240,
52  .h = 240
53  },
54  .sensor_size = {
55  .w = 320,
56  .h = 240,
57  },
58  .crop = {
59  .x = 40,
60  .y = 0,
61  .w = 240,
62  .h = 240
63  },
64  .dev_name = "/dev/video0",
65  .subdev_name = "/dev/v4l-subdev0",
66  .format = V4L2_PIX_FMT_UYVY,
67  .subdev_format = V4L2_MBUS_FMT_UYVY8_2X8,
68  .buf_cnt = 5,
69  .filters = 0,
70  .cv_listener = NULL,
71  .fps = MT9V117_TARGET_FPS,
72  .camera_intrinsics = {
73  .focal_x = MT9V117_FOCAL_X,
74  .focal_y = MT9V117_FOCAL_Y,
75  .center_x = MT9V117_CENTER_X,
76  .center_y = MT9V117_CENTER_Y,
77  .Dhane_k = MT9V117_DHANE_K
78  }
79 };
80 
81 struct mt9v117_t mt9v117 = {
82  .i2c_periph = &i2c0
83 };
84 
85 /* Patch lines */
86 //I2C_BUF_LEN must be higher then size of these patch lines
87 #define MT9V117_PATCH_LINE_NUM 13
88 static uint8_t patch_line1[] = {
89  0xf0, 0x00, 0x72, 0xcf, 0xff, 0x00, 0x3e, 0xd0, 0x92, 0x00,
90  0x71, 0xcf, 0xff, 0xff, 0xf2, 0x18, 0xb1, 0x10, 0x92, 0x05,
91  0xb1, 0x11, 0x92, 0x04, 0xb1, 0x12, 0x70, 0xcf, 0xff, 0x00,
92  0x30, 0xc0, 0x90, 0x00, 0x7f, 0xe0, 0xb1, 0x13, 0x70, 0xcf,
93  0xff, 0xff, 0xe7, 0x1c, 0x88, 0x36, 0x09, 0x0f, 0x00, 0xb3
94 };
95 
96 static uint8_t patch_line2[] = {
97  0xf0, 0x30, 0x69, 0x13, 0xe1, 0x80, 0xd8, 0x08, 0x20, 0xca,
98  0x03, 0x22, 0x71, 0xcf, 0xff, 0xff, 0xe5, 0x68, 0x91, 0x35,
99  0x22, 0x0a, 0x1f, 0x80, 0xff, 0xff, 0xf2, 0x18, 0x29, 0x05,
100  0x00, 0x3e, 0x12, 0x22, 0x11, 0x01, 0x21, 0x04, 0x0f, 0x81,
101  0x00, 0x00, 0xff, 0xf0, 0x21, 0x8c, 0xf0, 0x10, 0x1a, 0x22
102 };
103 
104 static uint8_t patch_line3[] = {
105  0xf0, 0x60, 0x10, 0x44, 0x12, 0x20, 0x11, 0x02, 0xf7, 0x87,
106  0x22, 0x4f, 0x03, 0x83, 0x1a, 0x20, 0x10, 0xc4, 0xf0, 0x09,
107  0xba, 0xae, 0x7b, 0x50, 0x1a, 0x20, 0x10, 0x84, 0x21, 0x45,
108  0x01, 0xc1, 0x1a, 0x22, 0x10, 0x44, 0x70, 0xcf, 0xff, 0x00,
109  0x3e, 0xd0, 0xb0, 0x60, 0xb0, 0x25, 0x7e, 0xe0, 0x78, 0xe0
110 };
111 
112 static uint8_t patch_line4[] = {
113  0xf0, 0x90, 0x71, 0xcf, 0xff, 0xff, 0xf2, 0x18, 0x91, 0x12,
114  0x72, 0xcf, 0xff, 0xff, 0xe7, 0x1c, 0x8a, 0x57, 0x20, 0x04,
115  0x0f, 0x80, 0x00, 0x00, 0xff, 0xf0, 0xe2, 0x80, 0x20, 0xc5,
116  0x01, 0x61, 0x20, 0xc5, 0x03, 0x22, 0xb1, 0x12, 0x71, 0xcf,
117  0xff, 0x00, 0x3e, 0xd0, 0xb1, 0x04, 0x7e, 0xe0, 0x78, 0xe0
118 };
119 
120 static uint8_t patch_line5[] = {
121  0xf0, 0xc0, 0x70, 0xcf, 0xff, 0xff, 0xe7, 0x1c, 0x88, 0x57,
122  0x71, 0xcf, 0xff, 0xff, 0xf2, 0x18, 0x91, 0x13, 0xea, 0x84,
123  0xb8, 0xa9, 0x78, 0x10, 0xf0, 0x03, 0xb8, 0x89, 0xb8, 0x8c,
124  0xb1, 0x13, 0x71, 0xcf, 0xff, 0x00, 0x30, 0xc0, 0xb1, 0x00,
125  0x7e, 0xe0, 0xc0, 0xf1, 0x09, 0x1e, 0x03, 0xc0, 0xc1, 0xa1
126 };
127 
128 static uint8_t patch_line6[] = {
129  0xf0, 0xf0, 0x75, 0x08, 0x76, 0x28, 0x77, 0x48, 0xc2, 0x40,
130  0xd8, 0x20, 0x71, 0xcf, 0x00, 0x03, 0x20, 0x67, 0xda, 0x02,
131  0x08, 0xae, 0x03, 0xa0, 0x73, 0xc9, 0x0e, 0x25, 0x13, 0xc0,
132  0x0b, 0x5e, 0x01, 0x60, 0xd8, 0x06, 0xff, 0xbc, 0x0c, 0xce,
133  0x01, 0x00, 0xd8, 0x00, 0xb8, 0x9e, 0x0e, 0x5a, 0x03, 0x20
134 };
135 
136 static uint8_t patch_line7[] = {
137  0xf1, 0x20, 0xd9, 0x01, 0xd8, 0x00, 0xb8, 0x9e, 0x0e, 0xb6,
138  0x03, 0x20, 0xd9, 0x01, 0x8d, 0x14, 0x08, 0x17, 0x01, 0x91,
139  0x8d, 0x16, 0xe8, 0x07, 0x0b, 0x36, 0x01, 0x60, 0xd8, 0x07,
140  0x0b, 0x52, 0x01, 0x60, 0xd8, 0x11, 0x8d, 0x14, 0xe0, 0x87,
141  0xd8, 0x00, 0x20, 0xca, 0x02, 0x62, 0x00, 0xc9, 0x03, 0xe0
142 };
143 
144 static uint8_t patch_line8[] = {
145  0xf1, 0x50, 0xc0, 0xa1, 0x78, 0xe0, 0xc0, 0xf1, 0x08, 0xb2,
146  0x03, 0xc0, 0x76, 0xcf, 0xff, 0xff, 0xe5, 0x40, 0x75, 0xcf,
147  0xff, 0xff, 0xe5, 0x68, 0x95, 0x17, 0x96, 0x40, 0x77, 0xcf,
148  0xff, 0xff, 0xe5, 0x42, 0x95, 0x38, 0x0a, 0x0d, 0x00, 0x01,
149  0x97, 0x40, 0x0a, 0x11, 0x00, 0x40, 0x0b, 0x0a, 0x01, 0x00
150 };
151 
152 static uint8_t patch_line9[] = {
153  0xf1, 0x80, 0x95, 0x17, 0xb6, 0x00, 0x95, 0x18, 0xb7, 0x00,
154  0x76, 0xcf, 0xff, 0xff, 0xe5, 0x44, 0x96, 0x20, 0x95, 0x15,
155  0x08, 0x13, 0x00, 0x40, 0x0e, 0x1e, 0x01, 0x20, 0xd9, 0x00,
156  0x95, 0x15, 0xb6, 0x00, 0xff, 0xa1, 0x75, 0xcf, 0xff, 0xff,
157  0xe7, 0x1c, 0x77, 0xcf, 0xff, 0xff, 0xe5, 0x46, 0x97, 0x40
158 };
159 
160 static uint8_t patch_line10[] = {
161  0xf1, 0xb0, 0x8d, 0x16, 0x76, 0xcf, 0xff, 0xff, 0xe5, 0x48,
162  0x8d, 0x37, 0x08, 0x0d, 0x00, 0x81, 0x96, 0x40, 0x09, 0x15,
163  0x00, 0x80, 0x0f, 0xd6, 0x01, 0x00, 0x8d, 0x16, 0xb7, 0x00,
164  0x8d, 0x17, 0xb6, 0x00, 0xff, 0xb0, 0xff, 0xbc, 0x00, 0x41,
165  0x03, 0xc0, 0xc0, 0xf1, 0x0d, 0x9e, 0x01, 0x00, 0xe8, 0x04
166 };
167 
168 static uint8_t patch_line11[] = {
169  0xf1, 0xe0, 0xff, 0x88, 0xf0, 0x0a, 0x0d, 0x6a, 0x01, 0x00,
170  0x0d, 0x8e, 0x01, 0x00, 0xe8, 0x7e, 0xff, 0x85, 0x0d, 0x72,
171  0x01, 0x00, 0xff, 0x8c, 0xff, 0xa7, 0xff, 0xb2, 0xd8, 0x00,
172  0x73, 0xcf, 0xff, 0xff, 0xf2, 0x40, 0x23, 0x15, 0x00, 0x01,
173  0x81, 0x41, 0xe0, 0x02, 0x81, 0x20, 0x08, 0xf7, 0x81, 0x34
174 };
175 
176 static uint8_t patch_line12[] = {
177  0xf2, 0x10, 0xa1, 0x40, 0xd8, 0x00, 0xc0, 0xd1, 0x7e, 0xe0,
178  0x53, 0x51, 0x30, 0x34, 0x20, 0x6f, 0x6e, 0x5f, 0x73, 0x74,
179  0x61, 0x72, 0x74, 0x5f, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d,
180  0x69, 0x6e, 0x67, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x0a,
181  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
182 };
183 
184 static uint8_t patch_line13[] = {
185  0xf2, 0x40, 0xff, 0xff, 0xe8, 0x28, 0xff, 0xff, 0xf0, 0xe8,
186  0xff, 0xff, 0xe8, 0x08, 0xff, 0xff, 0xf1, 0x54
187 };
188 
189 /* Patch lines structure */
193 };
194 
196  {patch_line1, sizeof(patch_line1)},
197  {patch_line2, sizeof(patch_line2)},
198  {patch_line3, sizeof(patch_line3)},
199  {patch_line4, sizeof(patch_line4)},
200  {patch_line5, sizeof(patch_line5)},
201  {patch_line6, sizeof(patch_line6)},
202  {patch_line7, sizeof(patch_line7)},
203  {patch_line8, sizeof(patch_line8)},
204  {patch_line9, sizeof(patch_line9)},
205  {patch_line10, sizeof(patch_line10)},
206  {patch_line11, sizeof(patch_line11)},
207  {patch_line12, sizeof(patch_line12)},
208  {patch_line13, sizeof(patch_line13)}
209 };
210 
214 static void write_reg(struct mt9v117_t *mt, uint16_t addr, uint32_t val, uint16_t len)
215 {
216  mt->i2c_trans.buf[0] = addr >> 8;
217  mt->i2c_trans.buf[1] = addr & 0xFF;
218 
219  // Fix sigdness based on length
220  if (len == 1) {
221  mt->i2c_trans.buf[2] = val & 0xFF;
222  } else if (len == 2) {
223  mt->i2c_trans.buf[2] = (val >> 8) & 0xFF;
224  mt->i2c_trans.buf[3] = val & 0xFF;
225  } else if (len == 4) {
226  mt->i2c_trans.buf[2] = (val >> 24) & 0xFF;
227  mt->i2c_trans.buf[3] = (val >> 16) & 0xFF;
228  mt->i2c_trans.buf[4] = (val >> 8) & 0xFF;
229  mt->i2c_trans.buf[5] = val & 0xFF;
230  } else {
231  printf("[MT9V117] write_reg with incorrect length %d\r\n", len);
232  }
233 
234  // Transmit the buffer
236 }
237 
241 static uint32_t read_reg(struct mt9v117_t *mt, uint16_t addr, uint16_t len)
242 {
243  uint32_t ret = 0;
244  mt->i2c_trans.buf[0] = addr >> 8;
245  mt->i2c_trans.buf[1] = addr & 0xFF;
246 
247  // Transmit the buffer and receive back
249 
250  /* Fix sigdness */
251  for (uint8_t i = 0; i < len; i++) {
252  ret |= mt->i2c_trans.buf[len - i - 1] << (8 * i);
253  }
254  return ret;
255 }
256 
257 /* Write a byte to a var */
259 {
260  uint16_t addr = 0x8000 | (var << 10) | offset;
261  write_reg(mt, addr, val, len);
262 }
263 
264 /* Read a byte from a var */
266 {
267  uint16_t addr = 0x8000 | (var << 10) | offset;
268  return read_reg(mt, addr, len);
269 }
270 
271 static inline void mt9v117_write_patch(struct mt9v117_t *mt)
272 {
273  /* Errata item 2 */
274  write_reg(mt, 0x301a, 0x10d0, 2);
275  write_reg(mt, 0x31c0, 0x1404, 2);
276  write_reg(mt, 0x3ed8, 0x879c, 2);
277  write_reg(mt, 0x3042, 0x20e1, 2);
278  write_reg(mt, 0x30d4, 0x8020, 2);
279  write_reg(mt, 0x30c0, 0x0026, 2);
280  write_reg(mt, 0x301a, 0x10d4, 2);
281 
282  /* Errata item 6 */
283  write_var(mt, MT9V117_AE_TRACK_VAR, 0x0002, 0x00d3, 2);
284  write_var(mt, MT9V117_CAM_CTRL_VAR, 0x0078, 0x00a0, 2);
285  write_var(mt, MT9V117_CAM_CTRL_VAR, 0x0076, 0x0140, 2);
286 
287  /* Errata item 8 */
288  write_var(mt, MT9V117_LOW_LIGHT_VAR, 0x0004, 0x00fc, 2);
289  write_var(mt, MT9V117_LOW_LIGHT_VAR, 0x0038, 0x007f, 2);
290  write_var(mt, MT9V117_LOW_LIGHT_VAR, 0x003a, 0x007f, 2);
291  write_var(mt, MT9V117_LOW_LIGHT_VAR, 0x003c, 0x007f, 2);
292  write_var(mt, MT9V117_LOW_LIGHT_VAR, 0x0004, 0x00f4, 2);
293 
294  /* Patch 0403; Critical; Sensor optimization */
295  write_reg(mt, MT9V117_ACCESS_CTL_STAT, 0x0001, 2);
297 
298  /* Write patch */
299  for (uint8_t i = 0; i < MT9V117_PATCH_LINE_NUM; ++i) {
300  // Copy buffer
301  for (uint8_t j = 0; j < mt9v117_patch_lines[i].len; ++j) {
302  mt->i2c_trans.buf[j] = mt9v117_patch_lines[i].data[j];
303  }
304 
305  // Transmit the buffer
306  i2c_blocking_transmit(mt->i2c_periph, &mt->i2c_trans, mt->i2c_trans.slave_addr, mt9v117_patch_lines[i].len);
307  }
308 
314 
315  /* Wait for command OK */
316  for (uint8_t retries = 100; retries > 0; retries--) {
317  /* Wait 10ms */
318  usleep(10000);
319 
320  /* Check the command */
321  uint16_t cmd = read_reg(mt, MT9V117_COMMAND, 2);
322  if ((cmd & MT9V117_COMMAND_APPLY_PATCH) == 0) {
323  if ((cmd & MT9V117_COMMAND_OK) == 0) {
324  printf("[MT9V117] Applying patch failed (No OK)\r\n");
325  }
326  return;
327  }
328  }
329 
330  printf("[MT9V117] Applying patch failed after 10 retries\r\n");
331 }
332 
333 /* Configure the sensor */
334 static inline void mt9v117_config(struct mt9v117_t *mt)
335 {
346 
349 
352 
353  /* Set gain metric for 111.2 fps
354  * The final fps depends on the input clock
355  * (89.2fps on bebop) so a modification may be needed here */
358 
359  /* set crop window */
365 
366  /* Enable auto-stats mode */
375 }
376 
381 void mt9v117_init(struct mt9v117_t *mt)
382 {
383  /* bytes written to gpios/pwm */
384  int wc = 0;
385  /* Reset the device */
386  int gpio129 = open("/sys/class/gpio/gpio129/value", O_WRONLY | O_CREAT | O_TRUNC, 0666);
387  wc += write(gpio129, "0", 1);
388  wc += write(gpio129, "1", 1);
389  close(gpio129);
390 
391  if (wc != 2) {
392  printf("[MT9V117] Couldn't write to GPIO 129\n");
393  }
394 
395  /* Start PWM 9 (Which probably is the clock of the MT9V117) */
396  //#define BEBOP_CAMV_PWM_FREQ 43333333
397  int pwm9 = open("/sys/class/pwm/pwm_9/run", O_WRONLY | O_CREAT | O_TRUNC, 0666);
398  wc = 0;
399  wc += write(pwm9, "0", 1);
400  wc += write(pwm9, "1", 1);
401  close(pwm9);
402 
403  if (wc != 2) {
404  printf("[MT9V117] Couldn't write to PWM\n");
405  }
406 
407  //TODO: Make PWM and GPIO generic
408 
409  /* Wait 50ms */
410  usleep(50000);
411 
412  /* Setup i2c transaction */
414 
415  /* See if the device is there and correct */
416  uint16_t chip_id = read_reg(mt, MT9V117_CHIP_ID, 2);
417  if (chip_id != MT9V117_CHIP_ID_RESP) {
418  printf("[MT9V117] Didn't get correct response from CHIP_ID (expected: 0x%04X, got: 0x%04X)\r\n", MT9V117_CHIP_ID_RESP,
419  chip_id);
420  return;
421  }
422 
423  /* Reset the device with software */
426 
427  /* Wait 50ms */
428  usleep(50000);
429 
430  /* Apply MT9V117 software patch */
432 
433  /* Set basic settings */
436 
437  /* Set pixclk pad slew to 6 and data out pad slew to 1 */
438  write_reg(mt, MT9V117_PAD_SLEW, read_reg(mt, MT9V117_PAD_SLEW, 2) | 0x0600 | 0x0001, 2);
439 
440  /* Configure the MT9V117 sensor */
441  mt9v117_config(mt);
442 
443  /* Enable ITU656 */
447 
448  /* Set autoexposure luma */
450 
451  /* Apply the configuration */
454 
455  /* Wait for command OK */
456  for (uint8_t retries = 100; retries > 0; retries--) {
457  /* Wait 10ms */
458  usleep(10000);
459 
460  /* Check the command */
461  uint16_t cmd = read_reg(mt, MT9V117_COMMAND, 2);
462  if ((cmd & MT9V117_COMMAND_SET_STATE) == 0) {
463  if ((cmd & MT9V117_COMMAND_OK) == 0) {
464  printf("[MT9V117] Switching config failed (No OK)\r\n");
465  }
466 
467  // Successfully configured!
468  //printf("[MT9V117] Switching config OK\r\n");
469  return;
470  }
471  }
472 
473  printf("[MT9V117] Could not switch to new config\r\n");
474 }
struct video_config_t bottom_camera
Definition: mt9v117.c:49
#define MT9V117_CAM_SENSOR_CFG_X_ADDR_END_OFFSET
Definition: mt9v117_regs.h:38
unsigned short uint16_t
Definition: types.h:16
static uint8_t patch_line11[]
Definition: mt9v117.c:168
static uint8_t patch_line7[]
Definition: mt9v117.c:136
#define MT9V117_CAM_STAT_AWB_HG_WINDOW_XSTART_OFFSET
Definition: mt9v117_regs.h:74
#define MT9V117_CAM_SENSOR_CFG_X_ADDR_START_OFFSET
Definition: mt9v117_regs.h:36
#define MT9V117_CAM_STAT_AE_INITIAL_WINDOW_XEND_OFFSET
Definition: mt9v117_regs.h:80
#define MT9V117_CAM_STAT_AE_INITIAL_WINDOW_YEND_OFFSET
Definition: mt9v117_regs.h:81
#define MT9V117_AE_RULE_ALGO_OFFSET
Definition: mt9v117_regs.h:27
#define MT9V117_LOGICAL_ADDRESS_ACCESS
Definition: mt9v117_regs.h:20
#define MT9V117_ADDRESS
The i2c address of the chip.
Definition: mt9v117_regs.h:4
#define MT9V117_CAM_LL_START_GAIN_METRIC_OFFSET
Definition: mt9v117_regs.h:82
volatile uint8_t buf[I2C_BUF_LEN]
Transaction buffer With I2C_BUF_LEN number of bytes.
Definition: i2c.h:122
#define MT9V117_TARGET_FPS
Definition: mt9v117.h:35
#define MT9V117_CAM_OUTPUT_FORMAT_BT656_ENABLE
Definition: mt9v117_regs.h:70
#define MT9V117_CAM_STAT_AE_INITIAL_WINDOW_XSTART_OFFSET
Definition: mt9v117_regs.h:78
#define MT9V117_CAM_LL_STOP_GAIN_METRIC_OFFSET
Definition: mt9v117_regs.h:83
struct img_size_t output_size
Output image size.
Definition: video_device.h:56
#define MT9V117_AWB_VAR
Definition: mt9v117_regs.h:31
static void mt9v117_write_patch(struct mt9v117_t *mt)
Definition: mt9v117.c:271
#define MT9V117_AE_LUMA
Definition: mt9v117_regs.h:23
#define MT9V117_FOCAL_Y
Definition: mt9v117.h:43
Initialization and configuration of the MT9V117 CMOS Chip.
#define MT9V117_SYSMGR_NEXT_STATE_OFFSET
Definition: mt9v117_regs.h:85
#define MT9V117_COMMAND
Definition: mt9v117_regs.h:12
#define MT9V117_COMMAND_SET_STATE
Definition: mt9v117_regs.h:16
#define MT9V117_CAM_STAT_AWB_HG_WINDOW_XEND_OFFSET
Definition: mt9v117_regs.h:76
#define MT9V117_CAM_OUTPUT_FORMAT_OFFSET
Definition: mt9v117_regs.h:61
#define MT9V117_CAM_AET_SKIP_FRAMES
Definition: mt9v117_regs.h:22
#define MT9V117_PHYSICAL_ADDRESS_ACCESS
Definition: mt9v117_regs.h:19
#define MT9V117_PATCHLDR_LOADER_ADDRESS_OFFSET
Definition: mt9v117_regs.h:95
#define MT9V117_COMMAND_OK
Definition: mt9v117_regs.h:13
uint16_t len
Definition: mt9v117.c:192
static uint32_t read_reg(struct mt9v117_t *mt, uint16_t addr, uint16_t len)
Read multiple bytes from a register.
Definition: mt9v117.c:241
#define MT9V117_COMMAND_APPLY_PATCH
Definition: mt9v117_regs.h:17
static const struct mt9v117_patch_t mt9v117_patch_lines[MT9V117_PATCH_LINE_NUM]
Definition: mt9v117.c:195
static uint8_t patch_line3[]
Definition: mt9v117.c:104
#define MT9V117_CHIP_ID_RESP
Should be the response to CHIP_ID.
Definition: mt9v117_regs.h:8
#define MT9V117_CAM_SENSOR_CFG_Y_ADDR_END_OFFSET
Definition: mt9v117_regs.h:37
static void write_var(struct mt9v117_t *mt, uint16_t var, uint16_t offset, uint32_t val, uint16_t len)
Definition: mt9v117.c:258
struct mt9v117_t mt9v117
Definition: mt9v117.c:81
#define MT9V117_SYS_STATE_ENTER_CONFIG_CHANGE
Definition: mt9v117_regs.h:86
static uint8_t patch_line1[]
Definition: mt9v117.c:88
static void write_reg(struct mt9v117_t *mt, uint16_t addr, uint32_t val, uint16_t len)
Write multiple bytes to a single register.
Definition: mt9v117.c:214
#define MT9V117_CHIP_ID
Request the chip ID.
Definition: mt9v117_regs.h:7
#define MT9V117_AE_RULE_ALGO_AVERAGE
Definition: mt9v117_regs.h:28
bool i2c_blocking_transceive(struct i2c_periph *p, struct i2c_transaction *t, uint8_t s_addr, uint8_t len_w, uint16_t len_r)
Submit a write/read transaction and wait for it to complete.
Definition: i2c.c:403
#define MT9V117_ACCESS_CTL_STAT
Definition: mt9v117_regs.h:18
static uint8_t patch_line9[]
Definition: mt9v117.c:152
#define MT9V117_LOW_LIGHT_VAR
Definition: mt9v117_regs.h:33
#define MT9V117_AE_RULE_VAR
Definition: mt9v117_regs.h:26
static const float offset[]
#define MT9V117_CAM_SENSOR_CFG_Y_ADDR_START_OFFSET
Definition: mt9v117_regs.h:35
#define MT9V117_TARGET_LUMA
Definition: mt9v117.h:55
transaction set to done by user level
Definition: i2c.h:59
#define MT9V117_PATCHLDR_FIRMWARE_ID_OFFSET
Definition: mt9v117_regs.h:97
uint16_t val[TCOUPLE_NB]
#define MT9V117_CAM_SENSOR_CONTROL_Y_SKIP_EN
Definition: mt9v117_regs.h:48
#define MT9V117_CAM_OUTPUT_WIDTH_OFFSET
Definition: mt9v117_regs.h:59
#define MT9V117_PATCHLDR_VAR
Definition: mt9v117_regs.h:94
unsigned long uint32_t
Definition: types.h:18
#define MT9V117_SYSMGR_VAR
Definition: mt9v117_regs.h:84
#define MT9V117_RESET_MISC_CTRL
Definition: mt9v117_regs.h:9
#define MT9V117_DHANE_K
Definition: mt9v117.h:52
static uint8_t patch_line6[]
Definition: mt9v117.c:128
#define MT9V117_CAM_CROP_WINDOW_XOFFSET_OFFSET
Definition: mt9v117_regs.h:54
static uint8_t patch_line8[]
Definition: mt9v117.c:144
#define MT9V117_PAD_SLEW
Definition: mt9v117_regs.h:11
#define MT9V117_CAM_OUTPUT_HEIGHT_OFFSET
Definition: mt9v117_regs.h:60
void mt9v117_init(struct mt9v117_t *mt)
Initialisation of the Aptina MT9V117 CMOS sensor (1/6 inch VGA, bottom camera)
Definition: mt9v117.c:381
#define MT9V117_CAM_CROP_WINDOW_WIDTH_OFFSET
Definition: mt9v117_regs.h:56
enum I2CTransactionStatus status
Transaction status.
Definition: i2c.h:126
static uint8_t patch_line4[]
Definition: mt9v117.c:112
#define MT9V117_PATCH_LINE_NUM
Definition: mt9v117.c:87
#define MT9V117_CAM_STAT_AE_INITIAL_WINDOW_YSTART_OFFSET
Definition: mt9v117_regs.h:79
#define MT9V117_CAM_CROP_WINDOW_YOFFSET_OFFSET
Definition: mt9v117_regs.h:55
static uint8_t patch_line12[]
Definition: mt9v117.c:176
uint8_t slave_addr
Slave address.
Definition: i2c.h:104
#define MT9V117_FOCAL_X
Definition: mt9v117.h:40
static uint8_t patch_line2[]
Definition: mt9v117.c:96
#define MT9V117_CAM_SENSOR_CFG_CPIPE_LAST_ROW_OFFSET
Definition: mt9v117_regs.h:40
unsigned char uint8_t
Definition: types.h:14
#define MT9V117_CAM_STAT_AWB_HG_WINDOW_YSTART_OFFSET
Definition: mt9v117_regs.h:75
static uint8_t patch_line13[]
Definition: mt9v117.c:184
static uint8_t patch_line10[]
Definition: mt9v117.c:160
#define MT9V117_CAM_CROP_MODE_OFFSET
Definition: mt9v117_regs.h:58
#define MT9V117_CENTER_Y
Definition: mt9v117.h:49
static uint8_t patch_line5[]
Definition: mt9v117.c:120
#define MT9V117_AE_TRACK_JUMP_DIVISOR
Definition: mt9v117_regs.h:21
#define MT9V117_CAM_SENSOR_CFG_MAX_FDZONE_60_OFFSET
Definition: mt9v117_regs.h:43
#define MT9V117_AE_TRACK_VAR
Definition: mt9v117_regs.h:30
#define MT9V117_CAM_SENSOR_CONTROL_READ_MODE_OFFSET
Definition: mt9v117_regs.h:47
#define MT9V117_CAM_SENSOR_CFG_FRAME_LENGTH_LINES_OFFSET
Definition: mt9v117_regs.h:39
#define MT9V117_CAM_CROP_WINDOW_HEIGHT_OFFSET
Definition: mt9v117_regs.h:57
#define MT9V117_CAM_STAT_AWB_HG_WINDOW_YEND_OFFSET
Definition: mt9v117_regs.h:77
#define MT9V117_CAM_SENSOR_CFG_TARGET_FDZONE_60_OFFSET
Definition: mt9v117_regs.h:45
struct i2c_periph * i2c_periph
I2C peripheral used to communicate over.
Definition: mt9v117.h:59
uint16_t w
The width.
Definition: image.h:75
static uint32_t read_var(struct mt9v117_t *mt, uint16_t var, uint16_t offset, uint16_t len)
Definition: mt9v117.c:265
uint8_t * data
Definition: mt9v117.c:191
#define MT9V117_AWB_PIXEL_THRESHOLD_COUNT_OFFSET
Definition: mt9v117_regs.h:32
static void mt9v117_config(struct mt9v117_t *mt)
Definition: mt9v117.c:334
#define MT9V117_RESET_SOC_I2C
Definition: mt9v117_regs.h:10
#define MT9V117_CAM_CTRL_VAR
Definition: mt9v117_regs.h:34
V4L2 device settings.
Definition: video_device.h:55
bool i2c_blocking_transmit(struct i2c_periph *p, struct i2c_transaction *t, uint8_t s_addr, uint8_t len)
Submit a write only transaction and wait for it to complete.
Definition: i2c.c:359
#define MT9V117_CENTER_X
Definition: mt9v117.h:46
#define MT9V117_PATCHLDR_PATCH_ID_OFFSET
Definition: mt9v117_regs.h:96
struct i2c_transaction i2c_trans
I2C transaction for comminication with CMOS chip.
Definition: mt9v117.h:60