34 #include "pprzlink/messages.h"
121 for (i = 0; i < 6; i++) {
222 for (i = 0; i < 16; i++) {
293 for (i = 0; i < length; i++) {
332 const uint8_t data_multi[][2] = {
357 for (i = 0; i < length; i++) {
358 cyrf->
buffer[i * 2] = data[i][0];
359 cyrf->
buffer[i * 2 + 1] = data[i][1];
386 cyrf->
buffer[0] = crc_seed & 0xFF;
387 cyrf->
buffer[1] = (crc_seed >> 8) & 0xFF;
390 for (i = 0; i < 8; i++) {
391 cyrf->
buffer[i + 2] = sop_code[i];
395 for (i = 0; i < 16; i++) {
396 cyrf->
buffer[i + 10] = data_code[i];
446 for (i = 0; i < length; i++) {
447 cyrf->
buffer[i + 1] = data[i];
void gpio_setup_output(ioportid_t port, uint16_t gpios)
Setup one or more pins of the given GPIO port as outputs.
static void gpio_set(ioportid_t port, uint16_t pin)
Set a gpio output to high level.
static void gpio_clear(ioportid_t port, uint16_t pin)
Clear a gpio output to low level.
void sys_time_usleep(uint32_t us)
sys_time_usleep(uint32_t us)
void cyrf6936_event(struct Cyrf6936 *cyrf)
The on event call for the CYRF6936 chip.
void cyrf6936_init(struct Cyrf6936 *cyrf, struct spi_periph *spi_p, const uint8_t slave_idx, const uint32_t rst_port, const uint16_t rst_pin)
Initializing the cyrf chip.
bool cyrf6936_multi_write(struct Cyrf6936 *cyrf, const uint8_t data[][2], const uint8_t length)
Write to multiple registers one byte.
bool cyrf6936_write_chan_sop_data_crc(struct Cyrf6936 *cyrf, const uint8_t chan, const uint8_t sop_code[], const uint8_t data_code[], const uint16_t crc_seed)
Set the channel, SOP code, DATA code and the CRC seed.
bool cyrf6936_write(struct Cyrf6936 *cyrf, const uint8_t addr, const uint8_t data)
Write to one register.
static bool cyrf6936_write_register(struct Cyrf6936 *cyrf, const uint8_t addr, const uint8_t data)
Write a byte to a register.
bool cyrf6936_read_rx_irq_status_packet(struct Cyrf6936 *cyrf)
Read the RX IRQ status register, the rx status register and the rx packet.
bool cyrf6936_send(struct Cyrf6936 *cyrf, const uint8_t data[], const uint8_t length)
Send a packet with a certain length.
static bool cyrf6936_read_register(struct Cyrf6936 *cyrf, const uint8_t addr)
Read a byte from a register.
static bool cyrf6936_write_block(struct Cyrf6936 *cyrf, const uint8_t addr, const uint8_t data[], const uint8_t length)
Write multiple bytes to a register.
static bool cyrf6936_read_block(struct Cyrf6936 *cyrf, const uint8_t addr, const uint8_t length)
Read multiple bytes from a register.
Driver for the cyrf6936 2.4GHz radio chip.
struct spi_transaction spi_t
The SPI transaction used for the writing and reading of registers.
@ CYRF6936_DATA_CODE
The chip is writing a data code.
@ CYRF6936_IDLE
The chip is idle and can be used.
@ CYRF6936_GET_MFG_ID
The chip is busy with getting the manufacturer ID.
@ CYRF6936_MULTIWRITE
The chip is writing multiple registers.
@ CYRF6936_RX_IRQ_STATUS_PACKET
The chip is getting the receive irq status, receive status and the receive packet.
@ CYRF6936_UNINIT
The chip isn't initialized.
@ CYRF6936_SEND
The chip is busy sending a packet.
@ CYRF6936_CHAN_SOP_DATA_CRC
The chip is setting the channel, SOP code, DATA code and the CRC seed.
struct spi_periph * spi_p
The SPI peripheral for the connection.
uint8_t rx_status
The last receive status.
uint8_t buffer_idx
The index of the buffer used for MULTIWRITE and used as sub-status for other statuses.
uint8_t rx_count
The length of the received packet.
uint8_t buffer_length
The length of the buffer used for MULTIWRITE.
enum Cyrf6936Status status
The status of the CYRF6936 chip.
bool has_irq
When the CYRF6936 is done reading the irq.
uint8_t buffer[CYRF6936_MAX_BUFFER]
The buffer used to write/read multiple registers.
uint8_t input_buf[17]
The input buffer for the SPI transaction.
uint8_t tx_irq_status
The last send interrupt status.
uint8_t mfg_id[6]
The manufacturer id of the CYRF6936 chip.
uint8_t output_buf[17]
The output buffer for the SPI transaction.
uint8_t rx_packet[16]
The last received packet.
uint8_t rx_irq_status
The last receive interrupt status.
#define CYRF_DIR
Bit for enabling writing.
Common code for AP and FBW telemetry.
Some architecture independent helper functions for GPIOs.
enum SPIClockPolarity cpol
clock polarity control
enum SPIClockPhase cpha
clock phase control
enum SPISlaveSelect select
slave selection behavior
enum SPIDataSizeSelect dss
data transfer word size
volatile uint8_t * output_buf
pointer to transmit buffer for DMA
uint16_t input_length
number of data words to read
enum SPIClockDiv cdiv
prescaler of main clock to use as SPI clock
volatile uint8_t * input_buf
pointer to receive buffer for DMA
uint8_t slave_idx
slave id: SPI_SLAVE0 to SPI_SLAVE4
enum SPIBitOrder bitorder
MSB/LSB order.
uint16_t output_length
number of data words to write
enum SPITransactionStatus status
bool spi_submit(struct spi_periph *p, struct spi_transaction *t)
Submit SPI transaction.
@ SPICpolIdleLow
CPOL = 0.
@ SPISelectUnselect
slave is selected before transaction and unselected after
SPI peripheral structure.
Generic interface for radio control modules.
Architecture independent SPI (Serial Peripheral Interface) API.
Architecture independent timing functions.
arch independent UART (Universal Asynchronous Receiver/Transmitter) API
unsigned short uint16_t
Typedef defining 16 bit unsigned short type.
unsigned int uint32_t
Typedef defining 32 bit unsigned int type.
unsigned char uint8_t
Typedef defining 8 bit unsigned char type.