34#define ADS1220_WREG(_reg, _nb) ((1<<6)|(_reg<<2)|(_nb-1))
35#define ADS1220_RREG(_reg, _nb) ((1<<5)|(_reg<<2)|(_nb-1))
36#define ADS1220_RESET 0x06
37#define ADS1220_START_SYNC 0x08
38#define ADS1220_POWERDOWN 0x02
39#define ADS1220_RDATA 0x10
42#define ADS1220_CONF0 0x0
43#define ADS1220_CONF1 0x1
44#define ADS1220_CONF2 0x2
45#define ADS1220_CONF3 0x3
62 ads->spi_trans.slave_idx = slave_idx;
63 ads->spi_trans.output_length = 0;
64 ads->spi_trans.input_length = 0;
65 ads->spi_trans.before_cb =
NULL;
67 ads->spi_trans.input_buf = &(
ads->rx_buf[0]);
68 ads->spi_trans.output_buf = &(
ads->tx_buf[0]);
74 ads->data_available =
false;
82 ads->spi_trans.output_length = 5;
83 ads->spi_trans.input_length = 0;
86 (
ads->config.pga_bypass << 0) |
87 (
ads->config.gain << 1) |
88 (
ads->config.mux << 4));
90 (
ads->config.conv << 2) |
91 (
ads->config.rate << 5));
93 (
ads->config.idac << 0) |
94 (
ads->config.vref << 6));
96 (
ads->config.i2mux << 2) |
97 (
ads->config.i1mux << 5));
106 ads->spi_trans.output_length = 1;
107 ads->spi_trans.input_length = 0;
123 ads->spi_trans.output_length = 0;
124 ads->spi_trans.input_length = 3;
138 ads->data_available =
true;
void ads1220_read(struct Ads1220 *ads)
static void ads1220_send_config(struct Ads1220 *ads)
void ads1220_event(struct Ads1220 *ads)
void ads1220_configure(struct Ads1220 *ads)
void ads1220_init(struct Ads1220 *ads, struct spi_periph *spi_p, uint8_t slave_idx)
#define ADS1220_WREG(_reg, _nb)
Driver for the ADS1220 24-bits ADC from TI SPI communication.
enum SPIStatus status
internal state of the peripheral
bool spi_submit(struct spi_periph *p, struct spi_transaction *t)
Submit SPI transaction.
@ SPICpolIdleLow
CPOL = 0.
@ SPISelectUnselect
slave is selected before transaction and unselected after
SPI peripheral structure.
unsigned int uint32_t
Typedef defining 32 bit unsigned int type.
unsigned char uint8_t
Typedef defining 8 bit unsigned char type.