34 #include "mcu_periph/i2c_arch.h"
45 #ifndef I2C_THREAD_STACK_SIZE
46 #define I2C_THREAD_STACK_SIZE 512
55 #if USE_I2C1 || USE_I2C2 || USE_I2C3 || USE_I2C4
59 #if defined(STM32F7XX) || defined(STM32H7XX)
72 static const systime_t tmo = TIME_US2I(10000000 / PERIODIC_FREQUENCY);
86 if (
p->trans_insert_idx ==
p->trans_extract_idx) {
99 #if defined(STM32F7XX) || defined(STM32H7XX)
101 memcpy(i->dma_buf, (
void *)t->
buf, (
size_t)(t->
len_w));
102 cacheBufferFlush(i->dma_buf, t->
len_w);
103 status = i2cMasterTransmitTimeout(
104 (I2CDriver *)
p->reg_addr,
109 cacheBufferInvalidate(i->dma_buf, t->
len_r);
110 memcpy((
void *)t->
buf, i->dma_buf, (
size_t)(t->
len_r));
112 status = i2cMasterTransmitTimeout(
113 (I2CDriver *)
p->reg_addr,
120 #if defined(STM32F7XX) || defined(STM32H7XX)
122 memcpy(i->dma_buf, (
void *)t->
buf, (
size_t)(t->
len_w));
123 status = i2cMasterReceiveTimeout(
124 (I2CDriver *)
p->reg_addr,
128 memcpy((
void *)t->
buf, i->dma_buf, (
size_t)(t->
len_r));
130 status = i2cMasterReceiveTimeout(
131 (I2CDriver *)
p->reg_addr,
140 p->trans_extract_idx++;
142 p->trans_extract_idx = 0;
157 i2cStart((I2CDriver *)
p->reg_addr, &i->cfg);
163 i2cflags_t errors = i2cGetErrors((I2CDriver *)
p->reg_addr);
164 if (errors & I2C_BUS_ERROR) {
165 p->errors->miss_start_stop_cnt++;
167 if (errors & I2C_ARBITRATION_LOST) {
168 p->errors->arb_lost_cnt++;
170 if (errors & I2C_ACK_FAILURE) {
171 p->errors->ack_fail_cnt++;
173 if (errors & I2C_OVERRUN) {
174 p->errors->over_under_cnt++;
176 if (errors & I2C_PEC_ERROR) {
177 p->errors->pec_recep_cnt++;
180 p->errors->timeout_tlow_cnt++;
182 if (errors & I2C_SMB_ALERT) {
183 p->errors->smbus_alert_cnt++;
196 static void thd_i2c(
void *arg)
200 chRegSetThreadName(init_s->name);
203 handle_i2c_thd(i2cp);
213 .sem = __SEMAPHORE_DATA(i2c1_init_s.sem, 0),
221 void i2c1_hw_init(
void)
227 i2cStart(&I2CD1, &i2c1_init_s.cfg);
228 i2c1.reg_addr = &I2CD1;
229 i2c1.errors = &i2c1_init_s.errors;
230 i2c1.init_struct = &i2c1_init_s;
232 chThdCreateStatic(wa_thd_i2c1,
sizeof(wa_thd_i2c1),
233 NORMALPRIO + 1, thd_i2c, (
void *)&i2c1);
242 .sem = __SEMAPHORE_DATA(i2c2_init_s.sem, 0),
250 void i2c2_hw_init(
void)
256 i2cStart(&I2CD2, &i2c2_init_s.cfg);
257 i2c2.reg_addr = &I2CD2;
258 i2c2.errors = &i2c2_init_s.errors;
259 i2c2.init_struct = &i2c2_init_s;
261 chThdCreateStatic(wa_thd_i2c2,
sizeof(wa_thd_i2c2),
262 NORMALPRIO + 1, thd_i2c, (
void *)&i2c2);
271 .sem = __SEMAPHORE_DATA(i2c3_init_s.sem, 0),
279 void i2c3_hw_init(
void)
285 i2cStart(&I2CD3, &i2c3_init_s.cfg);
286 i2c3.reg_addr = &I2CD3;
287 i2c3.errors = &i2c3_init_s.errors;
288 i2c3.init_struct = &i2c3_init_s;
290 chThdCreateStatic(wa_thd_i2c3,
sizeof(wa_thd_i2c3),
291 NORMALPRIO + 1, thd_i2c, (
void *)&i2c3);
300 .sem = __SEMAPHORE_DATA(i2c4_init_s.sem, 0),
308 void i2c4_hw_init(
void)
314 i2cStart(&I2CD4, &i2c4_init_s.cfg);
315 i2c4.reg_addr = &I2CD4;
316 i2c4.errors = &i2c4_init_s.errors;
317 i2c4.init_struct = &i2c4_init_s;
319 chThdCreateStatic(wa_thd_i2c4,
sizeof(wa_thd_i2c4),
320 NORMALPRIO + 1, thd_i2c, (
void *)&i2c4);
359 #if USE_I2C1 || USE_I2C2 || USE_I2C3 || USE_I2C4
363 temp =
p->trans_insert_idx + 1;
365 if (temp ==
p->trans_extract_idx) {
367 p->errors->queue_full_cnt++;
376 p->trans[
p->trans_insert_idx] = t;
377 p->trans_insert_idx = temp;
380 chSemSignal(&((
struct i2c_init *)
p->init_struct)->sem);