Paparazzi UAS  v7.0_unstable
Paparazzi is a free software Unmanned Aircraft System.
timerDmaCache.c
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1 #include "timerDmaCache.h"
2 
3 
4 
5 static void rccEnableAndReset(const stm32_tim_t * const timer);
6 
7 
8 
9 void timerDmaCache_cache(TimerDmaCache *tdcp, const DMADriver *fromDma, const stm32_tim_t *fromTim)
10 {
11  memcpy(&tdcp->DMA_regs, fromDma->dmastream->stream, sizeof(tdcp->DMA_regs));
12  memcpy(&tdcp->TIM_regs, fromTim, sizeof(tdcp->TIM_regs));
13  tdcp->DMA_regs.CR &= ~STM32_DMA_CR_EN;
14  tdcp->TIM_regs.CR1 &= ~STM32_TIM_CR1_CEN;
15 }
16 
17 void timerDmaCache_restore(const TimerDmaCache *tdcp, DMADriver *toDma, stm32_tim_t *toTim)
18 {
19  rccEnableAndReset(toTim);
20  toTim->CR1 = 0;
21  memcpy((void *) &toTim->CR2, (void *) &tdcp->TIM_regs.CR2, sizeof(tdcp->TIM_regs) - 4U);
22  memcpy(toDma->dmastream->stream, &tdcp->DMA_regs, sizeof(tdcp->DMA_regs));
23 }
24 
25 static void rccEnableAndReset(const stm32_tim_t * const timer)
26 {
27 #ifdef TIM1
28  if (timer == STM32_TIM1) {
29  rccEnableTIM1(true);
30  rccResetTIM1();
31  }
32 #endif
33 #ifdef TIM2
34  else if (timer == STM32_TIM2) {
35  rccEnableTIM2(true);
36  rccResetTIM2();
37  }
38 #endif
39 #ifdef TIM3
40  else if (timer == STM32_TIM3) {
41  rccEnableTIM3(true);
42  rccResetTIM3();
43  }
44 #endif
45 #ifdef TIM4
46  else if (timer == STM32_TIM4) {
47  rccEnableTIM4(true);
48  rccResetTIM4();
49  }
50 #endif
51 #ifdef TIM5
52  else if (timer == STM32_TIM5) {
53  rccEnableTIM5(true);
54  rccResetTIM5();
55  }
56 #endif
57 #ifdef TIM8
58  else if (timer == STM32_TIM8) {
59  rccEnableTIM8(true);
60  rccResetTIM8();
61  }
62 #endif
63 #ifdef TIM9
64  else if (timer == STM32_TIM9) {
65  rccEnableTIM9(true);
66  rccResetTIM9();
67  }
68 #endif
69 #ifdef TIM10
70  else if (timer == STM32_TIM10) {
71  rccEnableTIM10(true);
72  rccResetTIM10();
73  }
74 #endif
75 #ifdef TIM11
76  else if (timer == STM32_TIM11) {
77  rccEnableTIM11(true);
78  rccResetTIM11();
79  }
80 #endif
81 #ifdef TIM12
82  else if (timer == STM32_TIM12) {
83  rccEnableTIM12(true);
84  rccResetTIM12();
85  }
86 #endif
87 #ifdef TIM13
88  else if (timer == STM32_TIM13) {
89  rccEnableTIM13(true);
90  rccResetTIM13();
91  }
92 #endif
93 #ifdef TIM14
94  else if (timer == STM32_TIM14) {
95  rccEnableTIM14(true);
96  rccResetTIM14();
97  }
98 #endif
99 #ifdef TIM15
100  else if (timer == STM32_TIM15) {
101  rccEnableTIM15(true);
102  rccResetTIM15();
103  }
104 #endif
105 #ifdef TIM16
106  else if (timer == STM32_TIM16) {
107  rccEnableTIM16(true);
108  rccResetTIM16();
109  }
110 #endif
111 #ifdef TIM17
112  else if (timer == STM32_TIM17) {
113  rccEnableTIM17(true);
114  rccResetTIM17();
115  }
116 #endif
117 #ifdef TIM18
118  else if (timer == STM32_TIM18) {
119  rccEnableTIM18(true);
120  rccResetTIM18();
121  }
122 #endif
123 #ifdef TIM19
124  else if (timer == STM32_TIM19) {
125  rccEnableTIM19(true);
126  rccResetTIM19();
127  }
128 #endif
129  else {
130  chSysHalt("not a valid timer");
131  }
132 }
const stm32_dma_stream_t * dmastream
DMA stream associated with peripheral or memory.
Structure representing a DMA driver.
void timerDmaCache_restore(const TimerDmaCache *tdcp, DMADriver *toDma, stm32_tim_t *toTim)
Definition: timerDmaCache.c:17
void timerDmaCache_cache(TimerDmaCache *tdcp, const DMADriver *fromDma, const stm32_tim_t *fromTim)
Definition: timerDmaCache.c:9
static void rccEnableAndReset(const stm32_tim_t *const timer)
Definition: timerDmaCache.c:25
stm32_tim_t TIM_regs
Definition: timerDmaCache.h:12
DMA_Stream_TypeDef DMA_regs
Definition: timerDmaCache.h:11