Paparazzi UAS  v6.2_unstable
Paparazzi is a free software Unmanned Aircraft System.
max7456_regs.h
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1 /*
2  * Copyright (C) 2013 Chris
3  *
4  * This file is part of paparazzi.
5  *
6  * paparazzi is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2, or (at your option)
9  * any later version.
10  *
11  * paparazzi is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with paparazzi; see the file COPYING. If not, write to
18  * the Free Software Foundation, 59 Temple Place - Suite 330,
19  * Boston, MA 02111-1307, USA.
20  *
21  */
22 
30 #ifndef MAX7456_REGS_H
31 #define MAX7456_REGS_H
32 
33 //OSD REGISTER ADDRESSES
34 #define OSD_VM0_REG 0x00
35 #define OSD_VM1_REG 0x01
36 #define OSD_DMM_REG 0x04
37 #define OSD_DMAH_REG 0x05
38 #define OSD_DMAL_REG 0x06
39 #define OSD_DMDI_REG 0x07
40 #define OSD_OSDBL_REG 0x6C
41 #define OSD_OSDBL_REG_R 0xEC
42 #define OSD_STAT_REG 0xA0
43 
44 //OSD BIT POSITIONS
45 #define OSD_VIDEO_MODE_PAL (1<<6) // Default = NTSC
46 #define OSD_SYNC_INTERNAL ((1<<5)|(1<<4)) // Default = AUTO
47 #define OSD_SYNC_EXTERNAL ((1<<5) // Default = AUTO
48 #define OSD_IMAGE_ENABLE (1<<3) // Default = OSD OFF
49 #define OSD_REFRESH_ON_NEXT_VSYNC (1<<2) // Default = immediately refresh video
50 #define OSD_RESET (1<<1) // VM0 reg, hardware set to 0 after reset
51 #define OSD_VOUT_DISABLE (1<<0) // default= VIDEO OUT ENABLED
52 #define OSD_8BIT_MODE (1<<6) // default= 16 BIT MODE
53 #define OSD_BLINK_CHAR (1<<4) // default= No BLINKING
54 #define OSD_INVERT_PIXELS (1<<3) // default= No INVERSION
55 #define OSD_CLEAR_DISPLAY_MEMORY (1<<2) // DMM reg, default = 0
56 #define OSD_AUTO_INCREMENT_MODE (1<<0) // default = NO AUTO INCREMENT
57 
58 //OSD STATUS REGISTER BIT POSITIONS
59 #define OSD_UNUSED_FLAG (1<<7) // It is not used.
60 #define OSD_RESET_BUSY_FLAG (1<<6) // 0=power on reset completed, 1=busy with reset.
61 #define OSD_NVRAM_BUSY_FLAG (1<<5) // 0=memory available, 1=memory busy
62 #define OSD_VSYNC_ABSENT_FLAG (1<<4) // 0=vertical sync active, 1= no vsync
63 #define OSD_HSYNC_ABSENT_FLAG (1<<3) // 0=Horizontal sync active, 1= no Hsync
64 #define OSD_LOS_ABSENT_FLAG (1<<2) // 0=sync active, 1= no sync
65 #define OSD_NTSC_PRESENT_FLAG (1<<1) // 0=No NTSC signal detected, 1=NTSC signal detected.
66 #define OSD_PAL_PRESENT_FLAG (1<<0) // 0=No PAL signal detected, 1=PAL signal detected.
67 
68 // MAX7456 VIDEO_MODE_0 register
69 #define VIDEO_MODE_0_WRITE 0x00
70 #define VIDEO_MODE_0_READ 0x80
71 #define VIDEO_MODE_0_40_PAL 0x40
72 #define VIDEO_MODE_0_20_NoAutoSync 0x20
73 #define VIDEO_MODE_0_10_SyncInt 0x10
74 #define VIDEO_MODE_0_08_EnOSD 0x08
75 #define VIDEO_MODE_0_04_UpdateVsync 0x04
76 #define VIDEO_MODE_0_02_Reset 0x02
77 #define VIDEO_MODE_0_01_EnVideo 0x01
78 // VIDEO MODE 0 bitmap
79 #define NTSC 0x00
80 #define PAL 0x40
81 #define AUTO_SYNC 0x00
82 #define EXT_SYNC 0x20
83 #define INT_SYNC 0x30
84 #define OSD_EN 0x08
85 #define VERT_SYNC_IMM 0x00
86 #define VERT_SYNC_VSYNC 0x04
87 #define SW_RESET 0x02
88 #define BUF_EN 0x00
89 #define BUF_DI 0x01
90 
91 // MAX7456 VIDEO_MODE_1 register
92 #define VIDEO_MODE_1_WRITE 0x01
93 #define VIDEO_MODE_1_READ 0x81
94 
95 // MAX7456 DM_MODE register
96 #define DM_MODE_WRITE 0x04
97 #define DM_MODE_READ 0x84
98 
99 // MAX7456 DM_ADDRH register
100 #define DM_ADDRH_WRITE 0x05
101 #define DM_ADDRH_READ 0x85
102 
103 // MAX7456 DM_ADDRL register
104 #define DM_ADDRL_WRITE 0x06
105 #define DM_ADDRL_READ 0x87
106 
107 // MAX7456 DM_CODE_IN register
108 #define DM_CODE_IN_WRITE 0x07
109 #define DM_CODE_IN_READ 0x87
110 
111 // MAX7456 DM_CODE_OUT register
112 #define DM_CODE_OUT_READ 0xB0
113 
114 // MAX7456 FM_MODE register
115 #define FM_MODE_WRITE 0x08
116 #define FM_MODE_READ 0x88
117 
118 // MAX7456 FM_ADDRH register
119 #define FM_ADDRH_WRITE 0x09
120 #define FM_ADDRH_READ 0x89
121 
122 // MAX7456 FM_ADDRL register
123 #define FM_ADDRL_WRITE 0x0A
124 #define FM_ADDRL_READ 0x8A
125 
126 // MAX7456 FM_DATA_IN register
127 #define FM_DATA_IN_WRITE 0x0B
128 #define FM_DATA_IN_READ 0x8B
129 
130 // MAX7456 FM_DATA_OUT register
131 #define FM_DATA_OUT_READ 0xC0
132 
133 // MAX7456 requires clearing OSD Black Level register bit 0x10 after reset
134 #define OSDBL_WR 0x6C
135 #define OSDBL_RD 0xEC
136 #define OSDBL_10_DisableAutoBlackLevel 0x10
137 
138 #endif //MAX7456_REGS_H