|  | 
| #define | BOARD_NUCLEO144_F767ZI | 
|  | 
| #define | BOARD_NAME   "Nucleo144_f767zi Autopilot" | 
|  | 
| #define | STM32_HSECLK   8000000U | 
|  | 
| #define | STM32_LSECLK   32768U | 
|  | 
| #define | STM32_HSE_BYPASS | 
|  | 
| #define | STM32_LSEDRV   (3U << 3U) | 
|  | 
| #define | STM32_VDD   300U | 
|  | 
| #define | STM32F777xx | 
|  | 
| #define | AUX_A1   0U | 
|  | 
| #define | AUX_A2   1U | 
|  | 
| #define | AUX_A3   2U | 
|  | 
| #define | AUX_A4   3U | 
|  | 
| #define | PA04   4U | 
|  | 
| #define | PA05   5U | 
|  | 
| #define | AUX_B1   6U | 
|  | 
| #define | AUX_B2   7U | 
|  | 
| #define | PA08   8U | 
|  | 
| #define | USB_VBUS   9U | 
|  | 
| #define | PA10   10U | 
|  | 
| #define | OTG_FS_DM   11U | 
|  | 
| #define | OTG_FS_DP   12U | 
|  | 
| #define | SWDIO   13U | 
|  | 
| #define | SWCLK   14U | 
|  | 
| #define | UART7_TX   15U | 
|  | 
| #define | LED1   0U | 
|  | 
| #define | AUX_B4   1U | 
|  | 
| #define | PB02   2U | 
|  | 
| #define | UART7_RX   3U | 
|  | 
| #define | PB04   4U | 
|  | 
| #define | DSHOT_RX   5U | 
|  | 
| #define | SRVB1   6U | 
|  | 
| #define | LED2   7U | 
|  | 
| #define | SRVB3   8U | 
|  | 
| #define | SRVB4   9U | 
|  | 
| #define | I2C2_SCL_EXTERNAL   10U | 
|  | 
| #define | I2C2_SDA_EXTERNAL   11U | 
|  | 
| #define | SPI2_EXTERNAL_CS   12U | 
|  | 
| #define | PB13   13U | 
|  | 
| #define | LED3   14U | 
|  | 
| #define | SPI2_EXTERNAL_MOSI   15U | 
|  | 
| #define | VBAT_MEAS   0U | 
|  | 
| #define | PC01   1U | 
|  | 
| #define | SPI2_EXTERNAL_MISO   2U | 
|  | 
| #define | PC03   3U | 
|  | 
| #define | PC04   4U | 
|  | 
| #define | PC05   5U | 
|  | 
| #define | RC2   6U | 
|  | 
| #define | PC07   7U | 
|  | 
| #define | SDMMC1_D0   8U | 
|  | 
| #define | SDMMC1_D1   9U | 
|  | 
| #define | SDMMC1_D2   10U | 
|  | 
| #define | SDMMC1_D3   11U | 
|  | 
| #define | SDMMC1_CK   12U | 
|  | 
| #define | USER_BUTTON   13U | 
|  | 
| #define | OSC32_IN   14U | 
|  | 
| #define | OSC32_OUT   15U | 
|  | 
| #define | CAN_RX   0U | 
|  | 
| #define | CAN_TX   1U | 
|  | 
| #define | SDMMC1_CMD   2U | 
|  | 
| #define | SPI2_EXTERNAL_CLK   3U | 
|  | 
| #define | PD04   4U | 
|  | 
| #define | UART2_TX   5U | 
|  | 
| #define | UART2_RX   6U | 
|  | 
| #define | PD07   7U | 
|  | 
| #define | UART3_TX   8U | 
|  | 
| #define | UART3_RX   9U | 
|  | 
| #define | PD10   10U | 
|  | 
| #define | PD11   11U | 
|  | 
| #define | I2C4_SCL   12U | 
|  | 
| #define | I2C4_SDA   13U | 
|  | 
| #define | PD14   14U | 
|  | 
| #define | PD15   15U | 
|  | 
| #define | RC1   0U | 
|  | 
| #define | PE01   1U | 
|  | 
| #define | SPI4_INTERNAL_CLK   2U | 
|  | 
| #define | PE03   3U | 
|  | 
| #define | SPI4_INTERNAL_CS   4U | 
|  | 
| #define | SPI4_INTERNAL_MISO   5U | 
|  | 
| #define | SPI4_INTERNAL_MOSI   6U | 
|  | 
| #define | PE07   7U | 
|  | 
| #define | PE08   8U | 
|  | 
| #define | SRVA1   9U | 
|  | 
| #define | PE10   10U | 
|  | 
| #define | SRVA2   11U | 
|  | 
| #define | PE12   12U | 
|  | 
| #define | SRVA3   13U | 
|  | 
| #define | SRVA4   14U | 
|  | 
| #define | PE15   15U | 
|  | 
| #define | PF00   0U | 
|  | 
| #define | PF01   1U | 
|  | 
| #define | PF02   2U | 
|  | 
| #define | PF03   3U | 
|  | 
| #define | PF04   4U | 
|  | 
| #define | PF05   5U | 
|  | 
| #define | PF06   6U | 
|  | 
| #define | PF07   7U | 
|  | 
| #define | PF08   8U | 
|  | 
| #define | PF09   9U | 
|  | 
| #define | PF10   10U | 
|  | 
| #define | PF11   11U | 
|  | 
| #define | PF12   12U | 
|  | 
| #define | PF13   13U | 
|  | 
| #define | PF14   14U | 
|  | 
| #define | PF15   15U | 
|  | 
| #define | PG00   0U | 
|  | 
| #define | PG01   1U | 
|  | 
| #define | PG02   2U | 
|  | 
| #define | PG03   3U | 
|  | 
| #define | PG04   4U | 
|  | 
| #define | PG05   5U | 
|  | 
| #define | PG06   6U | 
|  | 
| #define | PG07   7U | 
|  | 
| #define | PG08   8U | 
|  | 
| #define | PG09   9U | 
|  | 
| #define | PG10   10U | 
|  | 
| #define | PG11   11U | 
|  | 
| #define | PG12   12U | 
|  | 
| #define | PG13   13U | 
|  | 
| #define | PG14   14U | 
|  | 
| #define | PG15   15U | 
|  | 
| #define | OSC_IN   0U | 
|  | 
| #define | OSC_OUT   1U | 
|  | 
| #define | PH02   2U | 
|  | 
| #define | PH03   3U | 
|  | 
| #define | PH04   4U | 
|  | 
| #define | PH05   5U | 
|  | 
| #define | PH06   6U | 
|  | 
| #define | PH07   7U | 
|  | 
| #define | PH08   8U | 
|  | 
| #define | PH09   9U | 
|  | 
| #define | PH10   10U | 
|  | 
| #define | PH11   11U | 
|  | 
| #define | PH12   12U | 
|  | 
| #define | PH13   13U | 
|  | 
| #define | PH14   14U | 
|  | 
| #define | PH15   15U | 
|  | 
| #define | PI00   0U | 
|  | 
| #define | PI01   1U | 
|  | 
| #define | PI02   2U | 
|  | 
| #define | PI03   3U | 
|  | 
| #define | PI04   4U | 
|  | 
| #define | PI05   5U | 
|  | 
| #define | PI06   6U | 
|  | 
| #define | PI07   7U | 
|  | 
| #define | PI08   8U | 
|  | 
| #define | PI09   9U | 
|  | 
| #define | PI10   10U | 
|  | 
| #define | PI11   11U | 
|  | 
| #define | PI12   12U | 
|  | 
| #define | PI13   13U | 
|  | 
| #define | PI14   14U | 
|  | 
| #define | PI15   15U | 
|  | 
| #define | PJ00   0U | 
|  | 
| #define | PJ01   1U | 
|  | 
| #define | PJ02   2U | 
|  | 
| #define | PJ03   3U | 
|  | 
| #define | PJ04   4U | 
|  | 
| #define | PJ05   5U | 
|  | 
| #define | PJ06   6U | 
|  | 
| #define | PJ07   7U | 
|  | 
| #define | PJ08   8U | 
|  | 
| #define | PJ09   9U | 
|  | 
| #define | PJ10   10U | 
|  | 
| #define | PJ11   11U | 
|  | 
| #define | PJ12   12U | 
|  | 
| #define | PJ13   13U | 
|  | 
| #define | PJ14   14U | 
|  | 
| #define | PJ15   15U | 
|  | 
| #define | PK00   0U | 
|  | 
| #define | PK01   1U | 
|  | 
| #define | PK02   2U | 
|  | 
| #define | PK03   3U | 
|  | 
| #define | PK04   4U | 
|  | 
| #define | PK05   5U | 
|  | 
| #define | PK06   6U | 
|  | 
| #define | PK07   7U | 
|  | 
| #define | PK08   8U | 
|  | 
| #define | PK09   9U | 
|  | 
| #define | PK10   10U | 
|  | 
| #define | PK11   11U | 
|  | 
| #define | PK12   12U | 
|  | 
| #define | PK13   13U | 
|  | 
| #define | PK14   14U | 
|  | 
| #define | PK15   15U | 
|  | 
| #define | LINE_AUX_A1   PAL_LINE(GPIOA, 0U) | 
|  | 
| #define | LINE_AUX_A2   PAL_LINE(GPIOA, 1U) | 
|  | 
| #define | LINE_AUX_A3   PAL_LINE(GPIOA, 2U) | 
|  | 
| #define | LINE_AUX_A4   PAL_LINE(GPIOA, 3U) | 
|  | 
| #define | LINE_AUX_B1   PAL_LINE(GPIOA, 6U) | 
|  | 
| #define | LINE_AUX_B2   PAL_LINE(GPIOA, 7U) | 
|  | 
| #define | LINE_USB_VBUS   PAL_LINE(GPIOA, 9U) | 
|  | 
| #define | LINE_OTG_FS_DM   PAL_LINE(GPIOA, 11U) | 
|  | 
| #define | LINE_OTG_FS_DP   PAL_LINE(GPIOA, 12U) | 
|  | 
| #define | LINE_SWDIO   PAL_LINE(GPIOA, 13U) | 
|  | 
| #define | LINE_SWCLK   PAL_LINE(GPIOA, 14U) | 
|  | 
| #define | LINE_UART7_TX   PAL_LINE(GPIOA, 15U) | 
|  | 
| #define | LINE_LED1   PAL_LINE(GPIOB, 0U) | 
|  | 
| #define | LINE_AUX_B4   PAL_LINE(GPIOB, 1U) | 
|  | 
| #define | LINE_UART7_RX   PAL_LINE(GPIOB, 3U) | 
|  | 
| #define | LINE_DSHOT_RX   PAL_LINE(GPIOB, 5U) | 
|  | 
| #define | LINE_SRVB1   PAL_LINE(GPIOB, 6U) | 
|  | 
| #define | LINE_LED2   PAL_LINE(GPIOB, 7U) | 
|  | 
| #define | LINE_SRVB3   PAL_LINE(GPIOB, 8U) | 
|  | 
| #define | LINE_SRVB4   PAL_LINE(GPIOB, 9U) | 
|  | 
| #define | LINE_I2C2_SCL_EXTERNAL   PAL_LINE(GPIOB, 10U) | 
|  | 
| #define | LINE_I2C2_SDA_EXTERNAL   PAL_LINE(GPIOB, 11U) | 
|  | 
| #define | LINE_SPI2_EXTERNAL_CS   PAL_LINE(GPIOB, 12U) | 
|  | 
| #define | LINE_LED3   PAL_LINE(GPIOB, 14U) | 
|  | 
| #define | LINE_SPI2_EXTERNAL_MOSI   PAL_LINE(GPIOB, 15U) | 
|  | 
| #define | LINE_VBAT_MEAS   PAL_LINE(GPIOC, 0U) | 
|  | 
| #define | LINE_SPI2_EXTERNAL_MISO   PAL_LINE(GPIOC, 2U) | 
|  | 
| #define | LINE_RC2   PAL_LINE(GPIOC, 6U) | 
|  | 
| #define | LINE_SDMMC1_D0   PAL_LINE(GPIOC, 8U) | 
|  | 
| #define | LINE_SDMMC1_D1   PAL_LINE(GPIOC, 9U) | 
|  | 
| #define | LINE_SDMMC1_D2   PAL_LINE(GPIOC, 10U) | 
|  | 
| #define | LINE_SDMMC1_D3   PAL_LINE(GPIOC, 11U) | 
|  | 
| #define | LINE_SDMMC1_CK   PAL_LINE(GPIOC, 12U) | 
|  | 
| #define | LINE_USER_BUTTON   PAL_LINE(GPIOC, 13U) | 
|  | 
| #define | LINE_OSC32_IN   PAL_LINE(GPIOC, 14U) | 
|  | 
| #define | LINE_OSC32_OUT   PAL_LINE(GPIOC, 15U) | 
|  | 
| #define | LINE_CAN_RX   PAL_LINE(GPIOD, 0U) | 
|  | 
| #define | LINE_CAN_TX   PAL_LINE(GPIOD, 1U) | 
|  | 
| #define | LINE_SDMMC1_CMD   PAL_LINE(GPIOD, 2U) | 
|  | 
| #define | LINE_SPI2_EXTERNAL_CLK   PAL_LINE(GPIOD, 3U) | 
|  | 
| #define | LINE_UART2_TX   PAL_LINE(GPIOD, 5U) | 
|  | 
| #define | LINE_UART2_RX   PAL_LINE(GPIOD, 6U) | 
|  | 
| #define | LINE_UART3_TX   PAL_LINE(GPIOD, 8U) | 
|  | 
| #define | LINE_UART3_RX   PAL_LINE(GPIOD, 9U) | 
|  | 
| #define | LINE_I2C4_SCL   PAL_LINE(GPIOD, 12U) | 
|  | 
| #define | LINE_I2C4_SDA   PAL_LINE(GPIOD, 13U) | 
|  | 
| #define | LINE_RC1   PAL_LINE(GPIOE, 0U) | 
|  | 
| #define | LINE_SPI4_INTERNAL_CLK   PAL_LINE(GPIOE, 2U) | 
|  | 
| #define | LINE_SPI4_INTERNAL_CS   PAL_LINE(GPIOE, 4U) | 
|  | 
| #define | LINE_SPI4_INTERNAL_MISO   PAL_LINE(GPIOE, 5U) | 
|  | 
| #define | LINE_SPI4_INTERNAL_MOSI   PAL_LINE(GPIOE, 6U) | 
|  | 
| #define | LINE_SRVA1   PAL_LINE(GPIOE, 9U) | 
|  | 
| #define | LINE_SRVA2   PAL_LINE(GPIOE, 11U) | 
|  | 
| #define | LINE_SRVA3   PAL_LINE(GPIOE, 13U) | 
|  | 
| #define | LINE_SRVA4   PAL_LINE(GPIOE, 14U) | 
|  | 
| #define | LINE_OSC_IN   PAL_LINE(GPIOH, 0U) | 
|  | 
| #define | LINE_OSC_OUT   PAL_LINE(GPIOH, 1U) | 
|  | 
| #define | PIN_MODE_INPUT(n)   (0U << ((n) * 2U)) | 
|  | 
| #define | PIN_MODE_OUTPUT(n)   (1U << ((n) * 2U)) | 
|  | 
| #define | PIN_MODE_ALTERNATE(n)   (2U << ((n) * 2U)) | 
|  | 
| #define | PIN_MODE_ANALOG(n)   (3U << ((n) * 2U)) | 
|  | 
| #define | PIN_ODR_LEVEL_LOW(n)   (0U << (n)) | 
|  | 
| #define | PIN_ODR_LEVEL_HIGH(n)   (1U << (n)) | 
|  | 
| #define | PIN_OTYPE_PUSHPULL(n)   (0U << (n)) | 
|  | 
| #define | PIN_OTYPE_OPENDRAIN(n)   (1U << (n)) | 
|  | 
| #define | PIN_OSPEED_SPEED_VERYLOW(n)   (0U << ((n) * 2U)) | 
|  | 
| #define | PIN_OSPEED_SPEED_LOW(n)   (1U << ((n) * 2U)) | 
|  | 
| #define | PIN_OSPEED_SPEED_MEDIUM(n)   (2U << ((n) * 2U)) | 
|  | 
| #define | PIN_OSPEED_SPEED_HIGH(n)   (3U << ((n) * 2U)) | 
|  | 
| #define | PIN_PUPDR_FLOATING(n)   (0U << ((n) * 2U)) | 
|  | 
| #define | PIN_PUPDR_PULLUP(n)   (1U << ((n) * 2U)) | 
|  | 
| #define | PIN_PUPDR_PULLDOWN(n)   (2U << ((n) * 2U)) | 
|  | 
| #define | PIN_AFIO_AF(n,  v)   ((v) << (((n) % 8U) * 4U)) | 
|  | 
| #define | VAL_GPIOA_MODER | 
|  | 
| #define | VAL_GPIOA_OTYPER | 
|  | 
| #define | VAL_GPIOA_OSPEEDR | 
|  | 
| #define | VAL_GPIOA_PUPDR | 
|  | 
| #define | VAL_GPIOA_ODR | 
|  | 
| #define | VAL_GPIOA_AFRL | 
|  | 
| #define | VAL_GPIOA_AFRH | 
|  | 
| #define | VAL_GPIOB_MODER | 
|  | 
| #define | VAL_GPIOB_OTYPER | 
|  | 
| #define | VAL_GPIOB_OSPEEDR | 
|  | 
| #define | VAL_GPIOB_PUPDR | 
|  | 
| #define | VAL_GPIOB_ODR | 
|  | 
| #define | VAL_GPIOB_AFRL | 
|  | 
| #define | VAL_GPIOB_AFRH | 
|  | 
| #define | VAL_GPIOC_MODER | 
|  | 
| #define | VAL_GPIOC_OTYPER | 
|  | 
| #define | VAL_GPIOC_OSPEEDR | 
|  | 
| #define | VAL_GPIOC_PUPDR | 
|  | 
| #define | VAL_GPIOC_ODR | 
|  | 
| #define | VAL_GPIOC_AFRL | 
|  | 
| #define | VAL_GPIOC_AFRH | 
|  | 
| #define | VAL_GPIOD_MODER | 
|  | 
| #define | VAL_GPIOD_OTYPER | 
|  | 
| #define | VAL_GPIOD_OSPEEDR | 
|  | 
| #define | VAL_GPIOD_PUPDR | 
|  | 
| #define | VAL_GPIOD_ODR | 
|  | 
| #define | VAL_GPIOD_AFRL | 
|  | 
| #define | VAL_GPIOD_AFRH | 
|  | 
| #define | VAL_GPIOE_MODER | 
|  | 
| #define | VAL_GPIOE_OTYPER | 
|  | 
| #define | VAL_GPIOE_OSPEEDR | 
|  | 
| #define | VAL_GPIOE_PUPDR | 
|  | 
| #define | VAL_GPIOE_ODR | 
|  | 
| #define | VAL_GPIOE_AFRL | 
|  | 
| #define | VAL_GPIOE_AFRH | 
|  | 
| #define | VAL_GPIOF_MODER | 
|  | 
| #define | VAL_GPIOF_OTYPER | 
|  | 
| #define | VAL_GPIOF_OSPEEDR | 
|  | 
| #define | VAL_GPIOF_PUPDR | 
|  | 
| #define | VAL_GPIOF_ODR | 
|  | 
| #define | VAL_GPIOF_AFRL | 
|  | 
| #define | VAL_GPIOF_AFRH | 
|  | 
| #define | VAL_GPIOG_MODER | 
|  | 
| #define | VAL_GPIOG_OTYPER | 
|  | 
| #define | VAL_GPIOG_OSPEEDR | 
|  | 
| #define | VAL_GPIOG_PUPDR | 
|  | 
| #define | VAL_GPIOG_ODR | 
|  | 
| #define | VAL_GPIOG_AFRL | 
|  | 
| #define | VAL_GPIOG_AFRH | 
|  | 
| #define | VAL_GPIOH_MODER | 
|  | 
| #define | VAL_GPIOH_OTYPER | 
|  | 
| #define | VAL_GPIOH_OSPEEDR | 
|  | 
| #define | VAL_GPIOH_PUPDR | 
|  | 
| #define | VAL_GPIOH_ODR | 
|  | 
| #define | VAL_GPIOH_AFRL | 
|  | 
| #define | VAL_GPIOH_AFRH | 
|  | 
| #define | VAL_GPIOI_MODER | 
|  | 
| #define | VAL_GPIOI_OTYPER | 
|  | 
| #define | VAL_GPIOI_OSPEEDR | 
|  | 
| #define | VAL_GPIOI_PUPDR | 
|  | 
| #define | VAL_GPIOI_ODR | 
|  | 
| #define | VAL_GPIOI_AFRL | 
|  | 
| #define | VAL_GPIOI_AFRH | 
|  | 
| #define | VAL_GPIOJ_MODER | 
|  | 
| #define | VAL_GPIOJ_OTYPER | 
|  | 
| #define | VAL_GPIOJ_OSPEEDR | 
|  | 
| #define | VAL_GPIOJ_PUPDR | 
|  | 
| #define | VAL_GPIOJ_ODR | 
|  | 
| #define | VAL_GPIOJ_AFRL | 
|  | 
| #define | VAL_GPIOJ_AFRH | 
|  | 
| #define | VAL_GPIOK_MODER | 
|  | 
| #define | VAL_GPIOK_OTYPER | 
|  | 
| #define | VAL_GPIOK_OSPEEDR | 
|  | 
| #define | VAL_GPIOK_PUPDR | 
|  | 
| #define | VAL_GPIOK_ODR | 
|  | 
| #define | VAL_GPIOK_AFRL | 
|  | 
| #define | VAL_GPIOK_AFRH | 
|  | 
| #define | AF_OTG_FS_DM   10U | 
|  | 
| #define | AF_LINE_OTG_FS_DM   10U | 
|  | 
| #define | AF_OTG_FS_DP   10U | 
|  | 
| #define | AF_LINE_OTG_FS_DP   10U | 
|  | 
| #define | AF_SWDIO   0U | 
|  | 
| #define | AF_LINE_SWDIO   0U | 
|  | 
| #define | AF_SWCLK   0U | 
|  | 
| #define | AF_LINE_SWCLK   0U | 
|  | 
| #define | AF_UART7_TX   12U | 
|  | 
| #define | AF_LINE_UART7_TX   12U | 
|  | 
| #define | AF_UART7_RX   12U | 
|  | 
| #define | AF_LINE_UART7_RX   12U | 
|  | 
| #define | AF_DSHOT_RX   1U | 
|  | 
| #define | AF_LINE_DSHOT_RX   1U | 
|  | 
| #define | AF_SRVB1   2U | 
|  | 
| #define | AF_LINE_SRVB1   2U | 
|  | 
| #define | AF_SRVB3   2U | 
|  | 
| #define | AF_LINE_SRVB3   2U | 
|  | 
| #define | AF_SRVB4   2U | 
|  | 
| #define | AF_LINE_SRVB4   2U | 
|  | 
| #define | AF_I2C2_SCL_EXTERNAL   4U | 
|  | 
| #define | AF_LINE_I2C2_SCL_EXTERNAL   4U | 
|  | 
| #define | AF_I2C2_SDA_EXTERNAL   4U | 
|  | 
| #define | AF_LINE_I2C2_SDA_EXTERNAL   4U | 
|  | 
| #define | AF_SPI2_EXTERNAL_MOSI   5U | 
|  | 
| #define | AF_LINE_SPI2_EXTERNAL_MOSI   5U | 
|  | 
| #define | AF_SPI2_EXTERNAL_MISO   5U | 
|  | 
| #define | AF_LINE_SPI2_EXTERNAL_MISO   5U | 
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| #define | AF_SDMMC1_D0   12U | 
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| #define | AF_LINE_SDMMC1_D0   12U | 
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| #define | AF_SDMMC1_D1   12U | 
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| #define | AF_LINE_SDMMC1_D1   12U | 
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| #define | AF_SDMMC1_D2   12U | 
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| #define | AF_LINE_SDMMC1_D2   12U | 
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| #define | AF_SDMMC1_D3   12U | 
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| #define | AF_LINE_SDMMC1_D3   12U | 
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| #define | AF_SDMMC1_CK   12U | 
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| #define | AF_LINE_SDMMC1_CK   12U | 
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| #define | AF_OSC32_IN   0U | 
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| #define | AF_LINE_OSC32_IN   0U | 
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| #define | AF_OSC32_OUT   0U | 
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| #define | AF_LINE_OSC32_OUT   0U | 
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| #define | AF_CAN_RX   9U | 
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| #define | AF_LINE_CAN_RX   9U | 
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| #define | AF_CAN_TX   9U | 
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| #define | AF_LINE_CAN_TX   9U | 
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| #define | AF_SDMMC1_CMD   12U | 
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| #define | AF_LINE_SDMMC1_CMD   12U | 
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| #define | AF_SPI2_EXTERNAL_CLK   5U | 
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| #define | AF_LINE_SPI2_EXTERNAL_CLK   5U | 
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| #define | AF_UART2_TX   7U | 
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| #define | AF_LINE_UART2_TX   7U | 
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| #define | AF_UART2_RX   7U | 
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| #define | AF_LINE_UART2_RX   7U | 
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| #define | AF_UART3_TX   7U | 
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| #define | AF_LINE_UART3_TX   7U | 
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| #define | AF_UART3_RX   7U | 
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| #define | AF_LINE_UART3_RX   7U | 
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| #define | AF_I2C4_SCL   4U | 
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| #define | AF_LINE_I2C4_SCL   4U | 
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| #define | AF_I2C4_SDA   4U | 
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| #define | AF_LINE_I2C4_SDA   4U | 
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| #define | AF_RC1   8U | 
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| #define | AF_LINE_RC1   8U | 
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| #define | AF_SPI4_INTERNAL_CLK   5U | 
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| #define | AF_LINE_SPI4_INTERNAL_CLK   5U | 
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| #define | AF_SPI4_INTERNAL_MISO   5U | 
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| #define | AF_LINE_SPI4_INTERNAL_MISO   5U | 
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| #define | AF_SPI4_INTERNAL_MOSI   5U | 
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| #define | AF_LINE_SPI4_INTERNAL_MOSI   5U | 
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| #define | AF_SRVA1   1U | 
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| #define | AF_LINE_SRVA1   1U | 
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| #define | AF_SRVA2   1U | 
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| #define | AF_LINE_SRVA2   1U | 
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| #define | AF_SRVA3   1U | 
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| #define | AF_LINE_SRVA3   1U | 
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| #define | AF_SRVA4   1U | 
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| #define | AF_LINE_SRVA4   1U | 
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| #define | AF_OSC_IN   0U | 
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| #define | AF_LINE_OSC_IN   0U | 
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| #define | AF_OSC_OUT   0U | 
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| #define | AF_LINE_OSC_OUT   0U | 
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| #define | AUX_A1_ADC   1 | 
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| #define | AUX_A1_ADC_FN   IN | 
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| #define | AUX_A1_ADC_IN   0 | 
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| #define | AUX_A1_TIM   5 | 
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| #define | AUX_A1_TIM_FN   CH | 
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| #define | AUX_A1_TIM_CH   1 | 
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| #define | AUX_A1_TIM_AF   2 | 
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| #define | AUX_A1_UART   4 | 
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| #define | AUX_A1_UART_FN   TX | 
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| #define | AUX_A1_UART_AF   8 | 
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| #define | AUX_A1_USART   2 | 
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| #define | AUX_A1_USART_FN   CTS | 
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| #define | AUX_A1_USART_AF   7 | 
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| #define | AUX_A2_ADC   1 | 
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| #define | AUX_A2_ADC_FN   IN | 
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| #define | AUX_A2_ADC_IN   1 | 
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| #define | AUX_A2_TIM   5 | 
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| #define | AUX_A2_TIM_FN   CH | 
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| #define | AUX_A2_TIM_CH   2 | 
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| #define | AUX_A2_TIM_AF   2 | 
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| #define | AUX_A2_UART   4 | 
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| #define | AUX_A2_UART_FN   RX | 
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| #define | AUX_A2_UART_AF   8 | 
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| #define | AUX_A2_USART   2 | 
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| #define | AUX_A2_USART_FN   RTS | 
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| #define | AUX_A2_USART_AF   7 | 
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| #define | AUX_A3_ADC   1 | 
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| #define | AUX_A3_ADC_FN   IN | 
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| #define | AUX_A3_ADC_IN   2 | 
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| #define | AUX_A3_TIM   5 | 
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| #define | AUX_A3_TIM_FN   CH | 
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| #define | AUX_A3_TIM_CH   3 | 
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| #define | AUX_A3_TIM_AF   2 | 
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| #define | AUX_A4_ADC   1 | 
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| #define | AUX_A4_ADC_FN   IN | 
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| #define | AUX_A4_ADC_IN   3 | 
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| #define | AUX_A4_TIM   5 | 
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| #define | AUX_A4_TIM_FN   CH | 
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| #define | AUX_A4_TIM_CH   4 | 
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| #define | AUX_A4_TIM_AF   2 | 
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| #define | AUX_B1_ADC   1 | 
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| #define | AUX_B1_ADC_FN   IN | 
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| #define | AUX_B1_ADC_IN   6 | 
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| #define | AUX_B1_TIM   3 | 
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| #define | AUX_B1_TIM_FN   CH | 
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| #define | AUX_B1_TIM_CH   1 | 
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| #define | AUX_B1_TIM_AF   2 | 
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| #define | AUX_B2_ADC   1 | 
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| #define | AUX_B2_ADC_FN   IN | 
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| #define | AUX_B2_ADC_IN   7 | 
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| #define | AUX_B2_TIM   3 | 
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| #define | AUX_B2_TIM_FN   CH | 
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| #define | AUX_B2_TIM_CH   2 | 
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| #define | AUX_B2_TIM_AF   2 | 
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| #define | AUX_B4_ADC   1 | 
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| #define | AUX_B4_ADC_FN   IN | 
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| #define | AUX_B4_ADC_IN   9 | 
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| #define | AUX_B4_TIM   3 | 
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| #define | AUX_B4_TIM_FN   CH | 
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| #define | AUX_B4_TIM_CH   4 | 
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| #define | AUX_B4_TIM_AF   2 | 
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| #define | SRVB1_TIM   4 | 
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| #define | SRVB1_TIM_FN   CH | 
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| #define | SRVB1_TIM_CH   1 | 
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| #define | SRVB1_TIM_AF   2 | 
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| #define | SRVB3_TIM   4 | 
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| #define | SRVB3_TIM_FN   CH | 
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| #define | SRVB3_TIM_CH   3 | 
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| #define | SRVB3_TIM_AF   2 | 
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| #define | SRVB4_TIM   4 | 
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| #define | SRVB4_TIM_FN   CH | 
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| #define | SRVB4_TIM_CH   4 | 
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| #define | SRVB4_TIM_AF   2 | 
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| #define | VBAT_MEAS_ADC   1 | 
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| #define | VBAT_MEAS_ADC_FN   IN | 
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| #define | VBAT_MEAS_ADC_IN   10 | 
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| #define | RC2_TIM   8 | 
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| #define | RC2_TIM_FN   CH | 
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| #define | RC2_TIM_CH   1 | 
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| #define | RC2_TIM_AF   3 | 
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| #define | RC2_USART   6 | 
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| #define | RC2_USART_FN   TX | 
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| #define | RC2_USART_AF   8 | 
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| #define | RC1_UART   8 | 
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| #define | RC1_UART_FN   RX | 
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| #define | RC1_UART_AF   8 | 
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| #define | SRVA1_TIM   1 | 
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| #define | SRVA1_TIM_FN   CH | 
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| #define | SRVA1_TIM_CH   1 | 
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| #define | SRVA1_TIM_AF   1 | 
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| #define | SRVA2_TIM   1 | 
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| #define | SRVA2_TIM_FN   CH | 
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| #define | SRVA2_TIM_CH   2 | 
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| #define | SRVA2_TIM_AF   1 | 
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| #define | SRVA3_TIM   1 | 
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| #define | SRVA3_TIM_FN   CH | 
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| #define | SRVA3_TIM_CH   3 | 
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| #define | SRVA3_TIM_AF   1 | 
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| #define | SRVA4_TIM   1 | 
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| #define | SRVA4_TIM_FN   CH | 
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| #define | SRVA4_TIM_CH   4 | 
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| #define | SRVA4_TIM_AF   1 | 
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