Paparazzi UAS
v7.0_unstable
Paparazzi is a free software Unmanned Aircraft System.
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board.h
Go to the documentation of this file.
1
/*
2
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
3
4
Licensed under the Apache License, Version 2.0 (the "License");
5
you may not use this file except in compliance with the License.
6
You may obtain a copy of the License at
7
8
http://www.apache.org/licenses/LICENSE-2.0
9
10
Unless required by applicable law or agreed to in writing, software
11
distributed under the License is distributed on an "AS IS" BASIS,
12
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13
See the License for the specific language governing permissions and
14
limitations under the License.
15
*/
16
17
#pragma once
18
19
/*
20
* Board identifier.
21
*/
22
#define BOARD_AIOF7
23
#define BOARD_NAME "AIO F7"
24
25
/*
26
* Board oscillators-related settings.
27
*/
28
#if !defined(STM32_LSECLK)
29
#define STM32_LSECLK 32768U
30
#endif
31
32
#define STM32_LSEDRV (3U << 3U)
33
34
#if !defined(STM32_HSECLK)
35
#define STM32_HSECLK 8000000U
36
#endif
37
38
/*
39
* Board voltages.
40
* Required for performance limits calculation.
41
*/
42
#define STM32_VDD 300U
43
44
/*
45
* MCU type as defined in the ST header.
46
*/
47
#define STM32F722xx
48
54
#define DSHOT_TIM3_TELEMETRY_DEV NULL
55
#define DSHOT_TIM4_TELEMETRY_DEV NULL
56
#define DSHOT_TIM5_TELEMETRY_DEV NULL
57
58
59
60
#ifndef USE_DSHOT_TIM3
61
#define USE_DSHOT_TIM3 1
// SERVO1 SERVO2
62
#endif
63
64
#ifndef USE_DSHOT_TIM4
65
#define USE_DSHOT_TIM4 1
// SERVO5 SERVO6
66
#endif
67
68
#ifndef USE_DSHOT_TIM5
69
#define USE_DSHOT_TIM5 1
// SERVO3 SERVO4
70
#endif
71
72
#if USE_DSHOT_TIM3
// SERVO1 SERVO2 on TIM3
73
74
#define DSHOT_SERVO_1 1
75
#define DSHOT_SERVO_1_GPIO PAL_PORT(LINE_SERVO1)
76
#define DSHOT_SERVO_1_PIN PAL_PAD(LINE_SERVO1)
77
#define DSHOT_SERVO_1_AF AF_LINE_SERVO1
78
#define DSHOT_SERVO_1_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SERVO1_TIM)
79
#define DSHOT_SERVO_1_CHANNEL SERVO1_TIM_CH
80
81
#define DSHOT_SERVO_2 2
82
#define DSHOT_SERVO_2_GPIO PAL_PORT(LINE_SERVO2)
83
#define DSHOT_SERVO_2_PIN PAL_PAD(LINE_SERVO2)
84
#define DSHOT_SERVO_2_AF AF_LINE_SERVO2
85
#define DSHOT_SERVO_2_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SERVO2_TIM)
86
#define DSHOT_SERVO_2_CHANNEL SERVO2_TIM_CH
87
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#define DSHOT_CONF_TIM3 1
90
#define DSHOT_CONF3_DEF { \
91
.dma_stream = STM32_PWM3_UP_DMA_STREAM, \
92
.dma_channel = STM32_PWM3_UP_DMA_CHANNEL, \
93
.pwmp = &PWMD3, \
94
.tlm_sd = DSHOT_TIM3_TELEMETRY_DEV, \
95
.dma_buf = &dshot3DmaBuffer, \
96
.dcache_memory_in_use = false \
97
}
98
99
#endif
100
101
102
#if USE_DSHOT_TIM4
// SERVO5 SERVO6 on TIM4
103
104
#define DSHOT_SERVO_5 5
105
#define DSHOT_SERVO_5_GPIO PAL_PORT(LINE_SERVO5)
106
#define DSHOT_SERVO_5_PIN PAL_PAD(LINE_SERVO5)
107
#define DSHOT_SERVO_5_AF AF_LINE_SERVO5
108
#define DSHOT_SERVO_5_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SERVO5_TIM)
109
#define DSHOT_SERVO_5_CHANNEL SERVO5_TIM_CH
110
111
#define DSHOT_SERVO_6 6
112
#define DSHOT_SERVO_6_GPIO PAL_PORT(LINE_SERVO6)
113
#define DSHOT_SERVO_6_PIN PAL_PAD(LINE_SERVO6)
114
#define DSHOT_SERVO_6_AF AF_LINE_SERVO6
115
#define DSHOT_SERVO_6_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SERVO6_TIM)
116
#define DSHOT_SERVO_6_CHANNEL SERVO6_TIM_CH
117
118
119
#define DSHOT_CONF_TIM4 1
120
#define DSHOT_CONF4_DEF { \
121
.dma_stream = STM32_PWM4_UP_DMA_STREAM, \
122
.dma_channel = STM32_PWM4_UP_DMA_CHANNEL, \
123
.pwmp = &PWMD4, \
124
.tlm_sd = DSHOT_TIM4_TELEMETRY_DEV, \
125
.dma_buf = &dshot4DmaBuffer, \
126
.dcache_memory_in_use = false \
127
}
128
129
#endif
130
131
#if USE_DSHOT_TIM5
// SERVO3 SERVO4 on TIM5
132
133
#define DSHOT_SERVO_3 3
134
#define DSHOT_SERVO_3_GPIO PAL_PORT(LINE_SERVO3)
135
#define DSHOT_SERVO_3_PIN PAL_PAD(LINE_SERVO3)
136
#define DSHOT_SERVO_3_AF AF_LINE_SERVO3
137
#define DSHOT_SERVO_3_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SERVO3_TIM)
138
#define DSHOT_SERVO_3_CHANNEL SERVO3_TIM_CH
139
140
#define DSHOT_SERVO_4 4
141
#define DSHOT_SERVO_4_GPIO PAL_PORT(LINE_SERVO4)
142
#define DSHOT_SERVO_4_PIN PAL_PAD(LINE_SERVO4)
143
#define DSHOT_SERVO_4_AF AF_LINE_SERVO4
144
#define DSHOT_SERVO_4_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SERVO4_TIM)
145
#define DSHOT_SERVO_4_CHANNEL SERVO4_TIM_CH
146
147
148
#define DSHOT_CONF_TIM5 1
149
#define DSHOT_CONF5_DEF { \
150
.dma_stream = STM32_PWM5_UP_DMA_STREAM, \
151
.dma_channel = STM32_PWM5_UP_DMA_CHANNEL, \
152
.pwmp = &PWMD5, \
153
.tlm_sd = DSHOT_TIM5_TELEMETRY_DEV, \
154
.dma_buf = &dshot5DmaBuffer, \
155
.dcache_memory_in_use = false \
156
}
157
158
#endif
159
160
/*
161
* enable TIM5, TIM3, TIM4 by default
162
*/
163
#ifndef USE_PWM_TIM3
164
#define USE_PWM_TIM3 1
165
#endif
166
167
#ifndef USE_PWM_TIM4
168
#define USE_PWM_TIM4 1
169
#endif
170
171
#ifndef USE_PWM_TIM5
172
#define USE_PWM_TIM5 1
173
#endif
174
175
/* allow to define ADC_CHANNEL_VSUPPLY in the airframe file*/
176
#ifndef ADC_CHANNEL_VSUPPLY
177
#define ADC_CHANNEL_VSUPPLY ADC_1
178
#endif
179
180
#define DefaultVoltageOfAdc(adc) ((3.3f/4096.0f)*10.91*adc)
181
/*
182
* IO pins assignments.
183
*/
184
#define PA00_SERVO4 0U
185
#define PA01_SERVO3 1U
186
#define PA02_UART2_TX 2U
187
#define PA03_UART2_RX 3U
188
#define PA04_SPI_SLAVE0 4U
189
#define PA05_SPI1_CLK 5U
190
#define PA06_SPI1_MISO 6U
191
#define PA07_SPI1_MOSI 7U
192
#define PA08_AUX 8U
193
#define PA09_UART1_TX 9U
194
#define PA10_UART1_RX 10U
195
#define PA11_OTG_FS_DM 11U
196
#define PA12_OTG_FS_DP 12U
197
#define PA13_SWDIO 13U
198
#define PA14_SWCLK 14U
199
#define PA15_SPI_SLAVE1 15U
200
201
#define PB00_SERVO1 0U
202
#define PB01_SERVO2 1U
203
#define PB02_GYRO_EXTI_2 2U
204
#define PB03_SPI3_CLK 3U
205
#define PB04_SPI3_MISO 4U
206
#define PB05_SPI3_MOSI 5U
207
#define PB06_SERVO5 6U
208
#define PB07_SERVO6 7U
209
#define PB08_I2C1_SCL 8U
210
#define PB09_I2C1_SDA 9U
211
#define PB10_UART3_TX 10U
212
#define PB11_RC1 11U
213
#define PB12_SPI_SLAVE2 12U
214
#define PB13_SPI2_CLK 13U
215
#define PB14_SPI2_MISO 14U
216
#define PB15_SPI2_MOSI 15U
217
218
#define PC00_ADC1 0U
219
#define PC01 1U
220
#define PC02 2U
221
#define PC03_SPI_SLAVE3 3U
222
#define PC04_GYRO_EXTI_1 4U
223
#define PC05 5U
224
#define PC06_UART6_TX 6U
225
#define PC07_UART6_RX 7U
226
#define PC08 8U
227
#define PC09 9U
228
#define PC10_UART4_TX 10U
229
#define PC11_UART4_RX 11U
230
#define PC12_UART5_TX 12U
231
#define PC13_SPI_SLAVE4 13U
232
#define PC14_BEEPER 14U
233
#define PC15_LED1 15U
234
235
#define PD00 0U
236
#define PD01 1U
237
#define PD02_UART5_RX 2U
238
#define PD03 3U
239
#define PD04 4U
240
#define PD05 5U
241
#define PD06 6U
242
#define PD07 7U
243
#define PD08 8U
244
#define PD09 9U
245
#define PD10 10U
246
#define PD11 11U
247
#define PD12 12U
248
#define PD13 13U
249
#define PD14 14U
250
#define PD15 15U
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252
#define PE00 0U
253
#define PE01 1U
254
#define PE02 2U
255
#define PE03 3U
256
#define PE04 4U
257
#define PE05 5U
258
#define PE06 6U
259
#define PE07 7U
260
#define PE08 8U
261
#define PE09 9U
262
#define PE10 10U
263
#define PE11 11U
264
#define PE12 12U
265
#define PE13 13U
266
#define PE14 14U
267
#define PE15 15U
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269
#define PF00 0U
270
#define PF01 1U
271
#define PF02 2U
272
#define PF03 3U
273
#define PF04 4U
274
#define PF05 5U
275
#define PF06 6U
276
#define PF07 7U
277
#define PF08 8U
278
#define PF09 9U
279
#define PF10 10U
280
#define PF11 11U
281
#define PF12 12U
282
#define PF13 13U
283
#define PF14 14U
284
#define PF15 15U
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286
#define PG00 0U
287
#define PG01 1U
288
#define PG02 2U
289
#define PG03 3U
290
#define PG04 4U
291
#define PG05 5U
292
#define PG06 6U
293
#define PG07 7U
294
#define PG08 8U
295
#define PG09 9U
296
#define PG10 10U
297
#define PG11 11U
298
#define PG12 12U
299
#define PG13 13U
300
#define PG14 14U
301
#define PG15 15U
302
303
#define PH00_OSC_IN 0U
304
#define PH01_OSC_OUT 1U
305
#define PH02 2U
306
#define PH03 3U
307
#define PH04 4U
308
#define PH05 5U
309
#define PH06 6U
310
#define PH07 7U
311
#define PH08 8U
312
#define PH09 9U
313
#define PH10 10U
314
#define PH11 11U
315
#define PH12 12U
316
#define PH13 13U
317
#define PH14 14U
318
#define PH15 15U
319
320
#define PI00 0U
321
#define PI01 1U
322
#define PI02 2U
323
#define PI03 3U
324
#define PI04 4U
325
#define PI05 5U
326
#define PI06 6U
327
#define PI07 7U
328
#define PI08 8U
329
#define PI09 9U
330
#define PI10 10U
331
#define PI11 11U
332
#define PI12 12U
333
#define PI13 13U
334
#define PI14 14U
335
#define PI15 15U
336
337
#define PJ00 0U
338
#define PJ01 1U
339
#define PJ02 2U
340
#define PJ03 3U
341
#define PJ04 4U
342
#define PJ05 5U
343
#define PJ06 6U
344
#define PJ07 7U
345
#define PJ08 8U
346
#define PJ09 9U
347
#define PJ10 10U
348
#define PJ11 11U
349
#define PJ12 12U
350
#define PJ13 13U
351
#define PJ14 14U
352
#define PJ15 15U
353
354
#define PK00 0U
355
#define PK01 1U
356
#define PK02 2U
357
#define PK03 3U
358
#define PK04 4U
359
#define PK05 5U
360
#define PK06 6U
361
#define PK07 7U
362
#define PK08 8U
363
#define PK09 9U
364
#define PK10 10U
365
#define PK11 11U
366
#define PK12 12U
367
#define PK13 13U
368
#define PK14 14U
369
#define PK15 15U
370
371
/*
372
* IO lines assignments.
373
*/
374
#define LINE_SERVO4 PAL_LINE(GPIOA, 0U)
375
#define LINE_SERVO3 PAL_LINE(GPIOA, 1U)
376
#define LINE_UART2_TX PAL_LINE(GPIOA, 2U)
377
#define LINE_UART2_RX PAL_LINE(GPIOA, 3U)
378
#define LINE_SPI_SLAVE0 PAL_LINE(GPIOA, 4U)
379
#define LINE_SPI1_CLK PAL_LINE(GPIOA, 5U)
380
#define LINE_SPI1_MISO PAL_LINE(GPIOA, 6U)
381
#define LINE_SPI1_MOSI PAL_LINE(GPIOA, 7U)
382
#define LINE_AUX PAL_LINE(GPIOA, 8U)
383
#define LINE_UART1_TX PAL_LINE(GPIOA, 9U)
384
#define LINE_UART1_RX PAL_LINE(GPIOA, 10U)
385
#define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U)
386
#define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U)
387
#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
388
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
389
#define LINE_SPI_SLAVE1 PAL_LINE(GPIOA, 15U)
390
391
#define LINE_SERVO1 PAL_LINE(GPIOB, 0U)
392
#define LINE_SERVO2 PAL_LINE(GPIOB, 1U)
393
#define LINE_GYRO_EXTI_2 PAL_LINE(GPIOB, 2U)
394
#define LINE_SPI3_CLK PAL_LINE(GPIOB, 3U)
395
#define LINE_SPI3_MISO PAL_LINE(GPIOB, 4U)
396
#define LINE_SPI3_MOSI PAL_LINE(GPIOB, 5U)
397
#define LINE_SERVO5 PAL_LINE(GPIOB, 6U)
398
#define LINE_SERVO6 PAL_LINE(GPIOB, 7U)
399
#define LINE_I2C1_SCL PAL_LINE(GPIOB, 8U)
400
#define LINE_I2C1_SDA PAL_LINE(GPIOB, 9U)
401
#define LINE_UART3_TX PAL_LINE(GPIOB, 10U)
402
#define LINE_RC1 PAL_LINE(GPIOB, 11U)
403
#define LINE_SPI_SLAVE2 PAL_LINE(GPIOB, 12U)
404
#define LINE_SPI2_CLK PAL_LINE(GPIOB, 13U)
405
#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U)
406
#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U)
407
408
#define LINE_ADC1 PAL_LINE(GPIOC, 0U)
409
#define LINE_SPI_SLAVE3 PAL_LINE(GPIOC, 3U)
410
#define LINE_GYRO_EXTI_1 PAL_LINE(GPIOC, 4U)
411
#define LINE_UART6_TX PAL_LINE(GPIOC, 6U)
412
#define LINE_UART6_RX PAL_LINE(GPIOC, 7U)
413
#define LINE_UART4_TX PAL_LINE(GPIOC, 10U)
414
#define LINE_UART4_RX PAL_LINE(GPIOC, 11U)
415
#define LINE_UART5_TX PAL_LINE(GPIOC, 12U)
416
#define LINE_SPI_SLAVE4 PAL_LINE(GPIOC, 13U)
417
#define LINE_BEEPER PAL_LINE(GPIOC, 14U)
418
#define LINE_LED1 PAL_LINE(GPIOC, 15U)
419
420
#define LINE_UART5_RX PAL_LINE(GPIOD, 2U)
421
422
#define LINE_OSC_IN PAL_LINE(GPIOH, 0U)
423
#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U)
424
425
426
/*
427
* I/O ports initial setup, this configuration is established soon after reset
428
* in the initialization code.
429
* Please refer to the STM32 Reference Manual for details.
430
*/
431
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
432
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
433
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
434
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
435
#define PIN_ODR_LEVEL_LOW(n) (0U << (n))
436
#define PIN_ODR_LEVEL_HIGH(n) (1U << (n))
437
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
438
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
439
#define PIN_OSPEED_SPEED_VERYLOW(n) (0U << ((n) * 2U))
440
#define PIN_OSPEED_SPEED_LOW(n) (1U << ((n) * 2U))
441
#define PIN_OSPEED_SPEED_MEDIUM(n) (2U << ((n) * 2U))
442
#define PIN_OSPEED_SPEED_HIGH(n) (3U << ((n) * 2U))
443
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
444
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
445
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
446
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
447
448
#define VAL_GPIOA_MODER (PIN_MODE_ALTERNATE(PA00_SERVO4) | \
449
PIN_MODE_ALTERNATE(PA01_SERVO3) | \
450
PIN_MODE_ALTERNATE(PA02_UART2_TX) | \
451
PIN_MODE_ALTERNATE(PA03_UART2_RX) | \
452
PIN_MODE_OUTPUT(PA04_SPI_SLAVE0) | \
453
PIN_MODE_ALTERNATE(PA05_SPI1_CLK) | \
454
PIN_MODE_ALTERNATE(PA06_SPI1_MISO) | \
455
PIN_MODE_ALTERNATE(PA07_SPI1_MOSI) | \
456
PIN_MODE_ALTERNATE(PA08_AUX) | \
457
PIN_MODE_ALTERNATE(PA09_UART1_TX) | \
458
PIN_MODE_ALTERNATE(PA10_UART1_RX) | \
459
PIN_MODE_ALTERNATE(PA11_OTG_FS_DM) | \
460
PIN_MODE_ALTERNATE(PA12_OTG_FS_DP) | \
461
PIN_MODE_ALTERNATE(PA13_SWDIO) | \
462
PIN_MODE_ALTERNATE(PA14_SWCLK) | \
463
PIN_MODE_OUTPUT(PA15_SPI_SLAVE1))
448
#define VAL_GPIOA_MODER (PIN_MODE_ALTERNATE(PA00_SERVO4) | \
…
464
465
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(PA00_SERVO4) | \
466
PIN_OTYPE_PUSHPULL(PA01_SERVO3) | \
467
PIN_OTYPE_PUSHPULL(PA02_UART2_TX) | \
468
PIN_OTYPE_PUSHPULL(PA03_UART2_RX) | \
469
PIN_OTYPE_PUSHPULL(PA04_SPI_SLAVE0) | \
470
PIN_OTYPE_PUSHPULL(PA05_SPI1_CLK) | \
471
PIN_OTYPE_PUSHPULL(PA06_SPI1_MISO) | \
472
PIN_OTYPE_PUSHPULL(PA07_SPI1_MOSI) | \
473
PIN_OTYPE_PUSHPULL(PA08_AUX) | \
474
PIN_OTYPE_PUSHPULL(PA09_UART1_TX) | \
475
PIN_OTYPE_PUSHPULL(PA10_UART1_RX) | \
476
PIN_OTYPE_PUSHPULL(PA11_OTG_FS_DM) | \
477
PIN_OTYPE_PUSHPULL(PA12_OTG_FS_DP) | \
478
PIN_OTYPE_PUSHPULL(PA13_SWDIO) | \
479
PIN_OTYPE_PUSHPULL(PA14_SWCLK) | \
480
PIN_OTYPE_PUSHPULL(PA15_SPI_SLAVE1))
465
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(PA00_SERVO4) | \
…
481
482
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PA00_SERVO4) | \
483
PIN_OSPEED_SPEED_HIGH(PA01_SERVO3) | \
484
PIN_OSPEED_SPEED_HIGH(PA02_UART2_TX) | \
485
PIN_OSPEED_SPEED_HIGH(PA03_UART2_RX) | \
486
PIN_OSPEED_SPEED_HIGH(PA04_SPI_SLAVE0) | \
487
PIN_OSPEED_SPEED_HIGH(PA05_SPI1_CLK) | \
488
PIN_OSPEED_SPEED_HIGH(PA06_SPI1_MISO) | \
489
PIN_OSPEED_SPEED_HIGH(PA07_SPI1_MOSI) | \
490
PIN_OSPEED_SPEED_HIGH(PA08_AUX) | \
491
PIN_OSPEED_SPEED_HIGH(PA09_UART1_TX) | \
492
PIN_OSPEED_SPEED_HIGH(PA10_UART1_RX) | \
493
PIN_OSPEED_SPEED_HIGH(PA11_OTG_FS_DM) | \
494
PIN_OSPEED_SPEED_HIGH(PA12_OTG_FS_DP) | \
495
PIN_OSPEED_SPEED_HIGH(PA13_SWDIO) | \
496
PIN_OSPEED_SPEED_HIGH(PA14_SWCLK) | \
497
PIN_OSPEED_SPEED_HIGH(PA15_SPI_SLAVE1))
482
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PA00_SERVO4) | \
…
498
499
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(PA00_SERVO4) | \
500
PIN_PUPDR_FLOATING(PA01_SERVO3) | \
501
PIN_PUPDR_FLOATING(PA02_UART2_TX) | \
502
PIN_PUPDR_FLOATING(PA03_UART2_RX) | \
503
PIN_PUPDR_FLOATING(PA04_SPI_SLAVE0) | \
504
PIN_PUPDR_FLOATING(PA05_SPI1_CLK) | \
505
PIN_PUPDR_FLOATING(PA06_SPI1_MISO) | \
506
PIN_PUPDR_FLOATING(PA07_SPI1_MOSI) | \
507
PIN_PUPDR_FLOATING(PA08_AUX) | \
508
PIN_PUPDR_FLOATING(PA09_UART1_TX) | \
509
PIN_PUPDR_FLOATING(PA10_UART1_RX) | \
510
PIN_PUPDR_FLOATING(PA11_OTG_FS_DM) | \
511
PIN_PUPDR_FLOATING(PA12_OTG_FS_DP) | \
512
PIN_PUPDR_FLOATING(PA13_SWDIO) | \
513
PIN_PUPDR_FLOATING(PA14_SWCLK) | \
514
PIN_PUPDR_FLOATING(PA15_SPI_SLAVE1))
499
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(PA00_SERVO4) | \
…
515
516
#define VAL_GPIOA_ODR (PIN_ODR_LEVEL_LOW(PA00_SERVO4) | \
517
PIN_ODR_LEVEL_LOW(PA01_SERVO3) | \
518
PIN_ODR_LEVEL_HIGH(PA02_UART2_TX) | \
519
PIN_ODR_LEVEL_HIGH(PA03_UART2_RX) | \
520
PIN_ODR_LEVEL_HIGH(PA04_SPI_SLAVE0) | \
521
PIN_ODR_LEVEL_HIGH(PA05_SPI1_CLK) | \
522
PIN_ODR_LEVEL_HIGH(PA06_SPI1_MISO) | \
523
PIN_ODR_LEVEL_HIGH(PA07_SPI1_MOSI) | \
524
PIN_ODR_LEVEL_LOW(PA08_AUX) | \
525
PIN_ODR_LEVEL_HIGH(PA09_UART1_TX) | \
526
PIN_ODR_LEVEL_HIGH(PA10_UART1_RX) | \
527
PIN_ODR_LEVEL_HIGH(PA11_OTG_FS_DM) | \
528
PIN_ODR_LEVEL_HIGH(PA12_OTG_FS_DP) | \
529
PIN_ODR_LEVEL_HIGH(PA13_SWDIO) | \
530
PIN_ODR_LEVEL_HIGH(PA14_SWCLK) | \
531
PIN_ODR_LEVEL_HIGH(PA15_SPI_SLAVE1))
516
#define VAL_GPIOA_ODR (PIN_ODR_LEVEL_LOW(PA00_SERVO4) | \
…
532
533
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(PA00_SERVO4, 2) | \
534
PIN_AFIO_AF(PA01_SERVO3, 2) | \
535
PIN_AFIO_AF(PA02_UART2_TX, 7) | \
536
PIN_AFIO_AF(PA03_UART2_RX, 7) | \
537
PIN_AFIO_AF(PA04_SPI_SLAVE0, 0) | \
538
PIN_AFIO_AF(PA05_SPI1_CLK, 5) | \
539
PIN_AFIO_AF(PA06_SPI1_MISO, 5) | \
540
PIN_AFIO_AF(PA07_SPI1_MOSI, 5))
533
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(PA00_SERVO4, 2) | \
…
541
542
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(PA08_AUX, 1) | \
543
PIN_AFIO_AF(PA09_UART1_TX, 7) | \
544
PIN_AFIO_AF(PA10_UART1_RX, 7) | \
545
PIN_AFIO_AF(PA11_OTG_FS_DM, 10) | \
546
PIN_AFIO_AF(PA12_OTG_FS_DP, 10) | \
547
PIN_AFIO_AF(PA13_SWDIO, 0) | \
548
PIN_AFIO_AF(PA14_SWCLK, 0) | \
549
PIN_AFIO_AF(PA15_SPI_SLAVE1, 0))
542
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(PA08_AUX, 1) | \
…
550
551
#define VAL_GPIOB_MODER (PIN_MODE_ALTERNATE(PB00_SERVO1) | \
552
PIN_MODE_ALTERNATE(PB01_SERVO2) | \
553
PIN_MODE_INPUT(PB02_GYRO_EXTI_2) | \
554
PIN_MODE_ALTERNATE(PB03_SPI3_CLK) | \
555
PIN_MODE_ALTERNATE(PB04_SPI3_MISO) | \
556
PIN_MODE_ALTERNATE(PB05_SPI3_MOSI) | \
557
PIN_MODE_ALTERNATE(PB06_SERVO5) | \
558
PIN_MODE_ALTERNATE(PB07_SERVO6) | \
559
PIN_MODE_ALTERNATE(PB08_I2C1_SCL) | \
560
PIN_MODE_ALTERNATE(PB09_I2C1_SDA) | \
561
PIN_MODE_ALTERNATE(PB10_UART3_TX) | \
562
PIN_MODE_ALTERNATE(PB11_RC1) | \
563
PIN_MODE_OUTPUT(PB12_SPI_SLAVE2) | \
564
PIN_MODE_ALTERNATE(PB13_SPI2_CLK) | \
565
PIN_MODE_ALTERNATE(PB14_SPI2_MISO) | \
566
PIN_MODE_ALTERNATE(PB15_SPI2_MOSI))
551
#define VAL_GPIOB_MODER (PIN_MODE_ALTERNATE(PB00_SERVO1) | \
…
567
568
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(PB00_SERVO1) | \
569
PIN_OTYPE_PUSHPULL(PB01_SERVO2) | \
570
PIN_OTYPE_OPENDRAIN(PB02_GYRO_EXTI_2) | \
571
PIN_OTYPE_PUSHPULL(PB03_SPI3_CLK) | \
572
PIN_OTYPE_PUSHPULL(PB04_SPI3_MISO) | \
573
PIN_OTYPE_PUSHPULL(PB05_SPI3_MOSI) | \
574
PIN_OTYPE_PUSHPULL(PB06_SERVO5) | \
575
PIN_OTYPE_PUSHPULL(PB07_SERVO6) | \
576
PIN_OTYPE_OPENDRAIN(PB08_I2C1_SCL) | \
577
PIN_OTYPE_OPENDRAIN(PB09_I2C1_SDA) | \
578
PIN_OTYPE_PUSHPULL(PB10_UART3_TX) | \
579
PIN_OTYPE_PUSHPULL(PB11_RC1) | \
580
PIN_OTYPE_PUSHPULL(PB12_SPI_SLAVE2) | \
581
PIN_OTYPE_PUSHPULL(PB13_SPI2_CLK) | \
582
PIN_OTYPE_PUSHPULL(PB14_SPI2_MISO) | \
583
PIN_OTYPE_PUSHPULL(PB15_SPI2_MOSI))
568
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(PB00_SERVO1) | \
…
584
585
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PB00_SERVO1) | \
586
PIN_OSPEED_SPEED_HIGH(PB01_SERVO2) | \
587
PIN_OSPEED_SPEED_VERYLOW(PB02_GYRO_EXTI_2) | \
588
PIN_OSPEED_SPEED_HIGH(PB03_SPI3_CLK) | \
589
PIN_OSPEED_SPEED_HIGH(PB04_SPI3_MISO) | \
590
PIN_OSPEED_SPEED_HIGH(PB05_SPI3_MOSI) | \
591
PIN_OSPEED_SPEED_HIGH(PB06_SERVO5) | \
592
PIN_OSPEED_SPEED_HIGH(PB07_SERVO6) | \
593
PIN_OSPEED_SPEED_HIGH(PB08_I2C1_SCL) | \
594
PIN_OSPEED_SPEED_HIGH(PB09_I2C1_SDA) | \
595
PIN_OSPEED_SPEED_HIGH(PB10_UART3_TX) | \
596
PIN_OSPEED_SPEED_HIGH(PB11_RC1) | \
597
PIN_OSPEED_SPEED_HIGH(PB12_SPI_SLAVE2) | \
598
PIN_OSPEED_SPEED_HIGH(PB13_SPI2_CLK) | \
599
PIN_OSPEED_SPEED_HIGH(PB14_SPI2_MISO) | \
600
PIN_OSPEED_SPEED_HIGH(PB15_SPI2_MOSI))
585
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PB00_SERVO1) | \
…
601
602
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(PB00_SERVO1) | \
603
PIN_PUPDR_FLOATING(PB01_SERVO2) | \
604
PIN_PUPDR_PULLUP(PB02_GYRO_EXTI_2) | \
605
PIN_PUPDR_FLOATING(PB03_SPI3_CLK) | \
606
PIN_PUPDR_FLOATING(PB04_SPI3_MISO) | \
607
PIN_PUPDR_FLOATING(PB05_SPI3_MOSI) | \
608
PIN_PUPDR_FLOATING(PB06_SERVO5) | \
609
PIN_PUPDR_FLOATING(PB07_SERVO6) | \
610
PIN_PUPDR_PULLUP(PB08_I2C1_SCL) | \
611
PIN_PUPDR_PULLUP(PB09_I2C1_SDA) | \
612
PIN_PUPDR_FLOATING(PB10_UART3_TX) | \
613
PIN_PUPDR_FLOATING(PB11_RC1) | \
614
PIN_PUPDR_FLOATING(PB12_SPI_SLAVE2) | \
615
PIN_PUPDR_FLOATING(PB13_SPI2_CLK) | \
616
PIN_PUPDR_FLOATING(PB14_SPI2_MISO) | \
617
PIN_PUPDR_FLOATING(PB15_SPI2_MOSI))
602
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(PB00_SERVO1) | \
…
618
619
#define VAL_GPIOB_ODR (PIN_ODR_LEVEL_LOW(PB00_SERVO1) | \
620
PIN_ODR_LEVEL_LOW(PB01_SERVO2) | \
621
PIN_ODR_LEVEL_LOW(PB02_GYRO_EXTI_2) | \
622
PIN_ODR_LEVEL_HIGH(PB03_SPI3_CLK) | \
623
PIN_ODR_LEVEL_HIGH(PB04_SPI3_MISO) | \
624
PIN_ODR_LEVEL_HIGH(PB05_SPI3_MOSI) | \
625
PIN_ODR_LEVEL_LOW(PB06_SERVO5) | \
626
PIN_ODR_LEVEL_LOW(PB07_SERVO6) | \
627
PIN_ODR_LEVEL_HIGH(PB08_I2C1_SCL) | \
628
PIN_ODR_LEVEL_HIGH(PB09_I2C1_SDA) | \
629
PIN_ODR_LEVEL_HIGH(PB10_UART3_TX) | \
630
PIN_ODR_LEVEL_HIGH(PB11_RC1) | \
631
PIN_ODR_LEVEL_HIGH(PB12_SPI_SLAVE2) | \
632
PIN_ODR_LEVEL_HIGH(PB13_SPI2_CLK) | \
633
PIN_ODR_LEVEL_HIGH(PB14_SPI2_MISO) | \
634
PIN_ODR_LEVEL_HIGH(PB15_SPI2_MOSI))
619
#define VAL_GPIOB_ODR (PIN_ODR_LEVEL_LOW(PB00_SERVO1) | \
…
635
636
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(PB00_SERVO1, 2) | \
637
PIN_AFIO_AF(PB01_SERVO2, 2) | \
638
PIN_AFIO_AF(PB02_GYRO_EXTI_2, 0) | \
639
PIN_AFIO_AF(PB03_SPI3_CLK, 6) | \
640
PIN_AFIO_AF(PB04_SPI3_MISO, 6) | \
641
PIN_AFIO_AF(PB05_SPI3_MOSI, 6) | \
642
PIN_AFIO_AF(PB06_SERVO5, 2) | \
643
PIN_AFIO_AF(PB07_SERVO6, 2))
636
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(PB00_SERVO1, 2) | \
…
644
645
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(PB08_I2C1_SCL, 4) | \
646
PIN_AFIO_AF(PB09_I2C1_SDA, 4) | \
647
PIN_AFIO_AF(PB10_UART3_TX, 7) | \
648
PIN_AFIO_AF(PB11_RC1, 7) | \
649
PIN_AFIO_AF(PB12_SPI_SLAVE2, 0) | \
650
PIN_AFIO_AF(PB13_SPI2_CLK, 5) | \
651
PIN_AFIO_AF(PB14_SPI2_MISO, 5) | \
652
PIN_AFIO_AF(PB15_SPI2_MOSI, 5))
645
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(PB08_I2C1_SCL, 4) | \
…
653
654
#define VAL_GPIOC_MODER (PIN_MODE_ANALOG(PC00_ADC1) | \
655
PIN_MODE_INPUT(PC01) | \
656
PIN_MODE_INPUT(PC02) | \
657
PIN_MODE_OUTPUT(PC03_SPI_SLAVE3) | \
658
PIN_MODE_INPUT(PC04_GYRO_EXTI_1) | \
659
PIN_MODE_INPUT(PC05) | \
660
PIN_MODE_ALTERNATE(PC06_UART6_TX) | \
661
PIN_MODE_ALTERNATE(PC07_UART6_RX) | \
662
PIN_MODE_INPUT(PC08) | \
663
PIN_MODE_INPUT(PC09) | \
664
PIN_MODE_ALTERNATE(PC10_UART4_TX) | \
665
PIN_MODE_ALTERNATE(PC11_UART4_RX) | \
666
PIN_MODE_ALTERNATE(PC12_UART5_TX) | \
667
PIN_MODE_OUTPUT(PC13_SPI_SLAVE4) | \
668
PIN_MODE_OUTPUT(PC14_BEEPER) | \
669
PIN_MODE_OUTPUT(PC15_LED1))
654
#define VAL_GPIOC_MODER (PIN_MODE_ANALOG(PC00_ADC1) | \
…
670
671
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(PC00_ADC1) | \
672
PIN_OTYPE_PUSHPULL(PC01) | \
673
PIN_OTYPE_PUSHPULL(PC02) | \
674
PIN_OTYPE_PUSHPULL(PC03_SPI_SLAVE3) | \
675
PIN_OTYPE_OPENDRAIN(PC04_GYRO_EXTI_1) | \
676
PIN_OTYPE_PUSHPULL(PC05) | \
677
PIN_OTYPE_PUSHPULL(PC06_UART6_TX) | \
678
PIN_OTYPE_PUSHPULL(PC07_UART6_RX) | \
679
PIN_OTYPE_PUSHPULL(PC08) | \
680
PIN_OTYPE_PUSHPULL(PC09) | \
681
PIN_OTYPE_PUSHPULL(PC10_UART4_TX) | \
682
PIN_OTYPE_PUSHPULL(PC11_UART4_RX) | \
683
PIN_OTYPE_PUSHPULL(PC12_UART5_TX) | \
684
PIN_OTYPE_PUSHPULL(PC13_SPI_SLAVE4) | \
685
PIN_OTYPE_PUSHPULL(PC14_BEEPER) | \
686
PIN_OTYPE_PUSHPULL(PC15_LED1))
671
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(PC00_ADC1) | \
…
687
688
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PC00_ADC1) | \
689
PIN_OSPEED_SPEED_VERYLOW(PC01) | \
690
PIN_OSPEED_SPEED_VERYLOW(PC02) | \
691
PIN_OSPEED_SPEED_HIGH(PC03_SPI_SLAVE3) | \
692
PIN_OSPEED_SPEED_VERYLOW(PC04_GYRO_EXTI_1) | \
693
PIN_OSPEED_SPEED_VERYLOW(PC05) | \
694
PIN_OSPEED_SPEED_HIGH(PC06_UART6_TX) | \
695
PIN_OSPEED_SPEED_HIGH(PC07_UART6_RX) | \
696
PIN_OSPEED_SPEED_VERYLOW(PC08) | \
697
PIN_OSPEED_SPEED_VERYLOW(PC09) | \
698
PIN_OSPEED_SPEED_HIGH(PC10_UART4_TX) | \
699
PIN_OSPEED_SPEED_HIGH(PC11_UART4_RX) | \
700
PIN_OSPEED_SPEED_HIGH(PC12_UART5_TX) | \
701
PIN_OSPEED_SPEED_HIGH(PC13_SPI_SLAVE4) | \
702
PIN_OSPEED_SPEED_HIGH(PC14_BEEPER) | \
703
PIN_OSPEED_SPEED_VERYLOW(PC15_LED1))
688
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PC00_ADC1) | \
…
704
705
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(PC00_ADC1) | \
706
PIN_PUPDR_PULLDOWN(PC01) | \
707
PIN_PUPDR_PULLDOWN(PC02) | \
708
PIN_PUPDR_FLOATING(PC03_SPI_SLAVE3) | \
709
PIN_PUPDR_PULLUP(PC04_GYRO_EXTI_1) | \
710
PIN_PUPDR_PULLDOWN(PC05) | \
711
PIN_PUPDR_FLOATING(PC06_UART6_TX) | \
712
PIN_PUPDR_FLOATING(PC07_UART6_RX) | \
713
PIN_PUPDR_PULLDOWN(PC08) | \
714
PIN_PUPDR_PULLDOWN(PC09) | \
715
PIN_PUPDR_FLOATING(PC10_UART4_TX) | \
716
PIN_PUPDR_FLOATING(PC11_UART4_RX) | \
717
PIN_PUPDR_FLOATING(PC12_UART5_TX) | \
718
PIN_PUPDR_FLOATING(PC13_SPI_SLAVE4) | \
719
PIN_PUPDR_FLOATING(PC14_BEEPER) | \
720
PIN_PUPDR_FLOATING(PC15_LED1))
705
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(PC00_ADC1) | \
…
721
722
#define VAL_GPIOC_ODR (PIN_ODR_LEVEL_LOW(PC00_ADC1) | \
723
PIN_ODR_LEVEL_LOW(PC01) | \
724
PIN_ODR_LEVEL_LOW(PC02) | \
725
PIN_ODR_LEVEL_HIGH(PC03_SPI_SLAVE3) | \
726
PIN_ODR_LEVEL_LOW(PC04_GYRO_EXTI_1) | \
727
PIN_ODR_LEVEL_LOW(PC05) | \
728
PIN_ODR_LEVEL_HIGH(PC06_UART6_TX) | \
729
PIN_ODR_LEVEL_HIGH(PC07_UART6_RX) | \
730
PIN_ODR_LEVEL_LOW(PC08) | \
731
PIN_ODR_LEVEL_LOW(PC09) | \
732
PIN_ODR_LEVEL_HIGH(PC10_UART4_TX) | \
733
PIN_ODR_LEVEL_HIGH(PC11_UART4_RX) | \
734
PIN_ODR_LEVEL_HIGH(PC12_UART5_TX) | \
735
PIN_ODR_LEVEL_HIGH(PC13_SPI_SLAVE4) | \
736
PIN_ODR_LEVEL_LOW(PC14_BEEPER) | \
737
PIN_ODR_LEVEL_LOW(PC15_LED1))
722
#define VAL_GPIOC_ODR (PIN_ODR_LEVEL_LOW(PC00_ADC1) | \
…
738
739
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(PC00_ADC1, 0) | \
740
PIN_AFIO_AF(PC01, 0) | \
741
PIN_AFIO_AF(PC02, 0) | \
742
PIN_AFIO_AF(PC03_SPI_SLAVE3, 0) | \
743
PIN_AFIO_AF(PC04_GYRO_EXTI_1, 0) | \
744
PIN_AFIO_AF(PC05, 0) | \
745
PIN_AFIO_AF(PC06_UART6_TX, 8) | \
746
PIN_AFIO_AF(PC07_UART6_RX, 8))
739
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(PC00_ADC1, 0) | \
…
747
748
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(PC08, 0) | \
749
PIN_AFIO_AF(PC09, 0) | \
750
PIN_AFIO_AF(PC10_UART4_TX, 8) | \
751
PIN_AFIO_AF(PC11_UART4_RX, 8) | \
752
PIN_AFIO_AF(PC12_UART5_TX, 8) | \
753
PIN_AFIO_AF(PC13_SPI_SLAVE4, 0) | \
754
PIN_AFIO_AF(PC14_BEEPER, 0) | \
755
PIN_AFIO_AF(PC15_LED1, 0))
748
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(PC08, 0) | \
…
756
757
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(PD00) | \
758
PIN_MODE_INPUT(PD01) | \
759
PIN_MODE_ALTERNATE(PD02_UART5_RX) | \
760
PIN_MODE_INPUT(PD03) | \
761
PIN_MODE_INPUT(PD04) | \
762
PIN_MODE_INPUT(PD05) | \
763
PIN_MODE_INPUT(PD06) | \
764
PIN_MODE_INPUT(PD07) | \
765
PIN_MODE_INPUT(PD08) | \
766
PIN_MODE_INPUT(PD09) | \
767
PIN_MODE_INPUT(PD10) | \
768
PIN_MODE_INPUT(PD11) | \
769
PIN_MODE_INPUT(PD12) | \
770
PIN_MODE_INPUT(PD13) | \
771
PIN_MODE_INPUT(PD14) | \
772
PIN_MODE_INPUT(PD15))
757
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(PD00) | \
…
773
774
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(PD00) | \
775
PIN_OTYPE_PUSHPULL(PD01) | \
776
PIN_OTYPE_PUSHPULL(PD02_UART5_RX) | \
777
PIN_OTYPE_PUSHPULL(PD03) | \
778
PIN_OTYPE_PUSHPULL(PD04) | \
779
PIN_OTYPE_PUSHPULL(PD05) | \
780
PIN_OTYPE_PUSHPULL(PD06) | \
781
PIN_OTYPE_PUSHPULL(PD07) | \
782
PIN_OTYPE_PUSHPULL(PD08) | \
783
PIN_OTYPE_PUSHPULL(PD09) | \
784
PIN_OTYPE_PUSHPULL(PD10) | \
785
PIN_OTYPE_PUSHPULL(PD11) | \
786
PIN_OTYPE_PUSHPULL(PD12) | \
787
PIN_OTYPE_PUSHPULL(PD13) | \
788
PIN_OTYPE_PUSHPULL(PD14) | \
789
PIN_OTYPE_PUSHPULL(PD15))
774
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(PD00) | \
…
790
791
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PD00) | \
792
PIN_OSPEED_SPEED_VERYLOW(PD01) | \
793
PIN_OSPEED_SPEED_HIGH(PD02_UART5_RX) | \
794
PIN_OSPEED_SPEED_VERYLOW(PD03) | \
795
PIN_OSPEED_SPEED_VERYLOW(PD04) | \
796
PIN_OSPEED_SPEED_VERYLOW(PD05) | \
797
PIN_OSPEED_SPEED_VERYLOW(PD06) | \
798
PIN_OSPEED_SPEED_VERYLOW(PD07) | \
799
PIN_OSPEED_SPEED_VERYLOW(PD08) | \
800
PIN_OSPEED_SPEED_VERYLOW(PD09) | \
801
PIN_OSPEED_SPEED_VERYLOW(PD10) | \
802
PIN_OSPEED_SPEED_VERYLOW(PD11) | \
803
PIN_OSPEED_SPEED_VERYLOW(PD12) | \
804
PIN_OSPEED_SPEED_VERYLOW(PD13) | \
805
PIN_OSPEED_SPEED_VERYLOW(PD14) | \
806
PIN_OSPEED_SPEED_VERYLOW(PD15))
791
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PD00) | \
…
807
808
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLDOWN(PD00) | \
809
PIN_PUPDR_PULLDOWN(PD01) | \
810
PIN_PUPDR_FLOATING(PD02_UART5_RX) | \
811
PIN_PUPDR_PULLDOWN(PD03) | \
812
PIN_PUPDR_PULLDOWN(PD04) | \
813
PIN_PUPDR_PULLDOWN(PD05) | \
814
PIN_PUPDR_PULLDOWN(PD06) | \
815
PIN_PUPDR_PULLDOWN(PD07) | \
816
PIN_PUPDR_PULLDOWN(PD08) | \
817
PIN_PUPDR_PULLDOWN(PD09) | \
818
PIN_PUPDR_PULLDOWN(PD10) | \
819
PIN_PUPDR_PULLDOWN(PD11) | \
820
PIN_PUPDR_PULLDOWN(PD12) | \
821
PIN_PUPDR_PULLDOWN(PD13) | \
822
PIN_PUPDR_PULLDOWN(PD14) | \
823
PIN_PUPDR_PULLDOWN(PD15))
808
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLDOWN(PD00) | \
…
824
825
#define VAL_GPIOD_ODR (PIN_ODR_LEVEL_LOW(PD00) | \
826
PIN_ODR_LEVEL_LOW(PD01) | \
827
PIN_ODR_LEVEL_HIGH(PD02_UART5_RX) | \
828
PIN_ODR_LEVEL_LOW(PD03) | \
829
PIN_ODR_LEVEL_LOW(PD04) | \
830
PIN_ODR_LEVEL_LOW(PD05) | \
831
PIN_ODR_LEVEL_LOW(PD06) | \
832
PIN_ODR_LEVEL_LOW(PD07) | \
833
PIN_ODR_LEVEL_LOW(PD08) | \
834
PIN_ODR_LEVEL_LOW(PD09) | \
835
PIN_ODR_LEVEL_LOW(PD10) | \
836
PIN_ODR_LEVEL_LOW(PD11) | \
837
PIN_ODR_LEVEL_LOW(PD12) | \
838
PIN_ODR_LEVEL_LOW(PD13) | \
839
PIN_ODR_LEVEL_LOW(PD14) | \
840
PIN_ODR_LEVEL_LOW(PD15))
825
#define VAL_GPIOD_ODR (PIN_ODR_LEVEL_LOW(PD00) | \
…
841
842
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(PD00, 0) | \
843
PIN_AFIO_AF(PD01, 0) | \
844
PIN_AFIO_AF(PD02_UART5_RX, 8) | \
845
PIN_AFIO_AF(PD03, 0) | \
846
PIN_AFIO_AF(PD04, 0) | \
847
PIN_AFIO_AF(PD05, 0) | \
848
PIN_AFIO_AF(PD06, 0) | \
849
PIN_AFIO_AF(PD07, 0))
842
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(PD00, 0) | \
…
850
851
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(PD08, 0) | \
852
PIN_AFIO_AF(PD09, 0) | \
853
PIN_AFIO_AF(PD10, 0) | \
854
PIN_AFIO_AF(PD11, 0) | \
855
PIN_AFIO_AF(PD12, 0) | \
856
PIN_AFIO_AF(PD13, 0) | \
857
PIN_AFIO_AF(PD14, 0) | \
858
PIN_AFIO_AF(PD15, 0))
851
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(PD08, 0) | \
…
859
860
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(PE00) | \
861
PIN_MODE_INPUT(PE01) | \
862
PIN_MODE_INPUT(PE02) | \
863
PIN_MODE_INPUT(PE03) | \
864
PIN_MODE_INPUT(PE04) | \
865
PIN_MODE_INPUT(PE05) | \
866
PIN_MODE_INPUT(PE06) | \
867
PIN_MODE_INPUT(PE07) | \
868
PIN_MODE_INPUT(PE08) | \
869
PIN_MODE_INPUT(PE09) | \
870
PIN_MODE_INPUT(PE10) | \
871
PIN_MODE_INPUT(PE11) | \
872
PIN_MODE_INPUT(PE12) | \
873
PIN_MODE_INPUT(PE13) | \
874
PIN_MODE_INPUT(PE14) | \
875
PIN_MODE_INPUT(PE15))
860
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(PE00) | \
…
876
877
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(PE00) | \
878
PIN_OTYPE_PUSHPULL(PE01) | \
879
PIN_OTYPE_PUSHPULL(PE02) | \
880
PIN_OTYPE_PUSHPULL(PE03) | \
881
PIN_OTYPE_PUSHPULL(PE04) | \
882
PIN_OTYPE_PUSHPULL(PE05) | \
883
PIN_OTYPE_PUSHPULL(PE06) | \
884
PIN_OTYPE_PUSHPULL(PE07) | \
885
PIN_OTYPE_PUSHPULL(PE08) | \
886
PIN_OTYPE_PUSHPULL(PE09) | \
887
PIN_OTYPE_PUSHPULL(PE10) | \
888
PIN_OTYPE_PUSHPULL(PE11) | \
889
PIN_OTYPE_PUSHPULL(PE12) | \
890
PIN_OTYPE_PUSHPULL(PE13) | \
891
PIN_OTYPE_PUSHPULL(PE14) | \
892
PIN_OTYPE_PUSHPULL(PE15))
877
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(PE00) | \
…
893
894
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PE00) | \
895
PIN_OSPEED_SPEED_VERYLOW(PE01) | \
896
PIN_OSPEED_SPEED_VERYLOW(PE02) | \
897
PIN_OSPEED_SPEED_VERYLOW(PE03) | \
898
PIN_OSPEED_SPEED_VERYLOW(PE04) | \
899
PIN_OSPEED_SPEED_VERYLOW(PE05) | \
900
PIN_OSPEED_SPEED_VERYLOW(PE06) | \
901
PIN_OSPEED_SPEED_VERYLOW(PE07) | \
902
PIN_OSPEED_SPEED_VERYLOW(PE08) | \
903
PIN_OSPEED_SPEED_VERYLOW(PE09) | \
904
PIN_OSPEED_SPEED_VERYLOW(PE10) | \
905
PIN_OSPEED_SPEED_VERYLOW(PE11) | \
906
PIN_OSPEED_SPEED_VERYLOW(PE12) | \
907
PIN_OSPEED_SPEED_VERYLOW(PE13) | \
908
PIN_OSPEED_SPEED_VERYLOW(PE14) | \
909
PIN_OSPEED_SPEED_VERYLOW(PE15))
894
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PE00) | \
…
910
911
#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLDOWN(PE00) | \
912
PIN_PUPDR_PULLDOWN(PE01) | \
913
PIN_PUPDR_PULLDOWN(PE02) | \
914
PIN_PUPDR_PULLDOWN(PE03) | \
915
PIN_PUPDR_PULLDOWN(PE04) | \
916
PIN_PUPDR_PULLDOWN(PE05) | \
917
PIN_PUPDR_PULLDOWN(PE06) | \
918
PIN_PUPDR_PULLDOWN(PE07) | \
919
PIN_PUPDR_PULLDOWN(PE08) | \
920
PIN_PUPDR_PULLDOWN(PE09) | \
921
PIN_PUPDR_PULLDOWN(PE10) | \
922
PIN_PUPDR_PULLDOWN(PE11) | \
923
PIN_PUPDR_PULLDOWN(PE12) | \
924
PIN_PUPDR_PULLDOWN(PE13) | \
925
PIN_PUPDR_PULLDOWN(PE14) | \
926
PIN_PUPDR_PULLDOWN(PE15))
911
#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLDOWN(PE00) | \
…
927
928
#define VAL_GPIOE_ODR (PIN_ODR_LEVEL_LOW(PE00) | \
929
PIN_ODR_LEVEL_LOW(PE01) | \
930
PIN_ODR_LEVEL_LOW(PE02) | \
931
PIN_ODR_LEVEL_LOW(PE03) | \
932
PIN_ODR_LEVEL_LOW(PE04) | \
933
PIN_ODR_LEVEL_LOW(PE05) | \
934
PIN_ODR_LEVEL_LOW(PE06) | \
935
PIN_ODR_LEVEL_LOW(PE07) | \
936
PIN_ODR_LEVEL_LOW(PE08) | \
937
PIN_ODR_LEVEL_LOW(PE09) | \
938
PIN_ODR_LEVEL_LOW(PE10) | \
939
PIN_ODR_LEVEL_LOW(PE11) | \
940
PIN_ODR_LEVEL_LOW(PE12) | \
941
PIN_ODR_LEVEL_LOW(PE13) | \
942
PIN_ODR_LEVEL_LOW(PE14) | \
943
PIN_ODR_LEVEL_LOW(PE15))
928
#define VAL_GPIOE_ODR (PIN_ODR_LEVEL_LOW(PE00) | \
…
944
945
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(PE00, 0) | \
946
PIN_AFIO_AF(PE01, 0) | \
947
PIN_AFIO_AF(PE02, 0) | \
948
PIN_AFIO_AF(PE03, 0) | \
949
PIN_AFIO_AF(PE04, 0) | \
950
PIN_AFIO_AF(PE05, 0) | \
951
PIN_AFIO_AF(PE06, 0) | \
952
PIN_AFIO_AF(PE07, 0))
945
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(PE00, 0) | \
…
953
954
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(PE08, 0) | \
955
PIN_AFIO_AF(PE09, 0) | \
956
PIN_AFIO_AF(PE10, 0) | \
957
PIN_AFIO_AF(PE11, 0) | \
958
PIN_AFIO_AF(PE12, 0) | \
959
PIN_AFIO_AF(PE13, 0) | \
960
PIN_AFIO_AF(PE14, 0) | \
961
PIN_AFIO_AF(PE15, 0))
954
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(PE08, 0) | \
…
962
963
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(PF00) | \
964
PIN_MODE_INPUT(PF01) | \
965
PIN_MODE_INPUT(PF02) | \
966
PIN_MODE_INPUT(PF03) | \
967
PIN_MODE_INPUT(PF04) | \
968
PIN_MODE_INPUT(PF05) | \
969
PIN_MODE_INPUT(PF06) | \
970
PIN_MODE_INPUT(PF07) | \
971
PIN_MODE_INPUT(PF08) | \
972
PIN_MODE_INPUT(PF09) | \
973
PIN_MODE_INPUT(PF10) | \
974
PIN_MODE_INPUT(PF11) | \
975
PIN_MODE_INPUT(PF12) | \
976
PIN_MODE_INPUT(PF13) | \
977
PIN_MODE_INPUT(PF14) | \
978
PIN_MODE_INPUT(PF15))
963
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(PF00) | \
…
979
980
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(PF00) | \
981
PIN_OTYPE_PUSHPULL(PF01) | \
982
PIN_OTYPE_PUSHPULL(PF02) | \
983
PIN_OTYPE_PUSHPULL(PF03) | \
984
PIN_OTYPE_PUSHPULL(PF04) | \
985
PIN_OTYPE_PUSHPULL(PF05) | \
986
PIN_OTYPE_PUSHPULL(PF06) | \
987
PIN_OTYPE_PUSHPULL(PF07) | \
988
PIN_OTYPE_PUSHPULL(PF08) | \
989
PIN_OTYPE_PUSHPULL(PF09) | \
990
PIN_OTYPE_PUSHPULL(PF10) | \
991
PIN_OTYPE_PUSHPULL(PF11) | \
992
PIN_OTYPE_PUSHPULL(PF12) | \
993
PIN_OTYPE_PUSHPULL(PF13) | \
994
PIN_OTYPE_PUSHPULL(PF14) | \
995
PIN_OTYPE_PUSHPULL(PF15))
980
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(PF00) | \
…
996
997
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PF00) | \
998
PIN_OSPEED_SPEED_VERYLOW(PF01) | \
999
PIN_OSPEED_SPEED_VERYLOW(PF02) | \
1000
PIN_OSPEED_SPEED_VERYLOW(PF03) | \
1001
PIN_OSPEED_SPEED_VERYLOW(PF04) | \
1002
PIN_OSPEED_SPEED_VERYLOW(PF05) | \
1003
PIN_OSPEED_SPEED_VERYLOW(PF06) | \
1004
PIN_OSPEED_SPEED_VERYLOW(PF07) | \
1005
PIN_OSPEED_SPEED_VERYLOW(PF08) | \
1006
PIN_OSPEED_SPEED_VERYLOW(PF09) | \
1007
PIN_OSPEED_SPEED_VERYLOW(PF10) | \
1008
PIN_OSPEED_SPEED_VERYLOW(PF11) | \
1009
PIN_OSPEED_SPEED_VERYLOW(PF12) | \
1010
PIN_OSPEED_SPEED_VERYLOW(PF13) | \
1011
PIN_OSPEED_SPEED_VERYLOW(PF14) | \
1012
PIN_OSPEED_SPEED_VERYLOW(PF15))
997
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PF00) | \
…
1013
1014
#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLDOWN(PF00) | \
1015
PIN_PUPDR_PULLDOWN(PF01) | \
1016
PIN_PUPDR_PULLDOWN(PF02) | \
1017
PIN_PUPDR_PULLDOWN(PF03) | \
1018
PIN_PUPDR_PULLDOWN(PF04) | \
1019
PIN_PUPDR_PULLDOWN(PF05) | \
1020
PIN_PUPDR_PULLDOWN(PF06) | \
1021
PIN_PUPDR_PULLDOWN(PF07) | \
1022
PIN_PUPDR_PULLDOWN(PF08) | \
1023
PIN_PUPDR_PULLDOWN(PF09) | \
1024
PIN_PUPDR_PULLDOWN(PF10) | \
1025
PIN_PUPDR_PULLDOWN(PF11) | \
1026
PIN_PUPDR_PULLDOWN(PF12) | \
1027
PIN_PUPDR_PULLDOWN(PF13) | \
1028
PIN_PUPDR_PULLDOWN(PF14) | \
1029
PIN_PUPDR_PULLDOWN(PF15))
1014
#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLDOWN(PF00) | \
…
1030
1031
#define VAL_GPIOF_ODR (PIN_ODR_LEVEL_LOW(PF00) | \
1032
PIN_ODR_LEVEL_LOW(PF01) | \
1033
PIN_ODR_LEVEL_LOW(PF02) | \
1034
PIN_ODR_LEVEL_LOW(PF03) | \
1035
PIN_ODR_LEVEL_LOW(PF04) | \
1036
PIN_ODR_LEVEL_LOW(PF05) | \
1037
PIN_ODR_LEVEL_LOW(PF06) | \
1038
PIN_ODR_LEVEL_LOW(PF07) | \
1039
PIN_ODR_LEVEL_LOW(PF08) | \
1040
PIN_ODR_LEVEL_LOW(PF09) | \
1041
PIN_ODR_LEVEL_LOW(PF10) | \
1042
PIN_ODR_LEVEL_LOW(PF11) | \
1043
PIN_ODR_LEVEL_LOW(PF12) | \
1044
PIN_ODR_LEVEL_LOW(PF13) | \
1045
PIN_ODR_LEVEL_LOW(PF14) | \
1046
PIN_ODR_LEVEL_LOW(PF15))
1031
#define VAL_GPIOF_ODR (PIN_ODR_LEVEL_LOW(PF00) | \
…
1047
1048
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(PF00, 0) | \
1049
PIN_AFIO_AF(PF01, 0) | \
1050
PIN_AFIO_AF(PF02, 0) | \
1051
PIN_AFIO_AF(PF03, 0) | \
1052
PIN_AFIO_AF(PF04, 0) | \
1053
PIN_AFIO_AF(PF05, 0) | \
1054
PIN_AFIO_AF(PF06, 0) | \
1055
PIN_AFIO_AF(PF07, 0))
1048
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(PF00, 0) | \
…
1056
1057
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(PF08, 0) | \
1058
PIN_AFIO_AF(PF09, 0) | \
1059
PIN_AFIO_AF(PF10, 0) | \
1060
PIN_AFIO_AF(PF11, 0) | \
1061
PIN_AFIO_AF(PF12, 0) | \
1062
PIN_AFIO_AF(PF13, 0) | \
1063
PIN_AFIO_AF(PF14, 0) | \
1064
PIN_AFIO_AF(PF15, 0))
1057
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(PF08, 0) | \
…
1065
1066
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(PG00) | \
1067
PIN_MODE_INPUT(PG01) | \
1068
PIN_MODE_INPUT(PG02) | \
1069
PIN_MODE_INPUT(PG03) | \
1070
PIN_MODE_INPUT(PG04) | \
1071
PIN_MODE_INPUT(PG05) | \
1072
PIN_MODE_INPUT(PG06) | \
1073
PIN_MODE_INPUT(PG07) | \
1074
PIN_MODE_INPUT(PG08) | \
1075
PIN_MODE_INPUT(PG09) | \
1076
PIN_MODE_INPUT(PG10) | \
1077
PIN_MODE_INPUT(PG11) | \
1078
PIN_MODE_INPUT(PG12) | \
1079
PIN_MODE_INPUT(PG13) | \
1080
PIN_MODE_INPUT(PG14) | \
1081
PIN_MODE_INPUT(PG15))
1066
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(PG00) | \
…
1082
1083
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(PG00) | \
1084
PIN_OTYPE_PUSHPULL(PG01) | \
1085
PIN_OTYPE_PUSHPULL(PG02) | \
1086
PIN_OTYPE_PUSHPULL(PG03) | \
1087
PIN_OTYPE_PUSHPULL(PG04) | \
1088
PIN_OTYPE_PUSHPULL(PG05) | \
1089
PIN_OTYPE_PUSHPULL(PG06) | \
1090
PIN_OTYPE_PUSHPULL(PG07) | \
1091
PIN_OTYPE_PUSHPULL(PG08) | \
1092
PIN_OTYPE_PUSHPULL(PG09) | \
1093
PIN_OTYPE_PUSHPULL(PG10) | \
1094
PIN_OTYPE_PUSHPULL(PG11) | \
1095
PIN_OTYPE_PUSHPULL(PG12) | \
1096
PIN_OTYPE_PUSHPULL(PG13) | \
1097
PIN_OTYPE_PUSHPULL(PG14) | \
1098
PIN_OTYPE_PUSHPULL(PG15))
1083
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(PG00) | \
…
1099
1100
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PG00) | \
1101
PIN_OSPEED_SPEED_VERYLOW(PG01) | \
1102
PIN_OSPEED_SPEED_VERYLOW(PG02) | \
1103
PIN_OSPEED_SPEED_VERYLOW(PG03) | \
1104
PIN_OSPEED_SPEED_VERYLOW(PG04) | \
1105
PIN_OSPEED_SPEED_VERYLOW(PG05) | \
1106
PIN_OSPEED_SPEED_VERYLOW(PG06) | \
1107
PIN_OSPEED_SPEED_VERYLOW(PG07) | \
1108
PIN_OSPEED_SPEED_VERYLOW(PG08) | \
1109
PIN_OSPEED_SPEED_VERYLOW(PG09) | \
1110
PIN_OSPEED_SPEED_VERYLOW(PG10) | \
1111
PIN_OSPEED_SPEED_VERYLOW(PG11) | \
1112
PIN_OSPEED_SPEED_VERYLOW(PG12) | \
1113
PIN_OSPEED_SPEED_VERYLOW(PG13) | \
1114
PIN_OSPEED_SPEED_VERYLOW(PG14) | \
1115
PIN_OSPEED_SPEED_VERYLOW(PG15))
1100
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PG00) | \
…
1116
1117
#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLDOWN(PG00) | \
1118
PIN_PUPDR_PULLDOWN(PG01) | \
1119
PIN_PUPDR_PULLDOWN(PG02) | \
1120
PIN_PUPDR_PULLDOWN(PG03) | \
1121
PIN_PUPDR_PULLDOWN(PG04) | \
1122
PIN_PUPDR_PULLDOWN(PG05) | \
1123
PIN_PUPDR_PULLDOWN(PG06) | \
1124
PIN_PUPDR_PULLDOWN(PG07) | \
1125
PIN_PUPDR_PULLDOWN(PG08) | \
1126
PIN_PUPDR_PULLDOWN(PG09) | \
1127
PIN_PUPDR_PULLDOWN(PG10) | \
1128
PIN_PUPDR_PULLDOWN(PG11) | \
1129
PIN_PUPDR_PULLDOWN(PG12) | \
1130
PIN_PUPDR_PULLDOWN(PG13) | \
1131
PIN_PUPDR_PULLDOWN(PG14) | \
1132
PIN_PUPDR_PULLDOWN(PG15))
1117
#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLDOWN(PG00) | \
…
1133
1134
#define VAL_GPIOG_ODR (PIN_ODR_LEVEL_LOW(PG00) | \
1135
PIN_ODR_LEVEL_LOW(PG01) | \
1136
PIN_ODR_LEVEL_LOW(PG02) | \
1137
PIN_ODR_LEVEL_LOW(PG03) | \
1138
PIN_ODR_LEVEL_LOW(PG04) | \
1139
PIN_ODR_LEVEL_LOW(PG05) | \
1140
PIN_ODR_LEVEL_LOW(PG06) | \
1141
PIN_ODR_LEVEL_LOW(PG07) | \
1142
PIN_ODR_LEVEL_LOW(PG08) | \
1143
PIN_ODR_LEVEL_LOW(PG09) | \
1144
PIN_ODR_LEVEL_LOW(PG10) | \
1145
PIN_ODR_LEVEL_LOW(PG11) | \
1146
PIN_ODR_LEVEL_LOW(PG12) | \
1147
PIN_ODR_LEVEL_LOW(PG13) | \
1148
PIN_ODR_LEVEL_LOW(PG14) | \
1149
PIN_ODR_LEVEL_LOW(PG15))
1134
#define VAL_GPIOG_ODR (PIN_ODR_LEVEL_LOW(PG00) | \
…
1150
1151
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(PG00, 0) | \
1152
PIN_AFIO_AF(PG01, 0) | \
1153
PIN_AFIO_AF(PG02, 0) | \
1154
PIN_AFIO_AF(PG03, 0) | \
1155
PIN_AFIO_AF(PG04, 0) | \
1156
PIN_AFIO_AF(PG05, 0) | \
1157
PIN_AFIO_AF(PG06, 0) | \
1158
PIN_AFIO_AF(PG07, 0))
1151
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(PG00, 0) | \
…
1159
1160
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(PG08, 0) | \
1161
PIN_AFIO_AF(PG09, 0) | \
1162
PIN_AFIO_AF(PG10, 0) | \
1163
PIN_AFIO_AF(PG11, 0) | \
1164
PIN_AFIO_AF(PG12, 0) | \
1165
PIN_AFIO_AF(PG13, 0) | \
1166
PIN_AFIO_AF(PG14, 0) | \
1167
PIN_AFIO_AF(PG15, 0))
1160
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(PG08, 0) | \
…
1168
1169
#define VAL_GPIOH_MODER (PIN_MODE_ALTERNATE(PH00_OSC_IN) | \
1170
PIN_MODE_ALTERNATE(PH01_OSC_OUT) | \
1171
PIN_MODE_INPUT(PH02) | \
1172
PIN_MODE_INPUT(PH03) | \
1173
PIN_MODE_INPUT(PH04) | \
1174
PIN_MODE_INPUT(PH05) | \
1175
PIN_MODE_INPUT(PH06) | \
1176
PIN_MODE_INPUT(PH07) | \
1177
PIN_MODE_INPUT(PH08) | \
1178
PIN_MODE_INPUT(PH09) | \
1179
PIN_MODE_INPUT(PH10) | \
1180
PIN_MODE_INPUT(PH11) | \
1181
PIN_MODE_INPUT(PH12) | \
1182
PIN_MODE_INPUT(PH13) | \
1183
PIN_MODE_INPUT(PH14) | \
1184
PIN_MODE_INPUT(PH15))
1169
#define VAL_GPIOH_MODER (PIN_MODE_ALTERNATE(PH00_OSC_IN) | \
…
1185
1186
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(PH00_OSC_IN) | \
1187
PIN_OTYPE_PUSHPULL(PH01_OSC_OUT) | \
1188
PIN_OTYPE_PUSHPULL(PH02) | \
1189
PIN_OTYPE_PUSHPULL(PH03) | \
1190
PIN_OTYPE_PUSHPULL(PH04) | \
1191
PIN_OTYPE_PUSHPULL(PH05) | \
1192
PIN_OTYPE_PUSHPULL(PH06) | \
1193
PIN_OTYPE_PUSHPULL(PH07) | \
1194
PIN_OTYPE_PUSHPULL(PH08) | \
1195
PIN_OTYPE_PUSHPULL(PH09) | \
1196
PIN_OTYPE_PUSHPULL(PH10) | \
1197
PIN_OTYPE_PUSHPULL(PH11) | \
1198
PIN_OTYPE_PUSHPULL(PH12) | \
1199
PIN_OTYPE_PUSHPULL(PH13) | \
1200
PIN_OTYPE_PUSHPULL(PH14) | \
1201
PIN_OTYPE_PUSHPULL(PH15))
1186
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(PH00_OSC_IN) | \
…
1202
1203
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PH00_OSC_IN) | \
1204
PIN_OSPEED_SPEED_HIGH(PH01_OSC_OUT) | \
1205
PIN_OSPEED_SPEED_VERYLOW(PH02) | \
1206
PIN_OSPEED_SPEED_VERYLOW(PH03) | \
1207
PIN_OSPEED_SPEED_VERYLOW(PH04) | \
1208
PIN_OSPEED_SPEED_VERYLOW(PH05) | \
1209
PIN_OSPEED_SPEED_VERYLOW(PH06) | \
1210
PIN_OSPEED_SPEED_VERYLOW(PH07) | \
1211
PIN_OSPEED_SPEED_VERYLOW(PH08) | \
1212
PIN_OSPEED_SPEED_VERYLOW(PH09) | \
1213
PIN_OSPEED_SPEED_VERYLOW(PH10) | \
1214
PIN_OSPEED_SPEED_VERYLOW(PH11) | \
1215
PIN_OSPEED_SPEED_VERYLOW(PH12) | \
1216
PIN_OSPEED_SPEED_VERYLOW(PH13) | \
1217
PIN_OSPEED_SPEED_VERYLOW(PH14) | \
1218
PIN_OSPEED_SPEED_VERYLOW(PH15))
1203
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PH00_OSC_IN) | \
…
1219
1220
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(PH00_OSC_IN) | \
1221
PIN_PUPDR_FLOATING(PH01_OSC_OUT) | \
1222
PIN_PUPDR_PULLDOWN(PH02) | \
1223
PIN_PUPDR_PULLDOWN(PH03) | \
1224
PIN_PUPDR_PULLDOWN(PH04) | \
1225
PIN_PUPDR_PULLDOWN(PH05) | \
1226
PIN_PUPDR_PULLDOWN(PH06) | \
1227
PIN_PUPDR_PULLDOWN(PH07) | \
1228
PIN_PUPDR_PULLDOWN(PH08) | \
1229
PIN_PUPDR_PULLDOWN(PH09) | \
1230
PIN_PUPDR_PULLDOWN(PH10) | \
1231
PIN_PUPDR_PULLDOWN(PH11) | \
1232
PIN_PUPDR_PULLDOWN(PH12) | \
1233
PIN_PUPDR_PULLDOWN(PH13) | \
1234
PIN_PUPDR_PULLDOWN(PH14) | \
1235
PIN_PUPDR_PULLDOWN(PH15))
1220
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(PH00_OSC_IN) | \
…
1236
1237
#define VAL_GPIOH_ODR (PIN_ODR_LEVEL_HIGH(PH00_OSC_IN) | \
1238
PIN_ODR_LEVEL_HIGH(PH01_OSC_OUT) | \
1239
PIN_ODR_LEVEL_LOW(PH02) | \
1240
PIN_ODR_LEVEL_LOW(PH03) | \
1241
PIN_ODR_LEVEL_LOW(PH04) | \
1242
PIN_ODR_LEVEL_LOW(PH05) | \
1243
PIN_ODR_LEVEL_LOW(PH06) | \
1244
PIN_ODR_LEVEL_LOW(PH07) | \
1245
PIN_ODR_LEVEL_LOW(PH08) | \
1246
PIN_ODR_LEVEL_LOW(PH09) | \
1247
PIN_ODR_LEVEL_LOW(PH10) | \
1248
PIN_ODR_LEVEL_LOW(PH11) | \
1249
PIN_ODR_LEVEL_LOW(PH12) | \
1250
PIN_ODR_LEVEL_LOW(PH13) | \
1251
PIN_ODR_LEVEL_LOW(PH14) | \
1252
PIN_ODR_LEVEL_LOW(PH15))
1237
#define VAL_GPIOH_ODR (PIN_ODR_LEVEL_HIGH(PH00_OSC_IN) | \
…
1253
1254
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(PH00_OSC_IN, 0) | \
1255
PIN_AFIO_AF(PH01_OSC_OUT, 0) | \
1256
PIN_AFIO_AF(PH02, 0) | \
1257
PIN_AFIO_AF(PH03, 0) | \
1258
PIN_AFIO_AF(PH04, 0) | \
1259
PIN_AFIO_AF(PH05, 0) | \
1260
PIN_AFIO_AF(PH06, 0) | \
1261
PIN_AFIO_AF(PH07, 0))
1254
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(PH00_OSC_IN, 0) | \
…
1262
1263
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(PH08, 0) | \
1264
PIN_AFIO_AF(PH09, 0) | \
1265
PIN_AFIO_AF(PH10, 0) | \
1266
PIN_AFIO_AF(PH11, 0) | \
1267
PIN_AFIO_AF(PH12, 0) | \
1268
PIN_AFIO_AF(PH13, 0) | \
1269
PIN_AFIO_AF(PH14, 0) | \
1270
PIN_AFIO_AF(PH15, 0))
1263
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(PH08, 0) | \
…
1271
1272
#define VAL_GPIOI_MODER (PIN_MODE_INPUT(PI00) | \
1273
PIN_MODE_INPUT(PI01) | \
1274
PIN_MODE_INPUT(PI02) | \
1275
PIN_MODE_INPUT(PI03) | \
1276
PIN_MODE_INPUT(PI04) | \
1277
PIN_MODE_INPUT(PI05) | \
1278
PIN_MODE_INPUT(PI06) | \
1279
PIN_MODE_INPUT(PI07) | \
1280
PIN_MODE_INPUT(PI08) | \
1281
PIN_MODE_INPUT(PI09) | \
1282
PIN_MODE_INPUT(PI10) | \
1283
PIN_MODE_INPUT(PI11) | \
1284
PIN_MODE_INPUT(PI12) | \
1285
PIN_MODE_INPUT(PI13) | \
1286
PIN_MODE_INPUT(PI14) | \
1287
PIN_MODE_INPUT(PI15))
1272
#define VAL_GPIOI_MODER (PIN_MODE_INPUT(PI00) | \
…
1288
1289
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(PI00) | \
1290
PIN_OTYPE_PUSHPULL(PI01) | \
1291
PIN_OTYPE_PUSHPULL(PI02) | \
1292
PIN_OTYPE_PUSHPULL(PI03) | \
1293
PIN_OTYPE_PUSHPULL(PI04) | \
1294
PIN_OTYPE_PUSHPULL(PI05) | \
1295
PIN_OTYPE_PUSHPULL(PI06) | \
1296
PIN_OTYPE_PUSHPULL(PI07) | \
1297
PIN_OTYPE_PUSHPULL(PI08) | \
1298
PIN_OTYPE_PUSHPULL(PI09) | \
1299
PIN_OTYPE_PUSHPULL(PI10) | \
1300
PIN_OTYPE_PUSHPULL(PI11) | \
1301
PIN_OTYPE_PUSHPULL(PI12) | \
1302
PIN_OTYPE_PUSHPULL(PI13) | \
1303
PIN_OTYPE_PUSHPULL(PI14) | \
1304
PIN_OTYPE_PUSHPULL(PI15))
1289
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(PI00) | \
…
1305
1306
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PI00) | \
1307
PIN_OSPEED_SPEED_VERYLOW(PI01) | \
1308
PIN_OSPEED_SPEED_VERYLOW(PI02) | \
1309
PIN_OSPEED_SPEED_VERYLOW(PI03) | \
1310
PIN_OSPEED_SPEED_VERYLOW(PI04) | \
1311
PIN_OSPEED_SPEED_VERYLOW(PI05) | \
1312
PIN_OSPEED_SPEED_VERYLOW(PI06) | \
1313
PIN_OSPEED_SPEED_VERYLOW(PI07) | \
1314
PIN_OSPEED_SPEED_VERYLOW(PI08) | \
1315
PIN_OSPEED_SPEED_VERYLOW(PI09) | \
1316
PIN_OSPEED_SPEED_VERYLOW(PI10) | \
1317
PIN_OSPEED_SPEED_VERYLOW(PI11) | \
1318
PIN_OSPEED_SPEED_VERYLOW(PI12) | \
1319
PIN_OSPEED_SPEED_VERYLOW(PI13) | \
1320
PIN_OSPEED_SPEED_VERYLOW(PI14) | \
1321
PIN_OSPEED_SPEED_VERYLOW(PI15))
1306
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PI00) | \
…
1322
1323
#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLDOWN(PI00) | \
1324
PIN_PUPDR_PULLDOWN(PI01) | \
1325
PIN_PUPDR_PULLDOWN(PI02) | \
1326
PIN_PUPDR_PULLDOWN(PI03) | \
1327
PIN_PUPDR_PULLDOWN(PI04) | \
1328
PIN_PUPDR_PULLDOWN(PI05) | \
1329
PIN_PUPDR_PULLDOWN(PI06) | \
1330
PIN_PUPDR_PULLDOWN(PI07) | \
1331
PIN_PUPDR_PULLDOWN(PI08) | \
1332
PIN_PUPDR_PULLDOWN(PI09) | \
1333
PIN_PUPDR_PULLDOWN(PI10) | \
1334
PIN_PUPDR_PULLDOWN(PI11) | \
1335
PIN_PUPDR_PULLDOWN(PI12) | \
1336
PIN_PUPDR_PULLDOWN(PI13) | \
1337
PIN_PUPDR_PULLDOWN(PI14) | \
1338
PIN_PUPDR_PULLDOWN(PI15))
1323
#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLDOWN(PI00) | \
…
1339
1340
#define VAL_GPIOI_ODR (PIN_ODR_LEVEL_LOW(PI00) | \
1341
PIN_ODR_LEVEL_LOW(PI01) | \
1342
PIN_ODR_LEVEL_LOW(PI02) | \
1343
PIN_ODR_LEVEL_LOW(PI03) | \
1344
PIN_ODR_LEVEL_LOW(PI04) | \
1345
PIN_ODR_LEVEL_LOW(PI05) | \
1346
PIN_ODR_LEVEL_LOW(PI06) | \
1347
PIN_ODR_LEVEL_LOW(PI07) | \
1348
PIN_ODR_LEVEL_LOW(PI08) | \
1349
PIN_ODR_LEVEL_LOW(PI09) | \
1350
PIN_ODR_LEVEL_LOW(PI10) | \
1351
PIN_ODR_LEVEL_LOW(PI11) | \
1352
PIN_ODR_LEVEL_LOW(PI12) | \
1353
PIN_ODR_LEVEL_LOW(PI13) | \
1354
PIN_ODR_LEVEL_LOW(PI14) | \
1355
PIN_ODR_LEVEL_LOW(PI15))
1340
#define VAL_GPIOI_ODR (PIN_ODR_LEVEL_LOW(PI00) | \
…
1356
1357
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(PI00, 0) | \
1358
PIN_AFIO_AF(PI01, 0) | \
1359
PIN_AFIO_AF(PI02, 0) | \
1360
PIN_AFIO_AF(PI03, 0) | \
1361
PIN_AFIO_AF(PI04, 0) | \
1362
PIN_AFIO_AF(PI05, 0) | \
1363
PIN_AFIO_AF(PI06, 0) | \
1364
PIN_AFIO_AF(PI07, 0))
1357
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(PI00, 0) | \
…
1365
1366
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(PI08, 0) | \
1367
PIN_AFIO_AF(PI09, 0) | \
1368
PIN_AFIO_AF(PI10, 0) | \
1369
PIN_AFIO_AF(PI11, 0) | \
1370
PIN_AFIO_AF(PI12, 0) | \
1371
PIN_AFIO_AF(PI13, 0) | \
1372
PIN_AFIO_AF(PI14, 0) | \
1373
PIN_AFIO_AF(PI15, 0))
1366
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(PI08, 0) | \
…
1374
1375
#define VAL_GPIOJ_MODER (PIN_MODE_INPUT(PJ00) | \
1376
PIN_MODE_INPUT(PJ01) | \
1377
PIN_MODE_INPUT(PJ02) | \
1378
PIN_MODE_INPUT(PJ03) | \
1379
PIN_MODE_INPUT(PJ04) | \
1380
PIN_MODE_INPUT(PJ05) | \
1381
PIN_MODE_INPUT(PJ06) | \
1382
PIN_MODE_INPUT(PJ07) | \
1383
PIN_MODE_INPUT(PJ08) | \
1384
PIN_MODE_INPUT(PJ09) | \
1385
PIN_MODE_INPUT(PJ10) | \
1386
PIN_MODE_INPUT(PJ11) | \
1387
PIN_MODE_INPUT(PJ12) | \
1388
PIN_MODE_INPUT(PJ13) | \
1389
PIN_MODE_INPUT(PJ14) | \
1390
PIN_MODE_INPUT(PJ15))
1375
#define VAL_GPIOJ_MODER (PIN_MODE_INPUT(PJ00) | \
…
1391
1392
#define VAL_GPIOJ_OTYPER (PIN_OTYPE_PUSHPULL(PJ00) | \
1393
PIN_OTYPE_PUSHPULL(PJ01) | \
1394
PIN_OTYPE_PUSHPULL(PJ02) | \
1395
PIN_OTYPE_PUSHPULL(PJ03) | \
1396
PIN_OTYPE_PUSHPULL(PJ04) | \
1397
PIN_OTYPE_PUSHPULL(PJ05) | \
1398
PIN_OTYPE_PUSHPULL(PJ06) | \
1399
PIN_OTYPE_PUSHPULL(PJ07) | \
1400
PIN_OTYPE_PUSHPULL(PJ08) | \
1401
PIN_OTYPE_PUSHPULL(PJ09) | \
1402
PIN_OTYPE_PUSHPULL(PJ10) | \
1403
PIN_OTYPE_PUSHPULL(PJ11) | \
1404
PIN_OTYPE_PUSHPULL(PJ12) | \
1405
PIN_OTYPE_PUSHPULL(PJ13) | \
1406
PIN_OTYPE_PUSHPULL(PJ14) | \
1407
PIN_OTYPE_PUSHPULL(PJ15))
1392
#define VAL_GPIOJ_OTYPER (PIN_OTYPE_PUSHPULL(PJ00) | \
…
1408
1409
#define VAL_GPIOJ_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PJ00) | \
1410
PIN_OSPEED_SPEED_VERYLOW(PJ01) | \
1411
PIN_OSPEED_SPEED_VERYLOW(PJ02) | \
1412
PIN_OSPEED_SPEED_VERYLOW(PJ03) | \
1413
PIN_OSPEED_SPEED_VERYLOW(PJ04) | \
1414
PIN_OSPEED_SPEED_VERYLOW(PJ05) | \
1415
PIN_OSPEED_SPEED_VERYLOW(PJ06) | \
1416
PIN_OSPEED_SPEED_VERYLOW(PJ07) | \
1417
PIN_OSPEED_SPEED_VERYLOW(PJ08) | \
1418
PIN_OSPEED_SPEED_VERYLOW(PJ09) | \
1419
PIN_OSPEED_SPEED_VERYLOW(PJ10) | \
1420
PIN_OSPEED_SPEED_VERYLOW(PJ11) | \
1421
PIN_OSPEED_SPEED_VERYLOW(PJ12) | \
1422
PIN_OSPEED_SPEED_VERYLOW(PJ13) | \
1423
PIN_OSPEED_SPEED_VERYLOW(PJ14) | \
1424
PIN_OSPEED_SPEED_VERYLOW(PJ15))
1409
#define VAL_GPIOJ_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PJ00) | \
…
1425
1426
#define VAL_GPIOJ_PUPDR (PIN_PUPDR_PULLDOWN(PJ00) | \
1427
PIN_PUPDR_PULLDOWN(PJ01) | \
1428
PIN_PUPDR_PULLDOWN(PJ02) | \
1429
PIN_PUPDR_PULLDOWN(PJ03) | \
1430
PIN_PUPDR_PULLDOWN(PJ04) | \
1431
PIN_PUPDR_PULLDOWN(PJ05) | \
1432
PIN_PUPDR_PULLDOWN(PJ06) | \
1433
PIN_PUPDR_PULLDOWN(PJ07) | \
1434
PIN_PUPDR_PULLDOWN(PJ08) | \
1435
PIN_PUPDR_PULLDOWN(PJ09) | \
1436
PIN_PUPDR_PULLDOWN(PJ10) | \
1437
PIN_PUPDR_PULLDOWN(PJ11) | \
1438
PIN_PUPDR_PULLDOWN(PJ12) | \
1439
PIN_PUPDR_PULLDOWN(PJ13) | \
1440
PIN_PUPDR_PULLDOWN(PJ14) | \
1441
PIN_PUPDR_PULLDOWN(PJ15))
1426
#define VAL_GPIOJ_PUPDR (PIN_PUPDR_PULLDOWN(PJ00) | \
…
1442
1443
#define VAL_GPIOJ_ODR (PIN_ODR_LEVEL_LOW(PJ00) | \
1444
PIN_ODR_LEVEL_LOW(PJ01) | \
1445
PIN_ODR_LEVEL_LOW(PJ02) | \
1446
PIN_ODR_LEVEL_LOW(PJ03) | \
1447
PIN_ODR_LEVEL_LOW(PJ04) | \
1448
PIN_ODR_LEVEL_LOW(PJ05) | \
1449
PIN_ODR_LEVEL_LOW(PJ06) | \
1450
PIN_ODR_LEVEL_LOW(PJ07) | \
1451
PIN_ODR_LEVEL_LOW(PJ08) | \
1452
PIN_ODR_LEVEL_LOW(PJ09) | \
1453
PIN_ODR_LEVEL_LOW(PJ10) | \
1454
PIN_ODR_LEVEL_LOW(PJ11) | \
1455
PIN_ODR_LEVEL_LOW(PJ12) | \
1456
PIN_ODR_LEVEL_LOW(PJ13) | \
1457
PIN_ODR_LEVEL_LOW(PJ14) | \
1458
PIN_ODR_LEVEL_LOW(PJ15))
1443
#define VAL_GPIOJ_ODR (PIN_ODR_LEVEL_LOW(PJ00) | \
…
1459
1460
#define VAL_GPIOJ_AFRL (PIN_AFIO_AF(PJ00, 0) | \
1461
PIN_AFIO_AF(PJ01, 0) | \
1462
PIN_AFIO_AF(PJ02, 0) | \
1463
PIN_AFIO_AF(PJ03, 0) | \
1464
PIN_AFIO_AF(PJ04, 0) | \
1465
PIN_AFIO_AF(PJ05, 0) | \
1466
PIN_AFIO_AF(PJ06, 0) | \
1467
PIN_AFIO_AF(PJ07, 0))
1460
#define VAL_GPIOJ_AFRL (PIN_AFIO_AF(PJ00, 0) | \
…
1468
1469
#define VAL_GPIOJ_AFRH (PIN_AFIO_AF(PJ08, 0) | \
1470
PIN_AFIO_AF(PJ09, 0) | \
1471
PIN_AFIO_AF(PJ10, 0) | \
1472
PIN_AFIO_AF(PJ11, 0) | \
1473
PIN_AFIO_AF(PJ12, 0) | \
1474
PIN_AFIO_AF(PJ13, 0) | \
1475
PIN_AFIO_AF(PJ14, 0) | \
1476
PIN_AFIO_AF(PJ15, 0))
1469
#define VAL_GPIOJ_AFRH (PIN_AFIO_AF(PJ08, 0) | \
…
1477
1478
#define VAL_GPIOK_MODER (PIN_MODE_INPUT(PK00) | \
1479
PIN_MODE_INPUT(PK01) | \
1480
PIN_MODE_INPUT(PK02) | \
1481
PIN_MODE_INPUT(PK03) | \
1482
PIN_MODE_INPUT(PK04) | \
1483
PIN_MODE_INPUT(PK05) | \
1484
PIN_MODE_INPUT(PK06) | \
1485
PIN_MODE_INPUT(PK07) | \
1486
PIN_MODE_INPUT(PK08) | \
1487
PIN_MODE_INPUT(PK09) | \
1488
PIN_MODE_INPUT(PK10) | \
1489
PIN_MODE_INPUT(PK11) | \
1490
PIN_MODE_INPUT(PK12) | \
1491
PIN_MODE_INPUT(PK13) | \
1492
PIN_MODE_INPUT(PK14) | \
1493
PIN_MODE_INPUT(PK15))
1478
#define VAL_GPIOK_MODER (PIN_MODE_INPUT(PK00) | \
…
1494
1495
#define VAL_GPIOK_OTYPER (PIN_OTYPE_PUSHPULL(PK00) | \
1496
PIN_OTYPE_PUSHPULL(PK01) | \
1497
PIN_OTYPE_PUSHPULL(PK02) | \
1498
PIN_OTYPE_PUSHPULL(PK03) | \
1499
PIN_OTYPE_PUSHPULL(PK04) | \
1500
PIN_OTYPE_PUSHPULL(PK05) | \
1501
PIN_OTYPE_PUSHPULL(PK06) | \
1502
PIN_OTYPE_PUSHPULL(PK07) | \
1503
PIN_OTYPE_PUSHPULL(PK08) | \
1504
PIN_OTYPE_PUSHPULL(PK09) | \
1505
PIN_OTYPE_PUSHPULL(PK10) | \
1506
PIN_OTYPE_PUSHPULL(PK11) | \
1507
PIN_OTYPE_PUSHPULL(PK12) | \
1508
PIN_OTYPE_PUSHPULL(PK13) | \
1509
PIN_OTYPE_PUSHPULL(PK14) | \
1510
PIN_OTYPE_PUSHPULL(PK15))
1495
#define VAL_GPIOK_OTYPER (PIN_OTYPE_PUSHPULL(PK00) | \
…
1511
1512
#define VAL_GPIOK_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PK00) | \
1513
PIN_OSPEED_SPEED_VERYLOW(PK01) | \
1514
PIN_OSPEED_SPEED_VERYLOW(PK02) | \
1515
PIN_OSPEED_SPEED_VERYLOW(PK03) | \
1516
PIN_OSPEED_SPEED_VERYLOW(PK04) | \
1517
PIN_OSPEED_SPEED_VERYLOW(PK05) | \
1518
PIN_OSPEED_SPEED_VERYLOW(PK06) | \
1519
PIN_OSPEED_SPEED_VERYLOW(PK07) | \
1520
PIN_OSPEED_SPEED_VERYLOW(PK08) | \
1521
PIN_OSPEED_SPEED_VERYLOW(PK09) | \
1522
PIN_OSPEED_SPEED_VERYLOW(PK10) | \
1523
PIN_OSPEED_SPEED_VERYLOW(PK11) | \
1524
PIN_OSPEED_SPEED_VERYLOW(PK12) | \
1525
PIN_OSPEED_SPEED_VERYLOW(PK13) | \
1526
PIN_OSPEED_SPEED_VERYLOW(PK14) | \
1527
PIN_OSPEED_SPEED_VERYLOW(PK15))
1512
#define VAL_GPIOK_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PK00) | \
…
1528
1529
#define VAL_GPIOK_PUPDR (PIN_PUPDR_PULLDOWN(PK00) | \
1530
PIN_PUPDR_PULLDOWN(PK01) | \
1531
PIN_PUPDR_PULLDOWN(PK02) | \
1532
PIN_PUPDR_PULLDOWN(PK03) | \
1533
PIN_PUPDR_PULLDOWN(PK04) | \
1534
PIN_PUPDR_PULLDOWN(PK05) | \
1535
PIN_PUPDR_PULLDOWN(PK06) | \
1536
PIN_PUPDR_PULLDOWN(PK07) | \
1537
PIN_PUPDR_PULLDOWN(PK08) | \
1538
PIN_PUPDR_PULLDOWN(PK09) | \
1539
PIN_PUPDR_PULLDOWN(PK10) | \
1540
PIN_PUPDR_PULLDOWN(PK11) | \
1541
PIN_PUPDR_PULLDOWN(PK12) | \
1542
PIN_PUPDR_PULLDOWN(PK13) | \
1543
PIN_PUPDR_PULLDOWN(PK14) | \
1544
PIN_PUPDR_PULLDOWN(PK15))
1529
#define VAL_GPIOK_PUPDR (PIN_PUPDR_PULLDOWN(PK00) | \
…
1545
1546
#define VAL_GPIOK_ODR (PIN_ODR_LEVEL_LOW(PK00) | \
1547
PIN_ODR_LEVEL_LOW(PK01) | \
1548
PIN_ODR_LEVEL_LOW(PK02) | \
1549
PIN_ODR_LEVEL_LOW(PK03) | \
1550
PIN_ODR_LEVEL_LOW(PK04) | \
1551
PIN_ODR_LEVEL_LOW(PK05) | \
1552
PIN_ODR_LEVEL_LOW(PK06) | \
1553
PIN_ODR_LEVEL_LOW(PK07) | \
1554
PIN_ODR_LEVEL_LOW(PK08) | \
1555
PIN_ODR_LEVEL_LOW(PK09) | \
1556
PIN_ODR_LEVEL_LOW(PK10) | \
1557
PIN_ODR_LEVEL_LOW(PK11) | \
1558
PIN_ODR_LEVEL_LOW(PK12) | \
1559
PIN_ODR_LEVEL_LOW(PK13) | \
1560
PIN_ODR_LEVEL_LOW(PK14) | \
1561
PIN_ODR_LEVEL_LOW(PK15))
1546
#define VAL_GPIOK_ODR (PIN_ODR_LEVEL_LOW(PK00) | \
…
1562
1563
#define VAL_GPIOK_AFRL (PIN_AFIO_AF(PK00, 0) | \
1564
PIN_AFIO_AF(PK01, 0) | \
1565
PIN_AFIO_AF(PK02, 0) | \
1566
PIN_AFIO_AF(PK03, 0) | \
1567
PIN_AFIO_AF(PK04, 0) | \
1568
PIN_AFIO_AF(PK05, 0) | \
1569
PIN_AFIO_AF(PK06, 0) | \
1570
PIN_AFIO_AF(PK07, 0))
1563
#define VAL_GPIOK_AFRL (PIN_AFIO_AF(PK00, 0) | \
…
1571
1572
#define VAL_GPIOK_AFRH (PIN_AFIO_AF(PK08, 0) | \
1573
PIN_AFIO_AF(PK09, 0) | \
1574
PIN_AFIO_AF(PK10, 0) | \
1575
PIN_AFIO_AF(PK11, 0) | \
1576
PIN_AFIO_AF(PK12, 0) | \
1577
PIN_AFIO_AF(PK13, 0) | \
1578
PIN_AFIO_AF(PK14, 0) | \
1579
PIN_AFIO_AF(PK15, 0))
1572
#define VAL_GPIOK_AFRH (PIN_AFIO_AF(PK08, 0) | \
…
1580
1581
#define AF_PA00_SERVO4 2U
1582
#define AF_LINE_SERVO4 2U
1583
#define AF_PA01_SERVO3 2U
1584
#define AF_LINE_SERVO3 2U
1585
#define AF_PA02_UART2_TX 7U
1586
#define AF_LINE_UART2_TX 7U
1587
#define AF_PA03_UART2_RX 7U
1588
#define AF_LINE_UART2_RX 7U
1589
#define AF_PA05_SPI1_CLK 5U
1590
#define AF_LINE_SPI1_CLK 5U
1591
#define AF_PA06_SPI1_MISO 5U
1592
#define AF_LINE_SPI1_MISO 5U
1593
#define AF_PA07_SPI1_MOSI 5U
1594
#define AF_LINE_SPI1_MOSI 5U
1595
#define AF_PA08_AUX 1U
1596
#define AF_LINE_AUX 1U
1597
#define AF_PA09_UART1_TX 7U
1598
#define AF_LINE_UART1_TX 7U
1599
#define AF_PA10_UART1_RX 7U
1600
#define AF_LINE_UART1_RX 7U
1601
#define AF_PA11_OTG_FS_DM 10U
1602
#define AF_LINE_OTG_FS_DM 10U
1603
#define AF_PA12_OTG_FS_DP 10U
1604
#define AF_LINE_OTG_FS_DP 10U
1605
#define AF_PA13_SWDIO 0U
1606
#define AF_LINE_SWDIO 0U
1607
#define AF_PA14_SWCLK 0U
1608
#define AF_LINE_SWCLK 0U
1609
#define AF_PB00_SERVO1 2U
1610
#define AF_LINE_SERVO1 2U
1611
#define AF_PB01_SERVO2 2U
1612
#define AF_LINE_SERVO2 2U
1613
#define AF_PB03_SPI3_CLK 6U
1614
#define AF_LINE_SPI3_CLK 6U
1615
#define AF_PB04_SPI3_MISO 6U
1616
#define AF_LINE_SPI3_MISO 6U
1617
#define AF_PB05_SPI3_MOSI 6U
1618
#define AF_LINE_SPI3_MOSI 6U
1619
#define AF_PB06_SERVO5 2U
1620
#define AF_LINE_SERVO5 2U
1621
#define AF_PB07_SERVO6 2U
1622
#define AF_LINE_SERVO6 2U
1623
#define AF_PB08_I2C1_SCL 4U
1624
#define AF_LINE_I2C1_SCL 4U
1625
#define AF_PB09_I2C1_SDA 4U
1626
#define AF_LINE_I2C1_SDA 4U
1627
#define AF_PB10_UART3_TX 7U
1628
#define AF_LINE_UART3_TX 7U
1629
#define AF_PB11_RC1 7U
1630
#define AF_LINE_RC1 7U
1631
#define AF_PB13_SPI2_CLK 5U
1632
#define AF_LINE_SPI2_CLK 5U
1633
#define AF_PB14_SPI2_MISO 5U
1634
#define AF_LINE_SPI2_MISO 5U
1635
#define AF_PB15_SPI2_MOSI 5U
1636
#define AF_LINE_SPI2_MOSI 5U
1637
#define AF_PC06_UART6_TX 8U
1638
#define AF_LINE_UART6_TX 8U
1639
#define AF_PC07_UART6_RX 8U
1640
#define AF_LINE_UART6_RX 8U
1641
#define AF_PC10_UART4_TX 8U
1642
#define AF_LINE_UART4_TX 8U
1643
#define AF_PC11_UART4_RX 8U
1644
#define AF_LINE_UART4_RX 8U
1645
#define AF_PC12_UART5_TX 8U
1646
#define AF_LINE_UART5_TX 8U
1647
#define AF_PD02_UART5_RX 8U
1648
#define AF_LINE_UART5_RX 8U
1649
#define AF_PH00_OSC_IN 0U
1650
#define AF_LINE_OSC_IN 0U
1651
#define AF_PH01_OSC_OUT 0U
1652
#define AF_LINE_OSC_OUT 0U
1653
1654
1655
#define SERVO4_TIM 5
1656
#define SERVO4_TIM_FN CH
1657
#define SERVO4_TIM_CH 1
1658
#define SERVO4_TIM_AF 2
1659
#define SERVO3_TIM 5
1660
#define SERVO3_TIM_FN CH
1661
#define SERVO3_TIM_CH 2
1662
#define SERVO3_TIM_AF 2
1663
#define AUX_TIM 1
1664
#define AUX_TIM_FN CH
1665
#define AUX_TIM_CH 1
1666
#define AUX_TIM_AF 1
1667
#define SERVO1_TIM 3
1668
#define SERVO1_TIM_FN CH
1669
#define SERVO1_TIM_CH 3
1670
#define SERVO1_TIM_AF 2
1671
#define SERVO2_TIM 3
1672
#define SERVO2_TIM_FN CH
1673
#define SERVO2_TIM_CH 4
1674
#define SERVO2_TIM_AF 2
1675
#define SERVO5_TIM 4
1676
#define SERVO5_TIM_FN CH
1677
#define SERVO5_TIM_CH 1
1678
#define SERVO5_TIM_AF 2
1679
#define SERVO6_TIM 4
1680
#define SERVO6_TIM_FN CH
1681
#define SERVO6_TIM_CH 2
1682
#define SERVO6_TIM_AF 2
1683
#define RC1_USART 3
1684
#define RC1_USART_FN RX
1685
#define RC1_USART_AF 7
1686
#define ADC1_ADC 1
1687
#define ADC1_ADC_FN IN
1688
#define ADC1_ADC_IN 10
1689
1690
#define BOARD_GROUP_DECLFOREACH(line, group) \
1691
static const ioline_t group ## _ARRAY[] = {group}; \
1692
for (ioline_t i=0, line = group ## _ARRAY[i]; (i < group ## _SIZE) && (line = group ## _ARRAY[i]); i++)
1690
#define BOARD_GROUP_DECLFOREACH(line, group) \
…
1693
1694
#define BOARD_GROUP_FOREACH(line, group) \
1695
for (ioline_t i=0, line = group ## _ARRAY[i]; (i < group ## _SIZE) && (line = group ## _ARRAY[i]); i++)
1694
#define BOARD_GROUP_FOREACH(line, group) \
…
1696
1697
1698
#define BOARD_GROUP_DECLFOR(array, index, group) \
1699
static const ioline_t group ## _ARRAY[] = {group}; \
1700
for (ioline_t index=0, *array = (ioline_t *) group ## _ARRAY; index < group ## _SIZE; index++)
1698
#define BOARD_GROUP_DECLFOR(array, index, group) \
…
1701
1702
#define BOARD_GROUP_FOR(array, index, group) \
1703
for (ioline_t index=0, *array = (ioline_t *) group ## _ARRAY; index < group ## _SIZE; index++)
1702
#define BOARD_GROUP_FOR(array, index, group) \
…
1704
1705
#define ENERGY_SAVE_INPUT \
1706
LINE_LED1
1705
#define ENERGY_SAVE_INPUT \
…
1707
#define ENERGY_SAVE_INPUT_SIZE 1
1708
1709
#if !defined(_FROM_ASM_)
1710
#ifdef __cplusplus
1711
extern
"C"
{
1712
#endif
1713
void
boardInit
(
void
);
1714
#ifdef __cplusplus
1715
}
1716
#endif
1717
#endif
/* _FROM_ASM_ */
1718
boardInit
void boardInit(void)
Board-specific initialization code.
Definition
board.c:317
sw
airborne
boards
betafpv
aiof7
v2
board.h
Generated on Fri Apr 4 2025 14:56:50 for Paparazzi UAS by
1.9.8
1.9.8 