37 #include "mcu_periph/uart_arch.h"
44 #ifndef UART_THREAD_STACK_SIZE
45 #define UART_THREAD_STACK_SIZE 512
58 #define SERIAL_INIT_NULL { NULL, NULL, NULL, NULL, NULL, 0, 0 }
69 chMtxLock(init_struct->
rx_mtx);
77 chMtxUnlock(init_struct->
rx_mtx);
78 chSemSignal(init_struct->
rx_sem);
90 chSemWait(init_struct->
tx_sem);
93 #if USE_UART_SOFT_FLOW_CONTROL
100 sdPut((SerialDriver *)p->
reg_addr, data);
101 chMtxLock(init_struct->
tx_mtx);
104 chMtxUnlock(init_struct->
tx_mtx);
105 #if USE_UART_SOFT_FLOW_CONTROL
108 while ((((SerialDriver *)p->
reg_addr)->usart->SR & USART_SR_TC) == 0) ;
118 #define UART1_BAUD SERIAL_DEFAULT_BITRATE
123 #define USE_UART1_TX TRUE
126 #define USE_UART1_RX TRUE
129 static SerialConfig usart1_config = {
132 USART_CR2_STOP1_BITS,
143 static __attribute__((noreturn)) void thd_uart1_rx(
void *arg)
146 chRegSetThreadName(
"uart1_rx");
160 static __attribute__((noreturn)) void thd_uart1_tx(
void *arg)
163 chRegSetThreadName(
"uart1_tx");
172 void uart1_init(
void)
177 #if USE_UART1_TX && defined UART1_GPIO_PORT_TX
180 #if USE_UART1_RX && defined UART1_GPIO_PORT_RX
184 sdStart(&SD1, &usart1_config);
185 uart1.reg_addr = &SD1;
186 uart1.baudrate = UART1_BAUD;
187 uart1.init_struct = &uart1_init_struct;
188 uart1_init_struct.
conf = &usart1_config;
192 uart1_init_struct.
rx_mtx = &uart1_rx_mtx;
193 uart1_init_struct.
rx_sem = &uart1_rx_sem;
194 chThdCreateStatic(wa_thd_uart1_rx,
sizeof(wa_thd_uart1_rx),
195 NORMALPRIO + 1, thd_uart1_rx, NULL);
198 uart1_init_struct.
tx_mtx = &uart1_tx_mtx;
199 uart1_init_struct.
tx_sem = &uart1_tx_sem;
200 chThdCreateStatic(wa_thd_uart1_tx,
sizeof(wa_thd_uart1_tx),
201 NORMALPRIO + 1, thd_uart1_tx, NULL);
211 #define UART2_BAUD SERIAL_DEFAULT_BITRATE
216 #define USE_UART2_TX TRUE
219 #define USE_UART2_RX TRUE
223 #ifndef UART2_HW_FLOW_CONTROL
224 #define UART2_HW_FLOW_CONTROL FALSE
227 static SerialConfig usart2_config = {
230 USART_CR2_STOP1_BITS,
231 #if UART2_HW_FLOW_CONTROL
232 USART_CR3_CTSE | USART_CR3_RTSE
245 static __attribute__((noreturn)) void thd_uart2_rx(
void *arg)
248 chRegSetThreadName(
"uart2_rx");
262 static __attribute__((noreturn)) void thd_uart2_tx(
void *arg)
265 chRegSetThreadName(
"uart2_tx");
274 void uart2_init(
void)
279 #if USE_UART2_TX && defined UART2_GPIO_PORT_TX
282 #if USE_UART2_RX && defined UART2_GPIO_PORT_RX
286 sdStart(&SD2, &usart2_config);
287 uart2.reg_addr = &SD2;
288 uart2.baudrate = UART2_BAUD;
289 uart2.init_struct = &uart2_init_struct;
290 uart2_init_struct.
conf = &usart2_config;
294 uart2_init_struct.
rx_mtx = &uart2_rx_mtx;
295 uart2_init_struct.
rx_sem = &uart2_rx_sem;
296 chThdCreateStatic(wa_thd_uart2_rx,
sizeof(wa_thd_uart2_rx),
297 NORMALPRIO + 1, thd_uart2_rx, NULL);
300 uart2_init_struct.
tx_mtx = &uart2_tx_mtx;
301 uart2_init_struct.
tx_sem = &uart2_tx_sem;
302 chThdCreateStatic(wa_thd_uart2_tx,
sizeof(wa_thd_uart2_tx),
303 NORMALPRIO + 1, thd_uart2_tx, NULL);
312 #define UART3_BAUD SERIAL_DEFAULT_BITRATE
317 #define USE_UART3_TX TRUE
320 #define USE_UART3_RX TRUE
323 static SerialConfig usart3_config = {
326 USART_CR2_STOP1_BITS,
337 static __attribute__((noreturn)) void thd_uart3_rx(
void *arg)
340 chRegSetThreadName(
"uart3_rx");
354 static __attribute__((noreturn)) void thd_uart3_tx(
void *arg)
357 chRegSetThreadName(
"uart3_tx");
366 void uart3_init(
void)
371 #if USE_UART3_TX && defined UART3_GPIO_PORT_TX
374 #if USE_UART3_RX && defined UART3_GPIO_PORT_RX
378 sdStart(&SD3, &usart3_config);
379 uart3.reg_addr = &SD3;
380 uart3.baudrate = UART3_BAUD;
381 uart3.init_struct = &uart3_init_struct;
382 uart3_init_struct.
conf = &usart3_config;
386 uart3_init_struct.
rx_mtx = &uart3_rx_mtx;
387 uart3_init_struct.
rx_sem = &uart3_rx_sem;
388 chThdCreateStatic(wa_thd_uart3_rx,
sizeof(wa_thd_uart3_rx),
389 NORMALPRIO + 1, thd_uart3_rx, NULL);
392 uart3_init_struct.
tx_mtx = &uart3_tx_mtx;
393 uart3_init_struct.
tx_sem = &uart3_tx_sem;
394 chThdCreateStatic(wa_thd_uart3_tx,
sizeof(wa_thd_uart3_tx),
395 NORMALPRIO + 1, thd_uart3_tx, NULL);
404 #define UART4_BAUD SERIAL_DEFAULT_BITRATE
409 #define USE_UART4_TX TRUE
412 #define USE_UART4_RX TRUE
415 static SerialConfig usart4_config = {
418 USART_CR2_STOP1_BITS,
429 static __attribute__((noreturn)) void thd_uart4_rx(
void *arg)
432 chRegSetThreadName(
"uart4_rx");
446 static __attribute__((noreturn)) void thd_uart4_tx(
void *arg)
449 chRegSetThreadName(
"uart4_tx");
458 void uart4_init(
void)
463 #if USE_UART4_TX && defined UART4_GPIO_PORT_TX
466 #if USE_UART4_RX && defined UART4_GPIO_PORT_RX
470 sdStart(&SD4, &usart4_config);
471 uart4.reg_addr = &SD4;
472 uart4.baudrate = UART4_BAUD;
473 uart4.init_struct = &uart4_init_struct;
474 uart4_init_struct.
conf = &usart4_config;
478 uart4_init_struct.
rx_mtx = &uart4_rx_mtx;
479 uart4_init_struct.
rx_sem = &uart4_rx_sem;
480 chThdCreateStatic(wa_thd_uart4_rx,
sizeof(wa_thd_uart4_rx),
481 NORMALPRIO + 1, thd_uart4_rx, NULL);
484 uart4_init_struct.
tx_mtx = &uart4_tx_mtx;
485 uart4_init_struct.
tx_sem = &uart4_tx_sem;
486 chThdCreateStatic(wa_thd_uart4_tx,
sizeof(wa_thd_uart4_tx),
487 NORMALPRIO + 1, thd_uart4_tx, NULL);
496 #define UART5_BAUD SERIAL_DEFAULT_BITRATE
501 #define USE_UART5_TX TRUE
504 #define USE_UART5_RX TRUE
507 static SerialConfig usart5_config = {
510 USART_CR2_STOP1_BITS,
521 static __attribute__((noreturn)) void thd_uart5_rx(
void *arg)
524 chRegSetThreadName(
"uart5_rx");
538 static __attribute__((noreturn)) void thd_uart5_tx(
void *arg)
541 chRegSetThreadName(
"uart5_tx");
550 void uart5_init(
void)
555 #if USE_UART5_TX && defined UART5_GPIO_PORT_TX
558 #if USE_UART5_RX && defined UART5_GPIO_PORT_RX
562 sdStart(&SD5, &usart5_config);
563 uart5.reg_addr = &SD5;
564 uart5.baudrate = UART5_BAUD;
565 uart5.init_struct = &uart5_init_struct;
566 uart5_init_struct.
conf = &usart5_config;
570 uart5_init_struct.
rx_mtx = &uart5_rx_mtx;
571 uart5_init_struct.
rx_sem = &uart5_rx_sem;
572 chThdCreateStatic(wa_thd_uart5_rx,
sizeof(wa_thd_uart5_rx),
573 NORMALPRIO + 1, thd_uart5_rx, NULL);
576 uart5_init_struct.
tx_mtx = &uart5_tx_mtx;
577 uart5_init_struct.
tx_sem = &uart5_tx_sem;
578 chThdCreateStatic(wa_thd_uart5_tx,
sizeof(wa_thd_uart5_tx),
579 NORMALPRIO + 1, thd_uart5_tx, NULL);
588 #define UART6_BAUD SERIAL_DEFAULT_BITRATE
593 #define USE_UART6_TX TRUE
596 #define USE_UART6_RX TRUE
599 static SerialConfig usart6_config = {
602 USART_CR2_STOP1_BITS,
613 static __attribute__((noreturn)) void thd_uart6_rx(
void *arg)
616 chRegSetThreadName(
"uart6_rx");
630 static __attribute__((noreturn)) void thd_uart6_tx(
void *arg)
633 chRegSetThreadName(
"uart6_tx");
642 void uart6_init(
void)
647 #if USE_UART6_TX && defined UART6_GPIO_PORT_TX
650 #if USE_UART6_RX && defined UART6_GPIO_PORT_RX
654 sdStart(&SD6, &usart6_config);
655 uart6.reg_addr = &SD6;
656 uart6.baudrate = UART6_BAUD;
657 uart6.init_struct = &uart6_init_struct;
658 uart6_init_struct.
conf = &usart6_config;
662 uart6_init_struct.
rx_mtx = &uart6_rx_mtx;
663 uart6_init_struct.
rx_sem = &uart6_rx_sem;
664 chThdCreateStatic(wa_thd_uart6_rx,
sizeof(wa_thd_uart6_rx),
665 NORMALPRIO + 1, thd_uart6_rx, NULL);
668 uart6_init_struct.
tx_mtx = &uart6_tx_mtx;
669 uart6_init_struct.
tx_sem = &uart6_tx_sem;
670 chThdCreateStatic(wa_thd_uart6_tx,
sizeof(wa_thd_uart6_tx),
671 NORMALPRIO + 1, thd_uart6_tx, NULL);
674 #if defined UART6_GPIO_CTS && defined UART6_GPIO_PORT_CTS
685 #define UART7_BAUD SERIAL_DEFAULT_BITRATE
690 #define USE_UART7_TX TRUE
693 #define USE_UART7_RX TRUE
696 static SerialConfig usart7_config = {
699 USART_CR2_STOP1_BITS,
710 static __attribute__((noreturn)) void thd_uart7_rx(
void *arg)
713 chRegSetThreadName(
"uart7_rx");
727 static __attribute__((noreturn)) void thd_uart7_tx(
void *arg)
730 chRegSetThreadName(
"uart7_tx");
739 void uart7_init(
void)
744 #if USE_UART7_TX && defined UART7_GPIO_PORT_TX
747 #if USE_UART7_RX && defined UART7_GPIO_PORT_RX
751 sdStart(&SD7, &usart7_config);
752 uart7.reg_addr = &SD7;
753 uart7.baudrate = UART7_BAUD;
754 uart7.init_struct = &uart7_init_struct;
755 uart7_init_struct.
conf = &usart7_config;
759 uart7_init_struct.
rx_mtx = &uart7_rx_mtx;
760 uart7_init_struct.
rx_sem = &uart7_rx_sem;
761 chThdCreateStatic(wa_thd_uart7_rx,
sizeof(wa_thd_uart7_rx),
762 NORMALPRIO + 1, thd_uart7_rx, NULL);
765 uart7_init_struct.
tx_mtx = &uart7_tx_mtx;
766 uart7_init_struct.
tx_sem = &uart7_tx_sem;
767 chThdCreateStatic(wa_thd_uart7_tx,
sizeof(wa_thd_uart7_tx),
768 NORMALPRIO + 1, thd_uart7_tx, NULL);
777 #define UART8_BAUD SERIAL_DEFAULT_BITRATE
782 #define USE_UART8_TX TRUE
785 #define USE_UART8_RX TRUE
788 static SerialConfig usart8_config = {
791 USART_CR2_STOP1_BITS,
802 static __attribute__((noreturn)) void thd_uart8_rx(
void *arg)
805 chRegSetThreadName(
"uart8_rx");
819 static __attribute__((noreturn)) void thd_uart8_tx(
void *arg)
822 chRegSetThreadName(
"uart8_tx");
831 void uart8_init(
void)
836 #if USE_UART8_TX && defined UART8_GPIO_PORT_TX
839 #if USE_UART8_RX && defined UART8_GPIO_PORT_RX
843 sdStart(&SD8, &usart8_config);
844 uart8.reg_addr = &SD8;
845 uart8.baudrate = UART8_BAUD;
846 uart8.init_struct = &uart8_init_struct;
847 uart8_init_struct.
conf = &usart8_config;
851 uart8_init_struct.
rx_mtx = &uart8_rx_mtx;
852 uart8_init_struct.
rx_sem = &uart8_rx_sem;
853 chThdCreateStatic(wa_thd_uart8_rx,
sizeof(wa_thd_uart8_rx),
854 NORMALPRIO + 1, thd_uart8_rx, NULL);
857 uart8_init_struct.
tx_mtx = &uart8_tx_mtx;
858 uart8_init_struct.
tx_sem = &uart8_tx_sem;
859 chThdCreateStatic(wa_thd_uart8_tx,
sizeof(wa_thd_uart8_tx),
860 NORMALPRIO + 1, thd_uart8_tx, NULL);
873 chMtxLock(init_struct->
rx_mtx);
876 chMtxUnlock(init_struct->
rx_mtx);
886 SerialConfig *
conf = init_struct->
conf;
891 sdStop((SerialDriver *)(p->
reg_addr));
892 sdStart((SerialDriver *)(p->
reg_addr), conf);
899 bool rx_enabled __attribute__((unused)),
bool hw_flow_control __attribute__((unused))) {}
902 #define __USART_CR1_M USART_CR1_M_0
903 #elif defined STM32F1 || defined STM32F4 || defined STM32F3
904 #define __USART_CR1_M USART_CR1_M
906 #error unsupported board
916 SerialConfig *
conf = init_struct->
conf;
920 conf->cr1 |= USART_CR1_PCE;
921 conf->cr1 &= ~USART_CR1_PS;
923 conf->cr1 &= ~__USART_CR1_M;
925 conf->cr1 |= __USART_CR1_M;
928 conf->cr1 |= USART_CR1_PCE;
929 conf->cr1 |= USART_CR1_PS;
931 conf->cr1 &= ~__USART_CR1_M;
933 conf->cr1 |= __USART_CR1_M;
936 conf->cr1 &= ~USART_CR1_PCE;
937 conf->cr1 &= ~__USART_CR1_M;
940 conf->cr2 &= ~USART_CR2_STOP;
942 conf-> cr2 |= USART_CR2_STOP2_BITS;
944 conf-> cr2 |= USART_CR2_STOP1_BITS;
947 sdStop((SerialDriver *)(p->
reg_addr));
948 sdStart((SerialDriver *)(p->
reg_addr), conf);
958 SerialConfig *
conf = init_struct->
conf;
960 conf->cr2 |= USART_CR2_RXINV;
962 conf->cr2 &= ~USART_CR2_RXINV;
965 conf->cr2 |= USART_CR2_TXINV;
967 conf->cr2 &= ~USART_CR2_TXINV;
969 sdStop((SerialDriver *)(p->
reg_addr));
970 sdStart((SerialDriver *)(p->
reg_addr), conf);
985 chMtxLock(init_struct->
tx_mtx);
999 chMtxLock(init_struct->
tx_mtx);
1002 chMtxUnlock(init_struct->
tx_mtx);
1008 chMtxUnlock(init_struct->
tx_mtx);
1010 chSemSignal(init_struct->
tx_sem);
1027 chMtxLock(init_struct->
tx_mtx);
1033 chMtxUnlock(init_struct->
tx_mtx);
1039 for (i = 0; i < len; i++) {
1045 chMtxUnlock(init_struct->
tx_mtx);
1047 chSemSignal(init_struct->
tx_sem);
1056 chMtxUnlock(init_struct->
tx_mtx);
1059 chSemSignal(init_struct->
tx_sem);
void gpio_setup_pin_af(ioportid_t port, uint16_t pin, uint8_t af, bool is_output)
Setup a gpio for input or output with alternate function.
uint8_t tx_buf[UART_TX_BUFFER_SIZE]
Transmit buffer.
uint8_t rx_buf[UART_RX_BUFFER_SIZE]
Receive buffer.
void uart_periph_set_baudrate(struct uart_periph *p, uint32_t baud)
Set baudrate.
volatile uint8_t tx_running
#define UART6_GPIO_PORT_CTS
uint8_t uart_getch(struct uart_periph *p)
Some architecture independent helper functions for GPIOs.
void * init_struct
User init struct.
#define UART2_GPIO_PORT_TX
UART2 (with optional flow control activated by default)
static void handle_uart_tx(struct uart_periph *p)
TX handler.
void uart_put_buffer(struct uart_periph *p, long fd, const uint8_t *data, uint16_t len)
Uart transmit buffer implementation.
#define UART_THREAD_STACK_SIZE
void WEAK uart_periph_invert_data_logic(struct uart_periph *p, bool invert_rx, bool invert_tx)
#define UART_RX_BUFFER_SIZE
void uart_send_message(struct uart_periph *p, long fd)
void uart_periph_set_mode(struct uart_periph *p, bool tx_enabled, bool rx_enabled, bool hw_flow_control)
Set mode (not necessary, or can be set by SerialConfig)
void * reg_addr
UART Register.
static SEMAPHORE_DECL(spi1_sem, 0)
Configure SPI peripherals.
#define UART3_GPIO_PORT_RX
#define UART5_GPIO_PORT_TX
#define UART8_GPIO_PORT_RX
#define UART7_GPIO_PORT_RX
#define UART6_GPIO_PORT_TX
void uart_periph_init(struct uart_periph *p)
#define UART4_GPIO_PORT_RX
#define UART7_GPIO_PORT_TX
#define UART8_GPIO_PORT_TX
static THD_WORKING_AREA(wa_thd_spi1, SPI_THREAD_STACK_SIZE)
#define UART6_GPIO_PORT_RX
int uart_check_free_space(struct uart_periph *p, long *fd, uint16_t len)
void uart_put_byte(struct uart_periph *p, long fd, uint8_t data)
Uart transmit implementation.
#define UART1_GPIO_PORT_RX
#define UART5_GPIO_PORT_RX
static uint8_t gpio_get(ioportid_t port, uint16_t pin)
Get level of a gpio.
void uart_periph_set_bits_stop_parity(struct uart_periph *p, uint8_t bits, uint8_t stop, uint8_t parity)
Set parity and stop bits.
#define UART2_GPIO_PORT_RX
#define UART4_GPIO_PORT_TX
static MUTEX_DECL(sys_time_mtx)
#define UART3_GPIO_PORT_TX
int baudrate
UART Baudrate.
#define UART_TX_BUFFER_SIZE
#define UART1_GPIO_PORT_TX
static void handle_uart_rx(struct uart_periph *p)
RX handler.