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invensense3_regs.h File Reference

Register and address definitions for the Invensense V3 from ardupilot. More...

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Macros

#define INV3_BANK0   0x00U
 
#define INV3_BANK1   0x01U
 
#define INV3_BANK2   0x02U
 
#define INV3_BANK3   0x03U
 
#define INV3REG(b, r)   ((((uint16_t)b) << 8)|(r))
 
#define INV3_READ_FLAG   0x80
 
#define INV3REG_DEVICE_CONFIG   INV3REG(INV3_BANK0,0x11U)
 
#define BIT_DEVICE_CONFIG_SOFT_RESET_CONFIG   0x01
 
#define BIT_DEVICE_CONFIG_SPI_MODE   0x10
 
#define INV3REG_FIFO_CONFIG   INV3REG(INV3_BANK0,0x16U)
 
#define FIFO_CONFIG_MODE_BYPASS   0x00
 
#define FIFO_CONFIG_MODE_STREAM_TO_FIFO   0x01
 
#define FIFO_CONFIG_MODE_STOP_ON_FULL   0x02
 
#define FIFO_CONFIG_MODE_SHIFT   0x06
 
#define INV3REG_TEMP_DATA1   INV3REG(INV3_BANK0,0x1DU)
 
#define INV3REG_ACCEL_DATA_X1   INV3REG(INV3_BANK0,0x1FU)
 
#define INV3REG_INT_STATUS   INV3REG(INV3_BANK0,0x2DU)
 
#define INV3REG_FIFO_COUNTH   INV3REG(INV3_BANK0,0x2EU)
 
#define INV3REG_FIFO_COUNTL   INV3REG(INV3_BANK0,0x2FU)
 
#define INV3REG_FIFO_DATA   INV3REG(INV3_BANK0,0x30U)
 
#define INV3REG_SIGNAL_PATH_RESET   INV3REG(INV3_BANK0,0x4BU)
 
#define BIT_SIGNAL_PATH_RESET_FIFO_FLUSH   0x02
 
#define BIT_SIGNAL_PATH_RESET_TMST_STROBE   0x04
 
#define BIT_SIGNAL_PATH_RESET_ABORT_AND_RESET   0x08
 
#define BIT_SIGNAL_PATH_RESET_DMP_MEM_RESET_EN   0x20
 
#define BIT_SIGNAL_PATH_RESET_DMP_INIT_EN   0x40
 
#define INV3REG_INTF_CONFIG0   INV3REG(INV3_BANK0,0x4CU)
 
#define UI_SIFS_CFG_SPI_DIS   0x02
 
#define UI_SIFS_CFG_I2C_DIS   0x03
 
#define UI_SIFS_CFG_SHIFT   0x00
 
#define SENSOR_DATA_BIG_ENDIAN   0x10
 
#define FIFO_COUNT_BIG_ENDIAN   0x20
 
#define FIFO_COUNT_REC   0x40
 
#define FIFO_HOLD_LAST_DATA_EN   0x80
 
#define INV3REG_INTF_CONFIG1   INV3REG(INV3_BANK0,0x4DU)
 
#define INV3REG_PWR_MGMT0   INV3REG(INV3_BANK0,0x4EU)
 
#define ACCEL_MODE_OFF   0x00
 
#define ACCEL_MODE_LN   0x03
 
#define ACCEL_MODE_SHIFT   0x00
 
#define GYRO_MODE_OFF   0x00
 
#define GYRO_MODE_LN   0x03
 
#define GYRO_MODE_SHIFT   0x02
 
#define BIT_PWR_MGMT_IDLE   0x08
 
#define BIT_PWM_MGMT_TEMP_DIS   0x10
 
#define INV3REG_GYRO_CONFIG0   INV3REG(INV3_BANK0,0x4FU)
 
#define GYRO_ODR_32KHZ   0x01
 
#define GYRO_ODR_16KHZ   0x02
 
#define GYRO_ODR_8KHZ   0x03
 
#define GYRO_ODR_4KHZ   0x04
 
#define GYRO_ODR_2KHZ   0x05
 
#define GYRO_ODR_1KHZ   0x06
 
#define GYRO_ODR_200HZ   0x07
 
#define GYRO_ODR_100HZ   0x08
 
#define GYRO_ODR_50HZ   0x09
 
#define GYRO_ODR_25HZ   0x0A
 
#define GYRO_ODR_12_5HZ   0x0B
 
#define GYRO_ODR_500HZ   0x0F
 
#define GYRO_ODR_SHIFT   0x00
 
#define GYRO_FS_SEL_2000DPS   0x00
 
#define GYRO_FS_SEL_1000DPS   0x01
 
#define GYRO_FS_SEL_500DPS   0x02
 
#define GYRO_FS_SEL_250DPS   0x03
 
#define GYRO_FS_SEL_125DPS   0x04
 
#define GYRO_FS_SEL_62_5DPS   0x05
 
#define GYRO_FS_SEL_31_25DPS   0x06
 
#define GYRO_FS_SEL_15_625DPS   0x07
 
#define GYRO_FS_SEL_SHIFT   0x05
 
#define INV3REG_ACCEL_CONFIG0   INV3REG(INV3_BANK0,0x50U)
 
#define ACCEL_ODR_32KHZ   0x01
 
#define ACCEL_ODR_16KHZ   0x02
 
#define ACCEL_ODR_8KHZ   0x03
 
#define ACCEL_ODR_4KHZ   0x04
 
#define ACCEL_ODR_2KHZ   0x05
 
#define ACCEL_ODR_1KHZ   0x06
 
#define ACCEL_ODR_200HZ   0x07
 
#define ACCEL_ODR_100HZ   0x08
 
#define ACCEL_ODR_50HZ   0x09
 
#define ACCEL_ODR_25HZ   0x0A
 
#define ACCEL_ODR_12_5HZ   0x0B
 
#define ACCEL_ODR_6_25HZ   0x0C
 
#define ACCEL_ODR_3_125HZ   0x0D
 
#define ACCEL_ODR_1_5625HZ   0x0E
 
#define ACCEL_ODR_500HZ   0x0F
 
#define ACCEL_ODR_SHIFT   0x00
 
#define ACCEL_FS_SEL_16G   0x00
 
#define ACCEL_FS_SEL_8G   0x01
 
#define ACCEL_FS_SEL_4G   0x02
 
#define ACCEL_FS_SEL_2G   0x03
 
#define ACCEL_FS_SEL_SHIFT   0x05
 
#define INV3REG_GYRO_CONFIG1   INV3REG(INV3_BANK0,0x51U)
 
#define INV3REG_GYRO_ACCEL_CONFIG0   INV3REG(INV3_BANK0,0x52U)
 
#define INV3REG_ACCEL_CONFIG1   INV3REG(INV3_BANK0,0x53U)
 
#define INV3REG_TMST_CONFIG   INV3REG(INV3_BANK0,0x54U)
 
#define BIT_TMST_CONFIG_TMST_EN   0x01
 
#define INV3REG_FIFO_CONFIG1   INV3REG(INV3_BANK0,0x5FU)
 
#define BIT_FIFO_CONFIG1_ACCEL_EN   0x01
 
#define BIT_FIFO_CONFIG1_GYRO_EN   0x02
 
#define BIT_FIFO_CONFIG1_TEMP_EN   0x04
 
#define BIT_FIFO_CONFIG1_TMST_FSYNC_EN   0x08
 
#define BIT_FIFO_CONFIG1_HIRES_EN   0x10
 
#define BIT_FIFO_CONFIG1_WM_GT_TH   0x20
 
#define BIT_FIFO_CONFIG1_RESUME_PARTIAL_RD   0x40
 
#define INV3REG_FIFO_CONFIG2   INV3REG(INV3_BANK0,0x60U)
 
#define INV3REG_FIFO_CONFIG3   INV3REG(INV3_BANK0,0x61U)
 
#define INV3REG_INT_SOURCE0   INV3REG(INV3_BANK0,0x65U)
 
#define INV3REG_INT_SOURCE3   INV3REG(INV3_BANK0,0x68U)
 
#define BIT_FIFO_FULL_INT_EN   0x02
 
#define BIT_FIFO_THS_INT_EN   0x04
 
#define BIT_UI_DRDY_INT_EN   0x08
 
#define INV3REG_INT_CONFIG1   INV3REG(INV3_BANK0,0x64U)
 
#define BIT_INT_ASYNC_RESET   0x10
 
#define INV3REG_WHO_AM_I   INV3REG(INV3_BANK0,0x75U)
 
#define INV3REG_GYRO_CONFIG_STATIC2   INV3REG(INV3_BANK1,0x0BU)
 
#define BIT_GYRO_NF_DIS   0x01
 
#define BIT_GYRO_AAF_DIS   0x02
 
#define INV3REG_GYRO_CONFIG_STATIC3   INV3REG(INV3_BANK1,0x0CU)
 
#define GYRO_AAF_DELT_SHIFT   0x00
 
#define INV3REG_GYRO_CONFIG_STATIC4   INV3REG(INV3_BANK1,0x0DU)
 
#define GYRO_AAF_DELTSQR_LOW_SHIFT   0x00
 
#define INV3REG_GYRO_CONFIG_STATIC5   INV3REG(INV3_BANK1,0x0EU)
 
#define GYRO_AAF_DELTSQR_HIGH_SHIFT   0x00
 
#define GYRO_AAF_BITSHIFT_SHIFT   0x04
 
#define INV3REG_GYRO_CONFIG_STATIC6   INV3REG(INV3_BANK1,0x0FU)
 
#define GYRO_X_NF_COSWZ_LOW_SHIFT   0x00
 
#define INV3REG_GYRO_CONFIG_STATIC7   INV3REG(INV3_BANK1,0x10U)
 
#define GYRO_Y_NF_COSWZ_LOW_SHIFT   0x00
 
#define INV3REG_GYRO_CONFIG_STATIC8   INV3REG(INV3_BANK1,0x11U)
 
#define GYRO_Z_NF_COSWZ_LOW_SHIFT   0x00
 
#define INV3REG_GYRO_CONFIG_STATIC9   INV3REG(INV3_BANK1,0x12U)
 
#define GYRO_X_NF_COSWZ_HIGH_SHIFT   0x00
 
#define GYRO_Y_NF_COSWZ_HIGH_SHIFT   0x01
 
#define GYRO_Z_NF_COSWZ_HIGH_SHIFT   0x02
 
#define GYRO_X_NF_COSWZ_SEL_SHIFT   0x03
 
#define GYRO_Y_NF_COSWZ_SEL_SHIFT   0x04
 
#define GYRO_Z_NF_COSWZ_SEL_SHIFT   0x05
 
#define INV3REG_GYRO_CONFIG_STATIC10   INV3REG(INV3_BANK1,0x13U)
 
#define GYRO_NF_BW_SEL_SHIFT   0x04
 
#define INV3REG_ACCEL_CONFIG_STATIC2   INV3REG(INV3_BANK2,0x03U)
 
#define ACCEL_AAF_DIS   0x01
 
#define ACCEL_AAF_DELT_SHIFT   0x01
 
#define INV3REG_ACCEL_CONFIG_STATIC3   INV3REG(INV3_BANK2,0x04U)
 
#define ACCEL_AAF_DELTSQR_LOW_SHIFT   0x00
 
#define INV3REG_ACCEL_CONFIG_STATIC4   INV3REG(INV3_BANK2,0x05U)
 
#define ACCEL_AAF_DELTSQR_HIGH_SHIFT   0x00
 
#define ACCEL_AAF_BITSHIFT_SHIFT   0x04
 
#define INV3REG_BANK_SEL   0x76
 
#define INV3_WHOAMI_ICM40605   0x33
 
#define INV3_WHOAMI_ICM40609   0x3b
 
#define INV3_WHOAMI_ICM42605   0x42
 
#define INV3_WHOAMI_ICM42688   0x47
 
#define INV3_WHOAMI_IIM42652   0x6f
 
#define INV3_WHOAMI_ICM42670   0x67
 

Detailed Description

Register and address definitions for the Invensense V3 from ardupilot.

Definition in file invensense3_regs.h.

Macro Definition Documentation

◆ ACCEL_AAF_BITSHIFT_SHIFT

#define ACCEL_AAF_BITSHIFT_SHIFT   0x04

Definition at line 179 of file invensense3_regs.h.

◆ ACCEL_AAF_DELT_SHIFT

#define ACCEL_AAF_DELT_SHIFT   0x01

Definition at line 174 of file invensense3_regs.h.

◆ ACCEL_AAF_DELTSQR_HIGH_SHIFT

#define ACCEL_AAF_DELTSQR_HIGH_SHIFT   0x00

Definition at line 178 of file invensense3_regs.h.

◆ ACCEL_AAF_DELTSQR_LOW_SHIFT

#define ACCEL_AAF_DELTSQR_LOW_SHIFT   0x00

Definition at line 176 of file invensense3_regs.h.

◆ ACCEL_AAF_DIS

#define ACCEL_AAF_DIS   0x01

Definition at line 173 of file invensense3_regs.h.

◆ ACCEL_FS_SEL_16G

#define ACCEL_FS_SEL_16G   0x00

Definition at line 119 of file invensense3_regs.h.

◆ ACCEL_FS_SEL_2G

#define ACCEL_FS_SEL_2G   0x03

Definition at line 122 of file invensense3_regs.h.

◆ ACCEL_FS_SEL_4G

#define ACCEL_FS_SEL_4G   0x02

Definition at line 121 of file invensense3_regs.h.

◆ ACCEL_FS_SEL_8G

#define ACCEL_FS_SEL_8G   0x01

Definition at line 120 of file invensense3_regs.h.

◆ ACCEL_FS_SEL_SHIFT

#define ACCEL_FS_SEL_SHIFT   0x05

Definition at line 123 of file invensense3_regs.h.

◆ ACCEL_MODE_LN

#define ACCEL_MODE_LN   0x03

Definition at line 72 of file invensense3_regs.h.

◆ ACCEL_MODE_OFF

#define ACCEL_MODE_OFF   0x00

Definition at line 71 of file invensense3_regs.h.

◆ ACCEL_MODE_SHIFT

#define ACCEL_MODE_SHIFT   0x00

Definition at line 73 of file invensense3_regs.h.

◆ ACCEL_ODR_100HZ

#define ACCEL_ODR_100HZ   0x08

Definition at line 110 of file invensense3_regs.h.

◆ ACCEL_ODR_12_5HZ

#define ACCEL_ODR_12_5HZ   0x0B

Definition at line 113 of file invensense3_regs.h.

◆ ACCEL_ODR_16KHZ

#define ACCEL_ODR_16KHZ   0x02

Definition at line 104 of file invensense3_regs.h.

◆ ACCEL_ODR_1_5625HZ

#define ACCEL_ODR_1_5625HZ   0x0E

Definition at line 116 of file invensense3_regs.h.

◆ ACCEL_ODR_1KHZ

#define ACCEL_ODR_1KHZ   0x06

Definition at line 108 of file invensense3_regs.h.

◆ ACCEL_ODR_200HZ

#define ACCEL_ODR_200HZ   0x07

Definition at line 109 of file invensense3_regs.h.

◆ ACCEL_ODR_25HZ

#define ACCEL_ODR_25HZ   0x0A

Definition at line 112 of file invensense3_regs.h.

◆ ACCEL_ODR_2KHZ

#define ACCEL_ODR_2KHZ   0x05

Definition at line 107 of file invensense3_regs.h.

◆ ACCEL_ODR_32KHZ

#define ACCEL_ODR_32KHZ   0x01

Definition at line 103 of file invensense3_regs.h.

◆ ACCEL_ODR_3_125HZ

#define ACCEL_ODR_3_125HZ   0x0D

Definition at line 115 of file invensense3_regs.h.

◆ ACCEL_ODR_4KHZ

#define ACCEL_ODR_4KHZ   0x04

Definition at line 106 of file invensense3_regs.h.

◆ ACCEL_ODR_500HZ

#define ACCEL_ODR_500HZ   0x0F

Definition at line 117 of file invensense3_regs.h.

◆ ACCEL_ODR_50HZ

#define ACCEL_ODR_50HZ   0x09

Definition at line 111 of file invensense3_regs.h.

◆ ACCEL_ODR_6_25HZ

#define ACCEL_ODR_6_25HZ   0x0C

Definition at line 114 of file invensense3_regs.h.

◆ ACCEL_ODR_8KHZ

#define ACCEL_ODR_8KHZ   0x03

Definition at line 105 of file invensense3_regs.h.

◆ ACCEL_ODR_SHIFT

#define ACCEL_ODR_SHIFT   0x00

Definition at line 118 of file invensense3_regs.h.

◆ BIT_DEVICE_CONFIG_SOFT_RESET_CONFIG

#define BIT_DEVICE_CONFIG_SOFT_RESET_CONFIG   0x01

Definition at line 42 of file invensense3_regs.h.

◆ BIT_DEVICE_CONFIG_SPI_MODE

#define BIT_DEVICE_CONFIG_SPI_MODE   0x10

Definition at line 43 of file invensense3_regs.h.

◆ BIT_FIFO_CONFIG1_ACCEL_EN

#define BIT_FIFO_CONFIG1_ACCEL_EN   0x01

Definition at line 130 of file invensense3_regs.h.

◆ BIT_FIFO_CONFIG1_GYRO_EN

#define BIT_FIFO_CONFIG1_GYRO_EN   0x02

Definition at line 131 of file invensense3_regs.h.

◆ BIT_FIFO_CONFIG1_HIRES_EN

#define BIT_FIFO_CONFIG1_HIRES_EN   0x10

Definition at line 134 of file invensense3_regs.h.

◆ BIT_FIFO_CONFIG1_RESUME_PARTIAL_RD

#define BIT_FIFO_CONFIG1_RESUME_PARTIAL_RD   0x40

Definition at line 136 of file invensense3_regs.h.

◆ BIT_FIFO_CONFIG1_TEMP_EN

#define BIT_FIFO_CONFIG1_TEMP_EN   0x04

Definition at line 132 of file invensense3_regs.h.

◆ BIT_FIFO_CONFIG1_TMST_FSYNC_EN

#define BIT_FIFO_CONFIG1_TMST_FSYNC_EN   0x08

Definition at line 133 of file invensense3_regs.h.

◆ BIT_FIFO_CONFIG1_WM_GT_TH

#define BIT_FIFO_CONFIG1_WM_GT_TH   0x20

Definition at line 135 of file invensense3_regs.h.

◆ BIT_FIFO_FULL_INT_EN

#define BIT_FIFO_FULL_INT_EN   0x02

Definition at line 141 of file invensense3_regs.h.

◆ BIT_FIFO_THS_INT_EN

#define BIT_FIFO_THS_INT_EN   0x04

Definition at line 142 of file invensense3_regs.h.

◆ BIT_GYRO_AAF_DIS

#define BIT_GYRO_AAF_DIS   0x02

Definition at line 149 of file invensense3_regs.h.

◆ BIT_GYRO_NF_DIS

#define BIT_GYRO_NF_DIS   0x01

Definition at line 148 of file invensense3_regs.h.

◆ BIT_INT_ASYNC_RESET

#define BIT_INT_ASYNC_RESET   0x10

Definition at line 145 of file invensense3_regs.h.

◆ BIT_PWM_MGMT_TEMP_DIS

#define BIT_PWM_MGMT_TEMP_DIS   0x10

Definition at line 78 of file invensense3_regs.h.

◆ BIT_PWR_MGMT_IDLE

#define BIT_PWR_MGMT_IDLE   0x08

Definition at line 77 of file invensense3_regs.h.

◆ BIT_SIGNAL_PATH_RESET_ABORT_AND_RESET

#define BIT_SIGNAL_PATH_RESET_ABORT_AND_RESET   0x08

Definition at line 58 of file invensense3_regs.h.

◆ BIT_SIGNAL_PATH_RESET_DMP_INIT_EN

#define BIT_SIGNAL_PATH_RESET_DMP_INIT_EN   0x40

Definition at line 60 of file invensense3_regs.h.

◆ BIT_SIGNAL_PATH_RESET_DMP_MEM_RESET_EN

#define BIT_SIGNAL_PATH_RESET_DMP_MEM_RESET_EN   0x20

Definition at line 59 of file invensense3_regs.h.

◆ BIT_SIGNAL_PATH_RESET_FIFO_FLUSH

#define BIT_SIGNAL_PATH_RESET_FIFO_FLUSH   0x02

Definition at line 56 of file invensense3_regs.h.

◆ BIT_SIGNAL_PATH_RESET_TMST_STROBE

#define BIT_SIGNAL_PATH_RESET_TMST_STROBE   0x04

Definition at line 57 of file invensense3_regs.h.

◆ BIT_TMST_CONFIG_TMST_EN

#define BIT_TMST_CONFIG_TMST_EN   0x01

Definition at line 128 of file invensense3_regs.h.

◆ BIT_UI_DRDY_INT_EN

#define BIT_UI_DRDY_INT_EN   0x08

Definition at line 143 of file invensense3_regs.h.

◆ FIFO_CONFIG_MODE_BYPASS

#define FIFO_CONFIG_MODE_BYPASS   0x00

Definition at line 45 of file invensense3_regs.h.

◆ FIFO_CONFIG_MODE_SHIFT

#define FIFO_CONFIG_MODE_SHIFT   0x06

Definition at line 48 of file invensense3_regs.h.

◆ FIFO_CONFIG_MODE_STOP_ON_FULL

#define FIFO_CONFIG_MODE_STOP_ON_FULL   0x02

Definition at line 47 of file invensense3_regs.h.

◆ FIFO_CONFIG_MODE_STREAM_TO_FIFO

#define FIFO_CONFIG_MODE_STREAM_TO_FIFO   0x01

Definition at line 46 of file invensense3_regs.h.

◆ FIFO_COUNT_BIG_ENDIAN

#define FIFO_COUNT_BIG_ENDIAN   0x20

Definition at line 66 of file invensense3_regs.h.

◆ FIFO_COUNT_REC

#define FIFO_COUNT_REC   0x40

Definition at line 67 of file invensense3_regs.h.

◆ FIFO_HOLD_LAST_DATA_EN

#define FIFO_HOLD_LAST_DATA_EN   0x80

Definition at line 68 of file invensense3_regs.h.

◆ GYRO_AAF_BITSHIFT_SHIFT

#define GYRO_AAF_BITSHIFT_SHIFT   0x04

Definition at line 156 of file invensense3_regs.h.

◆ GYRO_AAF_DELT_SHIFT

#define GYRO_AAF_DELT_SHIFT   0x00

Definition at line 151 of file invensense3_regs.h.

◆ GYRO_AAF_DELTSQR_HIGH_SHIFT

#define GYRO_AAF_DELTSQR_HIGH_SHIFT   0x00

Definition at line 155 of file invensense3_regs.h.

◆ GYRO_AAF_DELTSQR_LOW_SHIFT

#define GYRO_AAF_DELTSQR_LOW_SHIFT   0x00

Definition at line 153 of file invensense3_regs.h.

◆ GYRO_FS_SEL_1000DPS

#define GYRO_FS_SEL_1000DPS   0x01

Definition at line 94 of file invensense3_regs.h.

◆ GYRO_FS_SEL_125DPS

#define GYRO_FS_SEL_125DPS   0x04

Definition at line 97 of file invensense3_regs.h.

◆ GYRO_FS_SEL_15_625DPS

#define GYRO_FS_SEL_15_625DPS   0x07

Definition at line 100 of file invensense3_regs.h.

◆ GYRO_FS_SEL_2000DPS

#define GYRO_FS_SEL_2000DPS   0x00

Definition at line 93 of file invensense3_regs.h.

◆ GYRO_FS_SEL_250DPS

#define GYRO_FS_SEL_250DPS   0x03

Definition at line 96 of file invensense3_regs.h.

◆ GYRO_FS_SEL_31_25DPS

#define GYRO_FS_SEL_31_25DPS   0x06

Definition at line 99 of file invensense3_regs.h.

◆ GYRO_FS_SEL_500DPS

#define GYRO_FS_SEL_500DPS   0x02

Definition at line 95 of file invensense3_regs.h.

◆ GYRO_FS_SEL_62_5DPS

#define GYRO_FS_SEL_62_5DPS   0x05

Definition at line 98 of file invensense3_regs.h.

◆ GYRO_FS_SEL_SHIFT

#define GYRO_FS_SEL_SHIFT   0x05

Definition at line 101 of file invensense3_regs.h.

◆ GYRO_MODE_LN

#define GYRO_MODE_LN   0x03

Definition at line 75 of file invensense3_regs.h.

◆ GYRO_MODE_OFF

#define GYRO_MODE_OFF   0x00

Definition at line 74 of file invensense3_regs.h.

◆ GYRO_MODE_SHIFT

#define GYRO_MODE_SHIFT   0x02

Definition at line 76 of file invensense3_regs.h.

◆ GYRO_NF_BW_SEL_SHIFT

#define GYRO_NF_BW_SEL_SHIFT   0x04

Definition at line 171 of file invensense3_regs.h.

◆ GYRO_ODR_100HZ

#define GYRO_ODR_100HZ   0x08

Definition at line 87 of file invensense3_regs.h.

◆ GYRO_ODR_12_5HZ

#define GYRO_ODR_12_5HZ   0x0B

Definition at line 90 of file invensense3_regs.h.

◆ GYRO_ODR_16KHZ

#define GYRO_ODR_16KHZ   0x02

Definition at line 81 of file invensense3_regs.h.

◆ GYRO_ODR_1KHZ

#define GYRO_ODR_1KHZ   0x06

Definition at line 85 of file invensense3_regs.h.

◆ GYRO_ODR_200HZ

#define GYRO_ODR_200HZ   0x07

Definition at line 86 of file invensense3_regs.h.

◆ GYRO_ODR_25HZ

#define GYRO_ODR_25HZ   0x0A

Definition at line 89 of file invensense3_regs.h.

◆ GYRO_ODR_2KHZ

#define GYRO_ODR_2KHZ   0x05

Definition at line 84 of file invensense3_regs.h.

◆ GYRO_ODR_32KHZ

#define GYRO_ODR_32KHZ   0x01

Definition at line 80 of file invensense3_regs.h.

◆ GYRO_ODR_4KHZ

#define GYRO_ODR_4KHZ   0x04

Definition at line 83 of file invensense3_regs.h.

◆ GYRO_ODR_500HZ

#define GYRO_ODR_500HZ   0x0F

Definition at line 91 of file invensense3_regs.h.

◆ GYRO_ODR_50HZ

#define GYRO_ODR_50HZ   0x09

Definition at line 88 of file invensense3_regs.h.

◆ GYRO_ODR_8KHZ

#define GYRO_ODR_8KHZ   0x03

Definition at line 82 of file invensense3_regs.h.

◆ GYRO_ODR_SHIFT

#define GYRO_ODR_SHIFT   0x00

Definition at line 92 of file invensense3_regs.h.

◆ GYRO_X_NF_COSWZ_HIGH_SHIFT

#define GYRO_X_NF_COSWZ_HIGH_SHIFT   0x00

Definition at line 164 of file invensense3_regs.h.

◆ GYRO_X_NF_COSWZ_LOW_SHIFT

#define GYRO_X_NF_COSWZ_LOW_SHIFT   0x00

Definition at line 158 of file invensense3_regs.h.

◆ GYRO_X_NF_COSWZ_SEL_SHIFT

#define GYRO_X_NF_COSWZ_SEL_SHIFT   0x03

Definition at line 167 of file invensense3_regs.h.

◆ GYRO_Y_NF_COSWZ_HIGH_SHIFT

#define GYRO_Y_NF_COSWZ_HIGH_SHIFT   0x01

Definition at line 165 of file invensense3_regs.h.

◆ GYRO_Y_NF_COSWZ_LOW_SHIFT

#define GYRO_Y_NF_COSWZ_LOW_SHIFT   0x00

Definition at line 160 of file invensense3_regs.h.

◆ GYRO_Y_NF_COSWZ_SEL_SHIFT

#define GYRO_Y_NF_COSWZ_SEL_SHIFT   0x04

Definition at line 168 of file invensense3_regs.h.

◆ GYRO_Z_NF_COSWZ_HIGH_SHIFT

#define GYRO_Z_NF_COSWZ_HIGH_SHIFT   0x02

Definition at line 166 of file invensense3_regs.h.

◆ GYRO_Z_NF_COSWZ_LOW_SHIFT

#define GYRO_Z_NF_COSWZ_LOW_SHIFT   0x00

Definition at line 162 of file invensense3_regs.h.

◆ GYRO_Z_NF_COSWZ_SEL_SHIFT

#define GYRO_Z_NF_COSWZ_SEL_SHIFT   0x05

Definition at line 169 of file invensense3_regs.h.

◆ INV3_BANK0

#define INV3_BANK0   0x00U

Definition at line 31 of file invensense3_regs.h.

◆ INV3_BANK1

#define INV3_BANK1   0x01U

Definition at line 32 of file invensense3_regs.h.

◆ INV3_BANK2

#define INV3_BANK2   0x02U

Definition at line 33 of file invensense3_regs.h.

◆ INV3_BANK3

#define INV3_BANK3   0x03U

Definition at line 34 of file invensense3_regs.h.

◆ INV3_READ_FLAG

#define INV3_READ_FLAG   0x80

Definition at line 38 of file invensense3_regs.h.

◆ INV3_WHOAMI_ICM40605

#define INV3_WHOAMI_ICM40605   0x33

Definition at line 184 of file invensense3_regs.h.

◆ INV3_WHOAMI_ICM40609

#define INV3_WHOAMI_ICM40609   0x3b

Definition at line 185 of file invensense3_regs.h.

◆ INV3_WHOAMI_ICM42605

#define INV3_WHOAMI_ICM42605   0x42

Definition at line 186 of file invensense3_regs.h.

◆ INV3_WHOAMI_ICM42670

#define INV3_WHOAMI_ICM42670   0x67

Definition at line 189 of file invensense3_regs.h.

◆ INV3_WHOAMI_ICM42688

#define INV3_WHOAMI_ICM42688   0x47

Definition at line 187 of file invensense3_regs.h.

◆ INV3_WHOAMI_IIM42652

#define INV3_WHOAMI_IIM42652   0x6f

Definition at line 188 of file invensense3_regs.h.

◆ INV3REG

#define INV3REG (   b,
 
)    ((((uint16_t)b) << 8)|(r))

Definition at line 37 of file invensense3_regs.h.

◆ INV3REG_ACCEL_CONFIG0

#define INV3REG_ACCEL_CONFIG0   INV3REG(INV3_BANK0,0x50U)

Definition at line 102 of file invensense3_regs.h.

◆ INV3REG_ACCEL_CONFIG1

#define INV3REG_ACCEL_CONFIG1   INV3REG(INV3_BANK0,0x53U)

Definition at line 126 of file invensense3_regs.h.

◆ INV3REG_ACCEL_CONFIG_STATIC2

#define INV3REG_ACCEL_CONFIG_STATIC2   INV3REG(INV3_BANK2,0x03U)

Definition at line 172 of file invensense3_regs.h.

◆ INV3REG_ACCEL_CONFIG_STATIC3

#define INV3REG_ACCEL_CONFIG_STATIC3   INV3REG(INV3_BANK2,0x04U)

Definition at line 175 of file invensense3_regs.h.

◆ INV3REG_ACCEL_CONFIG_STATIC4

#define INV3REG_ACCEL_CONFIG_STATIC4   INV3REG(INV3_BANK2,0x05U)

Definition at line 177 of file invensense3_regs.h.

◆ INV3REG_ACCEL_DATA_X1

#define INV3REG_ACCEL_DATA_X1   INV3REG(INV3_BANK0,0x1FU)

Definition at line 50 of file invensense3_regs.h.

◆ INV3REG_BANK_SEL

#define INV3REG_BANK_SEL   0x76

Definition at line 181 of file invensense3_regs.h.

◆ INV3REG_DEVICE_CONFIG

#define INV3REG_DEVICE_CONFIG   INV3REG(INV3_BANK0,0x11U)

Definition at line 41 of file invensense3_regs.h.

◆ INV3REG_FIFO_CONFIG

#define INV3REG_FIFO_CONFIG   INV3REG(INV3_BANK0,0x16U)

Definition at line 44 of file invensense3_regs.h.

◆ INV3REG_FIFO_CONFIG1

#define INV3REG_FIFO_CONFIG1   INV3REG(INV3_BANK0,0x5FU)

Definition at line 129 of file invensense3_regs.h.

◆ INV3REG_FIFO_CONFIG2

#define INV3REG_FIFO_CONFIG2   INV3REG(INV3_BANK0,0x60U)

Definition at line 137 of file invensense3_regs.h.

◆ INV3REG_FIFO_CONFIG3

#define INV3REG_FIFO_CONFIG3   INV3REG(INV3_BANK0,0x61U)

Definition at line 138 of file invensense3_regs.h.

◆ INV3REG_FIFO_COUNTH

#define INV3REG_FIFO_COUNTH   INV3REG(INV3_BANK0,0x2EU)

Definition at line 52 of file invensense3_regs.h.

◆ INV3REG_FIFO_COUNTL

#define INV3REG_FIFO_COUNTL   INV3REG(INV3_BANK0,0x2FU)

Definition at line 53 of file invensense3_regs.h.

◆ INV3REG_FIFO_DATA

#define INV3REG_FIFO_DATA   INV3REG(INV3_BANK0,0x30U)

Definition at line 54 of file invensense3_regs.h.

◆ INV3REG_GYRO_ACCEL_CONFIG0

#define INV3REG_GYRO_ACCEL_CONFIG0   INV3REG(INV3_BANK0,0x52U)

Definition at line 125 of file invensense3_regs.h.

◆ INV3REG_GYRO_CONFIG0

#define INV3REG_GYRO_CONFIG0   INV3REG(INV3_BANK0,0x4FU)

Definition at line 79 of file invensense3_regs.h.

◆ INV3REG_GYRO_CONFIG1

#define INV3REG_GYRO_CONFIG1   INV3REG(INV3_BANK0,0x51U)

Definition at line 124 of file invensense3_regs.h.

◆ INV3REG_GYRO_CONFIG_STATIC10

#define INV3REG_GYRO_CONFIG_STATIC10   INV3REG(INV3_BANK1,0x13U)

Definition at line 170 of file invensense3_regs.h.

◆ INV3REG_GYRO_CONFIG_STATIC2

#define INV3REG_GYRO_CONFIG_STATIC2   INV3REG(INV3_BANK1,0x0BU)

Definition at line 147 of file invensense3_regs.h.

◆ INV3REG_GYRO_CONFIG_STATIC3

#define INV3REG_GYRO_CONFIG_STATIC3   INV3REG(INV3_BANK1,0x0CU)

Definition at line 150 of file invensense3_regs.h.

◆ INV3REG_GYRO_CONFIG_STATIC4

#define INV3REG_GYRO_CONFIG_STATIC4   INV3REG(INV3_BANK1,0x0DU)

Definition at line 152 of file invensense3_regs.h.

◆ INV3REG_GYRO_CONFIG_STATIC5

#define INV3REG_GYRO_CONFIG_STATIC5   INV3REG(INV3_BANK1,0x0EU)

Definition at line 154 of file invensense3_regs.h.

◆ INV3REG_GYRO_CONFIG_STATIC6

#define INV3REG_GYRO_CONFIG_STATIC6   INV3REG(INV3_BANK1,0x0FU)

Definition at line 157 of file invensense3_regs.h.

◆ INV3REG_GYRO_CONFIG_STATIC7

#define INV3REG_GYRO_CONFIG_STATIC7   INV3REG(INV3_BANK1,0x10U)

Definition at line 159 of file invensense3_regs.h.

◆ INV3REG_GYRO_CONFIG_STATIC8

#define INV3REG_GYRO_CONFIG_STATIC8   INV3REG(INV3_BANK1,0x11U)

Definition at line 161 of file invensense3_regs.h.

◆ INV3REG_GYRO_CONFIG_STATIC9

#define INV3REG_GYRO_CONFIG_STATIC9   INV3REG(INV3_BANK1,0x12U)

Definition at line 163 of file invensense3_regs.h.

◆ INV3REG_INT_CONFIG1

#define INV3REG_INT_CONFIG1   INV3REG(INV3_BANK0,0x64U)

Definition at line 144 of file invensense3_regs.h.

◆ INV3REG_INT_SOURCE0

#define INV3REG_INT_SOURCE0   INV3REG(INV3_BANK0,0x65U)

Definition at line 139 of file invensense3_regs.h.

◆ INV3REG_INT_SOURCE3

#define INV3REG_INT_SOURCE3   INV3REG(INV3_BANK0,0x68U)

Definition at line 140 of file invensense3_regs.h.

◆ INV3REG_INT_STATUS

#define INV3REG_INT_STATUS   INV3REG(INV3_BANK0,0x2DU)

Definition at line 51 of file invensense3_regs.h.

◆ INV3REG_INTF_CONFIG0

#define INV3REG_INTF_CONFIG0   INV3REG(INV3_BANK0,0x4CU)

Definition at line 61 of file invensense3_regs.h.

◆ INV3REG_INTF_CONFIG1

#define INV3REG_INTF_CONFIG1   INV3REG(INV3_BANK0,0x4DU)

Definition at line 69 of file invensense3_regs.h.

◆ INV3REG_PWR_MGMT0

#define INV3REG_PWR_MGMT0   INV3REG(INV3_BANK0,0x4EU)

Definition at line 70 of file invensense3_regs.h.

◆ INV3REG_SIGNAL_PATH_RESET

#define INV3REG_SIGNAL_PATH_RESET   INV3REG(INV3_BANK0,0x4BU)

Definition at line 55 of file invensense3_regs.h.

◆ INV3REG_TEMP_DATA1

#define INV3REG_TEMP_DATA1   INV3REG(INV3_BANK0,0x1DU)

Definition at line 49 of file invensense3_regs.h.

◆ INV3REG_TMST_CONFIG

#define INV3REG_TMST_CONFIG   INV3REG(INV3_BANK0,0x54U)

Definition at line 127 of file invensense3_regs.h.

◆ INV3REG_WHO_AM_I

#define INV3REG_WHO_AM_I   INV3REG(INV3_BANK0,0x75U)

Definition at line 146 of file invensense3_regs.h.

◆ SENSOR_DATA_BIG_ENDIAN

#define SENSOR_DATA_BIG_ENDIAN   0x10

Definition at line 65 of file invensense3_regs.h.

◆ UI_SIFS_CFG_I2C_DIS

#define UI_SIFS_CFG_I2C_DIS   0x03

Definition at line 63 of file invensense3_regs.h.

◆ UI_SIFS_CFG_SHIFT

#define UI_SIFS_CFG_SHIFT   0x00

Definition at line 64 of file invensense3_regs.h.

◆ UI_SIFS_CFG_SPI_DIS

#define UI_SIFS_CFG_SPI_DIS   0x02

Definition at line 62 of file invensense3_regs.h.