Collaboration diagram for SPI Interface:

Data Structures
struct	spi_transaction
	SPI transaction structure. More...

struct	spi_periph
	SPI peripheral structure. More...

Macros
#define	SPI_TRANSACTION_QUEUE_LEN 8
	SPI transaction queue length. More...

#define	SPI_SLAVE0 0

#define	SPI_SLAVE1 1

#define	SPI_SLAVE2 2

#define	SPI_SLAVE3 3

#define	SPI_SLAVE4 4

#define	SPI_SLAVE5 5

Typedefs
typedef void(*	SPICallback )(struct spi_transaction *trans)
	SPI Callback function. More...

Enumerations
enum	SPIMode { SPIMaster, SPISlave }

enum	SPISlaveSelect { SPISelectUnselect, SPISelect, SPIUnselect, SPINoSelect }
	SPI slave selection behavior options. More...

enum	SPIClockPhase { SPICphaEdge1, SPICphaEdge2 }
	SPI CPHA (clock phase) options. More...

enum	SPIClockPolarity { SPICpolIdleLow, SPICpolIdleHigh }
	SPI CPOL (clock polarity) options. More...

enum	SPIDataSizeSelect { SPIDss8bit, SPIDss16bit }
	SPI data word size of transfer. More...

enum	SPITransactionStatus { SPITransPending, SPITransRunning, SPITransSuccess, SPITransFailed, SPITransDone }
	SPI transaction status. More...

enum	SPIStatus { SPIIdle, SPIRunning }
	SPI peripheral status. More...

enum	SPIBitOrder { SPIMSBFirst, SPILSBFirst }

enum	SPIClockDiv { SPIDiv2, SPIDiv4, SPIDiv8, SPIDiv16, SPIDiv32, SPIDiv64, SPIDiv128, SPIDiv256 }
	Peripheral clock divider. More...

Functions
void	spi0_init (void)

void	spi0_arch_init (void)
	Architecture dependent SPI0 initialization. More...

void	spi1_init (void)

void	spi1_arch_init (void)
	Architecture dependent SPI1 initialization. More...

void	spi2_init (void)

void	spi2_arch_init (void)
	Architecture dependent SPI2 initialization. More...

void	spi_init (struct spi_periph *p)
	Initialize a spi peripheral. More...

void	spi_init_slaves (void)
	Initialize all used slaves and unselect them. More...

bool	spi_submit (struct spi_periph p, struct spi_transaction t)
	Submit a spi transaction. More...

void	spi_slave_select (uint8_t slave)
	Select a slave. More...

void	spi_slave_unselect (uint8_t slave)
	Unselect a slave. More...

bool	spi_lock (struct spi_periph *p, uint8_t slave)
	Lock the SPI fifo. More...

bool	spi_resume (struct spi_periph *p, uint8_t slave)
	Resume the SPI fifo. More...

void	spi_slave_init (struct spi_periph *p)
	Initialize a spi peripheral in slave mode. More...

bool	spi_slave_register (struct spi_periph p, struct spi_transaction t)
	Register a spi transaction in slave mode (only one transaction can be registered). More...

bool	spi_slave_wait (struct spi_periph *p)
	Initialized and wait for the next transaction. More...

Variables
struct spi_periph	spi0

struct spi_periph	spi1
	receive transferred over DMA More...

struct spi_periph	spi2
	receive transferred over DMA More...

Detailed Description

Data Structure Documentation

struct spi_transaction

SPI transaction structure.

Use this structure to store a request of SPI transaction and submit it using spi_submit function
The input/output buffers needs to be created separately
Take care of pointing input_buf/ouput_buf correctly
input_length and output_length can be different, the larger number of the two specifies the total number of exchanged words,
if input_length is larger than output length, 0 is sent for the remaining words

Definition at line 142 of file spi.h.

Collaboration diagram for spi_transaction:

Data Fields
SPICallback	after_cb	NULL or function called after the transaction.
SPICallback	before_cb	NULL or function called before the transaction.
enum SPIBitOrder	bitorder	MSB/LSB order.
enum SPIClockDiv	cdiv	prescaler of main clock to use as SPI clock
enum SPIClockPhase	cpha	clock phase control
enum SPIClockPolarity	cpol	clock polarity control
enum SPIDataSizeSelect	dss	data transfer word size
volatile uint8_t *	input_buf	pointer to receive buffer for DMA
uint16_t	input_length	number of data words to read
volatile uint8_t *	output_buf	pointer to transmit buffer for DMA
uint16_t	output_length	number of data words to write
enum SPISlaveSelect	select	slave selection behavior
uint8_t	slave_idx	slave id: SPI_SLAVE0 to SPI_SLAVE4
enum SPITransactionStatus	status

struct spi_periph

SPI peripheral structure.

Definition at line 168 of file spi.h.

Collaboration diagram for spi_periph:

Data Fields
void *	init_struct
enum SPIMode	mode
void *	reg_addr
volatile uint8_t	rx_idx_buf
enum SPIStatus	status	internal state of the peripheral
volatile uint8_t	suspend	control for stop/resume of the fifo
struct spi_transaction *	trans[SPI_TRANSACTION_QUEUE_LEN]	circular buffer holding transactions
uint8_t	trans_extract_idx
uint8_t	trans_insert_idx
volatile uint8_t	tx_idx_buf

Macro Definition Documentation

#define SPI_SLAVE0 0

Definition at line 186 of file spi.h.

Referenced by mcp355x_init(), spi_init_slaves(), SpiSlaveSelect(), and SpiSlaveUnselect().

#define SPI_SLAVE1 1

Definition at line 187 of file spi.h.

Referenced by spi_init_slaves(), SpiSlaveSelect(), and SpiSlaveUnselect().

#define SPI_SLAVE2 2

Definition at line 188 of file spi.h.

Referenced by imu_px4fmu_init().

#define SPI_SLAVE3 3

Definition at line 189 of file spi.h.

#define SPI_SLAVE4 4

Definition at line 190 of file spi.h.

#define SPI_SLAVE5 5

Definition at line 191 of file spi.h.

#define SPI_TRANSACTION_QUEUE_LEN 8

SPI transaction queue length.

Number of transactions that can be queued.

Definition at line 163 of file spi.h.

Referenced by handle_spi_thd(), spi_next_transaction(), spi_submit(), and SpiEndOfTransaction().

Typedef Documentation

typedef void(* SPICallback)(struct spi_transaction *trans)

SPI Callback function.

If not NULL (or 0), call function (with transaction as parameter) before or after transaction, e.g to allow execution of hardware specific actions

Definition at line 130 of file spi.h.

Enumeration Type Documentation

enum SPIBitOrder

Enumerator
SPIMSBFirst
SPILSBFirst

Definition at line 105 of file spi.h.

enum SPIClockDiv

Peripheral clock divider.

Defines the SPI baudrate

Enumerator
SPIDiv2
SPIDiv4
SPIDiv8
SPIDiv16
SPIDiv32
SPIDiv64
SPIDiv128
SPIDiv256

Definition at line 113 of file spi.h.

enum SPIClockPhase

SPI CPHA (clock phase) options.

Control whether data line is sampled at first or second edge of clock signal.

Enumerator
SPICphaEdge1	CPHA = 0.
SPICphaEdge2	CPHA = 1.

Definition at line 67 of file spi.h.

enum SPIClockPolarity

SPI CPOL (clock polarity) options.

Control whether clock line is held low or high in idle state.

Enumerator
SPICpolIdleLow	CPOL = 0.
SPICpolIdleHigh	CPOL = 1.

Definition at line 76 of file spi.h.

enum SPIDataSizeSelect

SPI data word size of transfer.

Enumerator
SPIDss8bit
SPIDss16bit

Definition at line 83 of file spi.h.

enum SPIMode

Enumerator
SPIMaster
SPISlave

Definition at line 46 of file spi.h.

enum SPISlaveSelect

SPI slave selection behavior options.

Default operation should be SelectUnselected, but some peripherals might need some special control. Use non-default control only if you know what you're doing.

Enumerator
SPISelectUnselect	slave is selected before transaction and unselected after
SPISelect	slave is selected before transaction but not unselected
SPIUnselect	slave is not selected but unselected after transaction
SPINoSelect	slave is not selected nor unselected

Definition at line 56 of file spi.h.

enum SPIStatus

SPI peripheral status.

Enumerator
SPIIdle
SPIRunning

Definition at line 100 of file spi.h.

enum SPITransactionStatus

SPI transaction status.

Enumerator
SPITransPending
SPITransRunning
SPITransSuccess
SPITransFailed
SPITransDone

Definition at line 90 of file spi.h.

Function Documentation

void spi0_arch_init ( void )

Architecture dependent SPI0 initialization.

Must be implemented by underlying architecture

Definition at line 136 of file spi_arch.c.

References fd, spi_periph::init_struct, spi_periph::reg_addr, spi0, SPI0, SPI0_BITS_PER_WORD, SPI0_LSB_FIRST, SPI0_MAX_SPEED_HZ, SPI0_MODE, and VIC_SPI0.

Referenced by spi0_init().

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void spi0_init ( void )

Definition at line 37 of file spi.c.

References spi0, spi0_arch_init(), and spi_init().

Referenced by mcu_init().

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void spi1_arch_init ( void )

Architecture dependent SPI1 initialization.

Must be implemented by underlying architecture

Definition at line 288 of file spi_arch.c.

References _VIC_ADDR, _VIC_CNTL, locm3_spi_comm::br, spi_periph_dma::comm, spi_periph_dma::comm_sig, locm3_spi_comm::cpha, locm3_spi_comm::cpol, locm3_spi_comm::dff, spi_periph_dma::dma, FALSE, fd, get_comm_signature(), gpio_setup_pin_af(), locm3_spi_comm::lsbfirst, MASTER_SSP_CPHA, MASTER_SSP_CPOL, MASTER_SSP_DSS, MASTER_SSP_FRF, MASTER_SSP_LBM, MASTER_SSP_MS, MASTER_SSP_SCR, MASTER_SSP_SOD, PINSEL1, spi_periph_dma::rcc_dma, spi_periph_dma::rx_chan, spi_periph_dma::rx_chan_sel, spi_periph_dma::rx_dummy_buf, spi_periph_dma::rx_extra_dummy_dma, spi_periph_dma::rx_nvic_irq, set_default_comm_config(), SPI1, spi1, SPI1_BITS_PER_WORD, spi1_dma, SPI1_GPIO_AF, SPI1_GPIO_MISO, SPI1_GPIO_MOSI, SPI1_GPIO_PORT_MISO, SPI1_GPIO_PORT_MOSI, SPI1_GPIO_PORT_SCK, SPI1_GPIO_SCK, spi1_ISR(), SPI1_LSB_FIRST, SPI1_MAX_SPEED_HZ, SPI1_MODE, SPI1_VIC_SLOT, spi_arch_int_enable(), spi_periph_dma::spidr, SPIIdle, SSP_PINSEL1_MISO, SSP_PINSEL1_MOSI, SSP_PINSEL1_SCK, SSPCPSR, SSPCPSR_VAL, SSPCR0, SSPCR1, thd_spi1(), TRUE, spi_periph_dma::tx_chan, spi_periph_dma::tx_chan_sel, spi_periph_dma::tx_dummy_buf, spi_periph_dma::tx_extra_dummy_dma, spi_periph_dma::tx_nvic_irq, VIC_BIT, VIC_ENABLE, VIC_SPI1, VICIntEnable, and VICIntSelect.

Referenced by spi1_init().

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void spi1_init ( void )

Definition at line 48 of file spi.c.

References spi1, spi1_arch_init(), and spi_init().

Referenced by mcu_init().

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void spi2_arch_init ( void )

Architecture dependent SPI2 initialization.

Must be implemented by underlying architecture

Definition at line 312 of file spi_arch.c.

References locm3_spi_comm::br, spi_periph_dma::comm, spi_periph_dma::comm_sig, locm3_spi_comm::cpha, locm3_spi_comm::cpol, locm3_spi_comm::dff, spi_periph_dma::dma, FALSE, get_comm_signature(), gpio_setup_pin_af(), locm3_spi_comm::lsbfirst, spi_periph_dma::rcc_dma, spi_periph_dma::rx_chan, spi_periph_dma::rx_chan_sel, spi_periph_dma::rx_dummy_buf, spi_periph_dma::rx_extra_dummy_dma, spi_periph_dma::rx_nvic_irq, set_default_comm_config(), spi2, spi2_dma, SPI2_GPIO_AF, SPI2_GPIO_MISO, SPI2_GPIO_MOSI, SPI2_GPIO_PORT_MISO, SPI2_GPIO_PORT_MOSI, SPI2_GPIO_PORT_SCK, SPI2_GPIO_SCK, spi_arch_int_enable(), spi_periph_dma::spidr, SPIIdle, thd_spi2(), TRUE, spi_periph_dma::tx_chan, spi_periph_dma::tx_chan_sel, spi_periph_dma::tx_dummy_buf, spi_periph_dma::tx_extra_dummy_dma, and spi_periph_dma::tx_nvic_irq.

Referenced by spi2_init().

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void spi2_init ( void )

Definition at line 59 of file spi.c.

References spi2, spi2_arch_init(), and spi_init().

Referenced by mcu_init().

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void spi_init ( struct spi_periph * p )

Initialize a spi peripheral.

Parameters

p	spi peripheral to be configured

Definition at line 78 of file spi.c.

References spi_periph::mode, SPIIdle, SPIMaster, spi_periph::status, spi_periph::suspend, spi_periph::trans_extract_idx, and spi_periph::trans_insert_idx.

Referenced by spi0_init(), spi1_init(), and spi2_init().

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void spi_init_slaves ( void )

Initialize all used slaves and unselect them.

Definition at line 510 of file spi_arch.c.

References gpio_setup_output(), SPI_SELECT_SLAVE0_IODIR, SPI_SELECT_SLAVE0_PIN, SPI_SELECT_SLAVE0_PINSEL, SPI_SELECT_SLAVE0_PINSEL_BIT, SPI_SELECT_SLAVE0_PINSEL_VAL, SPI_SELECT_SLAVE0_PORT, SPI_SELECT_SLAVE1_IODIR, SPI_SELECT_SLAVE1_PIN, SPI_SELECT_SLAVE1_PINSEL, SPI_SELECT_SLAVE1_PINSEL_BIT, SPI_SELECT_SLAVE1_PINSEL_VAL, SPI_SELECT_SLAVE1_PORT, SPI_SELECT_SLAVE2_PIN, SPI_SELECT_SLAVE2_PORT, SPI_SELECT_SLAVE3_PIN, SPI_SELECT_SLAVE3_PORT, SPI_SELECT_SLAVE4_PIN, SPI_SELECT_SLAVE4_PORT, SPI_SELECT_SLAVE5_PIN, SPI_SELECT_SLAVE5_PORT, SPI_SLAVE0, SPI_SLAVE1, spi_slave_unselect(), and SpiSlaveUnselect().

Referenced by mcu_init().

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bool spi_lock	(	struct spi_periph *	p,
		uint8_t	slave
	)

Lock the SPI fifo.

This will stop the SPI fifo after the current transaction if any, or before the next one if none are pending. Only the slave that locks the fifo can unlock it.

Parameters

p	spi peripheral to be used
slave	slave id

Returns: true if correctly locked

Lock the SPI fifo.

Empty, for paparazzi compatibility only

Definition at line 482 of file spi_arch.c.

References FALSE, spi_periph::init_struct, spi_arch_int_disable(), spi_arch_int_enable(), spi_periph::suspend, TRUE, VIC_BIT, VICIntEnable, and VICIntEnClear.

Referenced by max1168_lock_cb().

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bool spi_resume	(	struct spi_periph *	p,
		uint8_t	slave
	)

Resume the SPI fifo.

Only the slave that locks the fifo can unlock it.

Parameters

p	spi peripheral to be used
slave	slave id

Returns: true if correctly unlocked

Resume the SPI fifo.

Empty, for paparazzi compatibility only

Definition at line 496 of file spi_arch.c.

References FALSE, spi_periph::init_struct, spi_arch_int_disable(), spi_arch_int_enable(), spi_start_dma_transaction(), SPIIdle, SpiStart(), spi_periph::status, spi_periph::suspend, spi_periph::trans, spi_periph::trans_extract_idx, spi_periph::trans_insert_idx, TRUE, VIC_BIT, VICIntEnable, and VICIntEnClear.

Referenced by max1168_event().

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void spi_slave_init ( struct spi_periph * p )

Initialize a spi peripheral in slave mode.

Parameters

p	spi peripheral to be configured

Definition at line 136 of file spi.c.

References spi_periph::mode, SPIIdle, SPISlave, spi_periph::status, spi_periph::suspend, spi_periph::trans_extract_idx, and spi_periph::trans_insert_idx.

bool spi_slave_register	(	struct spi_periph *	p,
		struct spi_transaction *	t
	)

Register a spi transaction in slave mode (only one transaction can be registered).

Must be implemented by the underlying architecture

Parameters

p	spi peripheral to be used
t	spi transaction

Returns: return true if registered with success

Register a spi transaction in slave mode (only one transaction can be registered).

Definition at line 679 of file spi_arch.c.

References spi_periph_dma::comm_sig, spi_transaction::cpha, spi_transaction::cpol, spi_periph_dma::dma, spi_transaction::dss, get_transaction_signature(), spi_periph::init_struct, spi_transaction::input_buf, spi_transaction::input_length, spi_transaction::output_buf, spi_transaction::output_length, spi_periph_dma::rcc_dma, spi_periph::reg_addr, spi_periph_dma::rx_chan, spi_periph_dma::rx_chan_sel, spi_arch_int_enable(), spi_configure_dma(), spi_slave_set_config(), SpiClearCPHA(), SpiClearCPOL(), SPICphaEdge2, SPICpolIdleHigh, spi_periph_dma::spidr, SPIIdle, SPIRunning, SpiSetCPHA(), SpiSetCPOL(), SpiSetDataSize(), SPITransFailed, SPITransPending, SPITransRunning, spi_transaction::status, spi_periph::status, spi_periph::trans, spi_periph::trans_insert_idx, TRUE, spi_periph_dma::tx_chan, and spi_periph_dma::tx_chan_sel.

Referenced by bluegiga_init(), bluegiga_receive(), qr_code_spi_link_init(), and qr_code_spi_link_periodic().

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void spi_slave_select ( uint8_t slave )

Select a slave.

Parameters

slave slave id

Select a slave.

Definition at line 397 of file spi_arch.c.

References gpio_clear(), SPI_SELECT_SLAVE0_PIN, SPI_SELECT_SLAVE0_PORT, SPI_SELECT_SLAVE1_PIN, SPI_SELECT_SLAVE1_PORT, SPI_SELECT_SLAVE2_PIN, SPI_SELECT_SLAVE2_PORT, SPI_SELECT_SLAVE3_PIN, SPI_SELECT_SLAVE3_PORT, SPI_SELECT_SLAVE4_PIN, SPI_SELECT_SLAVE4_PORT, SPI_SELECT_SLAVE5_PIN, SPI_SELECT_SLAVE5_PORT, and SpiSlaveSelect().

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void spi_slave_unselect ( uint8_t slave )

Unselect a slave.

Parameters

slave slave id

Unselect a slave.

Definition at line 439 of file spi_arch.c.

References gpio_set(), SPI_SELECT_SLAVE0_PIN, SPI_SELECT_SLAVE0_PORT, SPI_SELECT_SLAVE1_PIN, SPI_SELECT_SLAVE1_PORT, SPI_SELECT_SLAVE2_PIN, SPI_SELECT_SLAVE2_PORT, SPI_SELECT_SLAVE3_PIN, SPI_SELECT_SLAVE3_PORT, SPI_SELECT_SLAVE4_PIN, SPI_SELECT_SLAVE4_PORT, SPI_SELECT_SLAVE5_PIN, SPI_SELECT_SLAVE5_PORT, and SpiSlaveUnselect().

Referenced by max1168_event(), and spi_init_slaves().

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bool spi_slave_wait ( struct spi_periph * p )

Initialized and wait for the next transaction.

If a transaction is registered for this peripheral, the spi will be waiting for a communication from the master

Parameters

p	spi peripheral to be used

Returns: return true if a transaction was register for this peripheral

Definition at line 703 of file spi_arch.c.

References SpiSlaveStart(), spi_periph::trans, spi_periph::trans_extract_idx, and spi_periph::trans_insert_idx.

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bool spi_submit	(	struct spi_periph *	p,
		struct spi_transaction *	t
	)

Submit a spi transaction.

Must be implemented by the underlying architecture

Parameters

p	spi peripheral to be used
t	spi transaction

Returns: TRUE if insertion to the transaction queue succeeded

Submit a spi transaction.

Interafces Paparazzi SPI code with ChibiOS SPI driver. The transaction length is max(rx,tx), before and after callbacks are called accordingly.

ChibiOS doesn't provide error checking for the SPI transactions, since all spi functions are return void. The SPI transaction is synchronous, so we always assume success if the transaction finishes.

There is no explicit timeout on SPI transaction. TODO: Timeout on SPI trans and error detection.

Parameters