Paparazzi UAS  v5.18.0_stable
Paparazzi is a free software Unmanned Aircraft System.
direct_memory_logger.c
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1 /*
2  * Copyright (C) 2014 Freek van Tienen <freek.v.tienen@gmail.com>
3  *
4  * This file is part of paparazzi.
5  *
6  * paparazzi is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2, or (at your option)
9  * any later version.
10  *
11  * paparazzi is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with paparazzi; see the file COPYING. If not, write to
18  * the Free Software Foundation, 59 Temple Place - Suite 330,
19  * Boston, MA 02111-1307, USA.
20  *
21  */
22 
28 #include "direct_memory_logger.h"
29 #include "mcu_periph/uart.h"
30 #include "subsystems/imu.h"
31 #include "stabilization.h"
32 
34 static void direct_memory_spi_cb(struct spi_transaction *trans);
35 static int32_t seq_in_array(uint8_t *array, uint16_t array_size, uint8_t *sequence, uint16_t sequence_size);
36 
37 // Different sequences
38 static uint8_t start_log_sequence[6] = {0xAA, 0x55, 0xFF, 0x00, 0x55, 0xAA};
39 static uint8_t stop_log_sequence[6] = {0xFF, 0x00, 0x55, 0xAA, 0x10, 0xFF};
40 
41 
42 // Logging struct
43 struct LogStruct {
50 } __attribute__((packed));
51 static struct LogStruct log_struct;
52 static uint32_t dm_counter = 0;
53 
54 static int32_t seq_in_array(uint8_t *array, uint16_t array_size, uint8_t *sequence, uint16_t sequence_size)
55 {
56  uint16_t i;
57  static uint16_t current_sequence_id = 0;
58  static uint16_t count_ff = 0;
59 
60  for (i = 0; i < array_size; i++) {
61 
62  // Detect stop sequence
63  if (array[i] == sequence[current_sequence_id]) {
64  current_sequence_id++;
65  if (current_sequence_id >= sequence_size) {
66  count_ff = 0;
67  current_sequence_id = 0;
68  return i;
69  }
70  } else {
71  current_sequence_id = 0;
72  }
73 
74  // Detect ff sequence
75  if (array[i] == 0xFF) {
76  count_ff++;
77 
78  if (count_ff >= 1000) {
79  count_ff = 0;
80  current_sequence_id = 0;
81  return i;
82  }
83  } else {
84  count_ff = 0;
85  }
86  }
87 
88  return -1;
89 }
90 
92 {
94 
95  // Initialize the sst chip
96  sst25vfxxxx_init(&dml.sst, &(DM_LOG_SPI_DEV), DM_LOG_SPI_SLAVE_IDX, &direct_memory_spi_cb);
97 }
98 
100 {
101  int32_t seq_idx;
102  uint16_t i, end_idx;
103 
104  // Switch the different statusses
105  switch (dml.status) {
106  case DML_IDLE:
107  // Do nothing
108  break;
109 
110  // Stopping
111  case DML_STOP:
112  if (dml.sst.status != SST25VFXXXX_IDLE) {
113  break;
114  }
115 
116  dml.status = DML_IDLE;
119  break;
120 
121  // Logging
122  case DML_START:
123  dm_counter = 0;
125  case DML_LOGGING:
126  // Check if too slow TODO fix error
127  dm_counter++;
128  if (dml.sst.status != SST25VFXXXX_IDLE) {
129  break;
130  }
131 
132  // Set the log values
138  log_struct.thrust = stabilization_cmd[COMMAND_THRUST];
139 
140  sst25vfxxxx_write(&dml.sst, (uint8_t *) &log_struct, sizeof(struct LogStruct));
141  break;
142 
143  // Reading
144  case DML_READ:
146  case DML_READING:
147 
148  if (DM_LOG_UART.tx_running || dml.sst.status != SST25VFXXXX_IDLE) {
149  break;
150  }
151 
152  // Detect end sequence
153  seq_idx = seq_in_array(&(dml.buffer[5]), DML_BUF_SIZE - 5, stop_log_sequence, 6);
154  if (seq_idx < 0) {
155  end_idx = DML_BUF_SIZE;
156  } else {
157  end_idx = seq_idx + 5;
158  dml.status = DML_IDLE;
159  }
160 
161  for (i = 5; i < end_idx; i++) {
162  uart_put_byte(&DM_LOG_UART, 0, dml.buffer[i]);
163  }
164 
165  // Read next bytes
166  dml.sst.flash_addr += end_idx - 5;
167  if (seq_idx < 0) {
169  }
170  break;
171 
172  default:
173  if (dml.sst.status == SST25VFXXXX_IDLE) {
174  dml.status = DML_IDLE;
175  }
176  break;
177  }
178 }
179 
181 {
182  // First handle stopping while logging
183  if (dml.status == DML_LOGGING && val == DML_STOP) {
184  dml.status = DML_STOP;
185  return;
186  }
187 
188  // Handle only while idle
189  if (dml.status != DML_IDLE) {
190  return;
191  }
192 
193  // Handle all the statuses
194  dml.status = val;
195  switch (dml.status) {
196  case DML_ERASE:
197  dml.sst.flash_addr = 0x0;
198  dml.write_addr = 0x0;
200  break;
201  case DML_START:
204  break;
205  case DML_READ:
206  dml.sst.flash_addr = 0x0;
208  break;
209  default:
210  break;
211  }
212 }
213 
214 static void direct_memory_spi_cb(__attribute__((unused)) struct spi_transaction *trans)
215 {
217 }
uint16_t
unsigned short uint16_t
Definition: types.h:16
LogStruct::gyro_q
int32_t gyro_q
Definition: direct_memory_logger.c:47
val
uint16_t val[TCOUPLE_NB]
Definition: temp_tcouple_adc.c:49
direct_memory_spi_cb
static void direct_memory_spi_cb(struct spi_transaction *trans)
Definition: direct_memory_logger.c:214
sst25vfxxxx_write
void sst25vfxxxx_write(struct SST25VFxxxx *sst, uint8_t *transfer_buffer, uint8_t transfer_length)
Write bytes.
Definition: sst25vfxxxx.c:276
Imu::accel
struct Int32Vect3 accel
accelerometer measurements in m/s^2 in BFP with INT32_ACCEL_FRAC
Definition: imu.h:39
Int32Rates::q
int32_t q
in rad/s with INT32_RATE_FRAC
Definition: pprz_algebra_int.h:181
spi_transaction
SPI transaction structure.
Definition: spi.h:148
Int32Vect3::z
int32_t z
Definition: pprz_algebra_int.h:91
start_log_sequence
static uint8_t start_log_sequence[6]
Definition: direct_memory_logger.c:38
direct_memory_logger_init
void direct_memory_logger_init(void)
Definition: direct_memory_logger.c:91
DML_START
@ DML_START
The DML is starting the logger.
Definition: direct_memory_logger.h:40
uint32_t
unsigned long uint32_t
Definition: types.h:18
DirectMemoryLogger::sst
struct SST25VFxxxx sst
The memory chip.
Definition: direct_memory_logger.h:49
array
int * array
Definition: snake_gate_detection.c:94
DML_BUF_SIZE
#define DML_BUF_SIZE
The read buffer size.
Definition: direct_memory_logger.h:33
log_struct
static struct LogStruct log_struct
Definition: direct_memory_logger.c:51
LogStruct::gyro_r
int32_t gyro_r
Definition: direct_memory_logger.c:48
LogStruct
Definition: direct_memory_logger.c:43
LogStruct::gyro_p
int32_t gyro_p
Definition: direct_memory_logger.c:46
direct_memory_logger_set
void direct_memory_logger_set(uint8_t val)
Definition: direct_memory_logger.c:180
Int32Rates::p
int32_t p
in rad/s with INT32_RATE_FRAC
Definition: pprz_algebra_int.h:180
imu.h
uart.h
arch independent UART (Universal Asynchronous Receiver/Transmitter) API
stop_log_sequence
static uint8_t stop_log_sequence[6]
Definition: direct_memory_logger.c:39
direct_memory_logger_periodic
void direct_memory_logger_periodic(void)
Definition: direct_memory_logger.c:99
DML_READING
@ DML_READING
The DML is busy reading.
Definition: direct_memory_logger.h:44
dml
struct DirectMemoryLogger dml
Definition: direct_memory_logger.c:33
LogStruct::accel_z
int32_t accel_z
Definition: direct_memory_logger.c:45
seq_in_array
static int32_t seq_in_array(uint8_t *array, uint16_t array_size, uint8_t *sequence, uint16_t sequence_size)
Definition: direct_memory_logger.c:54
uint8_t
unsigned char uint8_t
Definition: types.h:14
LogStruct::thrust
int32_t thrust
Definition: direct_memory_logger.c:49
sst25vfxxxx_read
void sst25vfxxxx_read(struct SST25VFxxxx *sst, uint8_t *transfer_buffer, uint8_t transfer_length)
Read bytes Need 5 more extra bytes because of SPI overhead.
Definition: sst25vfxxxx.c:300
DirectMemoryLogger::status
enum DMLStatus status
The status of the Direct Memory Logger.
Definition: direct_memory_logger.h:50
uart_put_byte
void uart_put_byte(struct uart_periph *p, long fd, uint8_t data)
Uart transmit implementation.
Definition: uart_arch.c:1095
DirectMemoryLogger::write_addr
uint32_t write_addr
Definition: direct_memory_logger.h:52
direct_memory_logger.h
Write logs directly to flash memory chips.
SST25VFxxxx::status
enum SST25VFxxxxStatus status
The status of the SST25VFxxxx flash chip.
Definition: sst25vfxxxx.h:64
SST25VFxxxx::flash_addr
uint32_t flash_addr
The flash address to write at.
Definition: sst25vfxxxx.h:70
DML_ERASE
@ DML_ERASE
The DML is busy erasing itself.
Definition: direct_memory_logger.h:39
DirectMemoryLogger
Definition: direct_memory_logger.h:48
imu
struct Imu imu
global IMU state
Definition: imu.c:108
SST25VFXXXX_IDLE
@ SST25VFXXXX_IDLE
The chip is idle and can be used.
Definition: sst25vfxxxx.h:54
DML_INIT
@ DML_INIT
The DML is initializing.
Definition: direct_memory_logger.h:37
DML_STOP
@ DML_STOP
The DML is busy stopping.
Definition: direct_memory_logger.h:42
sst25vfxxxx_chip_erase
void sst25vfxxxx_chip_erase(struct SST25VFxxxx *sst)
Full chip erase.
Definition: sst25vfxxxx.c:258
DML_READ
@ DML_READ
The DML is busy starting read.
Definition: direct_memory_logger.h:43
int32_t
signed long int32_t
Definition: types.h:19
DirectMemoryLogger::buffer
uint8_t buffer[DML_BUF_SIZE]
The buffer for writing and reading.
Definition: direct_memory_logger.h:51
sst25vfxxxx_after_cb
void sst25vfxxxx_after_cb(struct SST25VFxxxx *sst)
Callback of the SPI after going one level higher for gathering the sst pointer.
Definition: sst25vfxxxx.c:64
stabilization_cmd
int32_t stabilization_cmd[COMMANDS_NB]
Stabilization commands.
Definition: stabilization.c:32
stabilization.h
dm_counter
static uint32_t dm_counter
Definition: direct_memory_logger.c:52
DML_LOGGING
@ DML_LOGGING
The DML is busy logging.
Definition: direct_memory_logger.h:41
Int32Rates::r
int32_t r
in rad/s with INT32_RATE_FRAC
Definition: pprz_algebra_int.h:182
DML_IDLE
@ DML_IDLE
The DML is idle.
Definition: direct_memory_logger.h:38
Imu::gyro
struct Int32Rates gyro
gyroscope measurements in rad/s in BFP with INT32_RATE_FRAC
Definition: imu.h:38
sst25vfxxxx_init
void sst25vfxxxx_init(struct SST25VFxxxx *sst, struct spi_periph *spi_p, const uint8_t slave_idx, SPICallback spi_cb)
Initializing the sst25vfxxxx chip.
Definition: sst25vfxxxx.c:34
LogStruct::counter
uint32_t counter
Definition: direct_memory_logger.c:44