Paparazzi UAS
v5.15_devel-230-gc96ce27
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board.h
Go to the documentation of this file.
1
/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#pragma once
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/*
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* Board identifier.
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*/
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#define BOARD_CHIMERA
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#define BOARD_NAME "Chimera Autopilot"
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/*
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* Board oscillators-related settings.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 32768U
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#endif
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#define STM32_LSEDRV (3U << 3U)
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 16000000U
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#endif
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38
/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 300U
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/*
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* MCU type as defined in the ST header.
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*/
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#define STM32F767xx
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/*
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* IO pins assignments.
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*/
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#define AUX3 0U
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#define RC1_UART4_RX 1U
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#define AUX2 2U
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#define AUX1 3U
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#define VBAT_MEAS 4U
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#define AUX0 5U
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#define SRV0_TIM3_CH1 6U
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#define SRV1_TIM3_CH2 7U
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#define XB_ASSO 8U
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#define USB_VBUS 9U
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#define SD_DETECT 10U
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#define OTG_FS_DM 11U
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#define OTG_FS_DP 12U
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#define SWDIO 13U
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#define SWCLK 14U
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#define SPI1_CS 15U
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#define SRV2_TIM3_CH3 0U
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#define SRV3_TIM3_CH4 1U
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#define RC1 2U
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#define SPI1_SCK 3U
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#define SPI1_MISO 4U
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#define SPI1_MOSI 5U
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#define USART1_TX 6U
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#define USART1_RX 7U
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#define I2C1_SCL 8U
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#define I2C1_SDA 9U
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#define I2C2_SCL 10U
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#define I2C2_SDA 11U
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#define LED1 12U
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#define LED2 13U
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#define DIS_C 14U
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#define DIS_DP 15U
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#define PC00 0U
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#define PC01 1U
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#define AUX5 2U
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#define AUX4 3U
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#define EN_COMP 4U
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#define PC05 5U
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#define AUX6 6U
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#define AUX7 7U
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#define SDMMC1_D0 8U
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#define SDMMC1_D1 9U
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#define SDMMC1_D2 10U
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#define SDMMC1_D3 11U
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#define SDMMC1_CK 12U
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#define PC13 13U
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#define OSC32_IN 14U
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#define OSC32_OUT 15U
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#define CAN1_RX 0U
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#define CAN1_TX 1U
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#define SDMMC1_CMD 2U
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#define USART2_CTS 3U
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#define USART2_RTS 4U
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#define USART2_TX 5U
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#define USART2_RX 6U
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#define IMU_INT 7U
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#define USART3_TX 8U
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#define USART3_RX 9U
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#define LED3 10U
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#define LED4 11U
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#define SRV4_TIM4_CH1 12U
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#define SRV5_TIM4_CH2 13U
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#define SRV6_TIM4_CH3 14U
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#define SRV7_TIM4_CH4 15U
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#define UART8_RX 0U
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#define UART8_TX 1U
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#define DIS_G 2U
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#define DIS_F 3U
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#define DIS_A 4U
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#define DIS_B 5U
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#define APSW 6U
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#define RC2_UART7_RX 7U
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#define DIS_E 8U
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#define DIS_D 9U
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#define PE10 10U
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#define PE11 11U
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#define PE12 12U
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#define PE13 13U
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#define PE14 14U
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#define XB_RST 15U
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#define PF00 0U
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#define PF01 1U
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#define PF02 2U
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#define PF03 3U
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#define PF04 4U
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#define PF05 5U
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#define PF06 6U
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#define PF07 7U
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#define PF08 8U
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#define PF09 9U
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#define PF10 10U
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#define PF11 11U
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#define PF12 12U
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#define PF13 13U
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#define PF14 14U
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#define PF15 15U
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#define PG00 0U
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#define PG01 1U
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#define PG02 2U
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#define PG03 3U
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#define PG04 4U
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#define PG05 5U
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#define PG06 6U
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#define PG07 7U
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#define PG08 8U
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#define PG09 9U
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#define PG10 10U
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#define PG11 11U
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#define PG12 12U
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#define PG13 13U
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#define PG14 14U
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#define PG15 15U
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#define OSC_IN 0U
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#define OSC_OUT 1U
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#define PH02 2U
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#define PH03 3U
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#define PH04 4U
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#define PH05 5U
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#define PH06 6U
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#define PH07 7U
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#define PH08 8U
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#define PH09 9U
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#define PH10 10U
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#define PH11 11U
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#define PH12 12U
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#define PH13 13U
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#define PH14 14U
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#define PH15 15U
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#define PI00 0U
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#define PI01 1U
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#define PI02 2U
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#define PI03 3U
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#define PI04 4U
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#define PI05 5U
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#define PI06 6U
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#define PI07 7U
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#define PI08 8U
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#define PI09 9U
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#define PI10 10U
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#define PI11 11U
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#define PI12 12U
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#define PI13 13U
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#define PI14 14U
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#define PI15 15U
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#define PJ00 0U
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#define PJ01 1U
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#define PJ02 2U
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#define PJ03 3U
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#define PJ04 4U
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#define PJ05 5U
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#define PJ06 6U
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#define PJ07 7U
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#define PJ08 8U
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#define PJ09 9U
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#define PJ10 10U
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#define PJ11 11U
217
#define PJ12 12U
218
#define PJ13 13U
219
#define PJ14 14U
220
#define PJ15 15U
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222
#define PK00 0U
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#define PK01 1U
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#define PK02 2U
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#define PK03 3U
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#define PK04 4U
227
#define PK05 5U
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#define PK06 6U
229
#define PK07 7U
230
#define PK08 8U
231
#define PK09 9U
232
#define PK10 10U
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#define PK11 11U
234
#define PK12 12U
235
#define PK13 13U
236
#define PK14 14U
237
#define PK15 15U
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239
/*
240
* IO lines assignments.
241
*/
242
#define LINE_AUX3 PAL_LINE(GPIOA, 0U)
243
#define LINE_RC1_UART4_RX PAL_LINE(GPIOA, 1U)
244
#define LINE_AUX2 PAL_LINE(GPIOA, 2U)
245
#define LINE_AUX1 PAL_LINE(GPIOA, 3U)
246
#define LINE_VBAT_MEAS PAL_LINE(GPIOA, 4U)
247
#define LINE_AUX0 PAL_LINE(GPIOA, 5U)
248
#define LINE_SRV0_TIM3_CH1 PAL_LINE(GPIOA, 6U)
249
#define LINE_SRV1_TIM3_CH2 PAL_LINE(GPIOA, 7U)
250
#define LINE_XB_ASSO PAL_LINE(GPIOA, 8U)
251
#define LINE_USB_VBUS PAL_LINE(GPIOA, 9U)
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#define LINE_SD_DETECT PAL_LINE(GPIOA, 10U)
253
#define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U)
254
#define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U)
255
#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
256
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
257
#define LINE_SPI1_CS PAL_LINE(GPIOA, 15U)
258
259
#define LINE_SRV2_TIM3_CH3 PAL_LINE(GPIOB, 0U)
260
#define LINE_SRV3_TIM3_CH4 PAL_LINE(GPIOB, 1U)
261
#define LINE_RC1 PAL_LINE(GPIOB, 2U)
262
#define LINE_SPI1_SCK PAL_LINE(GPIOB, 3U)
263
#define LINE_SPI1_MISO PAL_LINE(GPIOB, 4U)
264
#define LINE_SPI1_MOSI PAL_LINE(GPIOB, 5U)
265
#define LINE_USART1_TX PAL_LINE(GPIOB, 6U)
266
#define LINE_USART1_RX PAL_LINE(GPIOB, 7U)
267
#define LINE_I2C1_SCL PAL_LINE(GPIOB, 8U)
268
#define LINE_I2C1_SDA PAL_LINE(GPIOB, 9U)
269
#define LINE_I2C2_SCL PAL_LINE(GPIOB, 10U)
270
#define LINE_I2C2_SDA PAL_LINE(GPIOB, 11U)
271
#define LINE_LED1 PAL_LINE(GPIOB, 12U)
272
#define LINE_LED2 PAL_LINE(GPIOB, 13U)
273
#define LINE_DIS_C PAL_LINE(GPIOB, 14U)
274
#define LINE_DIS_DP PAL_LINE(GPIOB, 15U)
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#define LINE_AUX5 PAL_LINE(GPIOC, 2U)
277
#define LINE_AUX4 PAL_LINE(GPIOC, 3U)
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#define LINE_EN_COMP PAL_LINE(GPIOC, 4U)
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#define LINE_AUX6 PAL_LINE(GPIOC, 6U)
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#define LINE_AUX7 PAL_LINE(GPIOC, 7U)
281
#define LINE_SDMMC1_D0 PAL_LINE(GPIOC, 8U)
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#define LINE_SDMMC1_D1 PAL_LINE(GPIOC, 9U)
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#define LINE_SDMMC1_D2 PAL_LINE(GPIOC, 10U)
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#define LINE_SDMMC1_D3 PAL_LINE(GPIOC, 11U)
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#define LINE_SDMMC1_CK PAL_LINE(GPIOC, 12U)
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#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
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#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
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#define LINE_CAN1_RX PAL_LINE(GPIOD, 0U)
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#define LINE_CAN1_TX PAL_LINE(GPIOD, 1U)
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#define LINE_SDMMC1_CMD PAL_LINE(GPIOD, 2U)
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#define LINE_USART2_CTS PAL_LINE(GPIOD, 3U)
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#define LINE_USART2_RTS PAL_LINE(GPIOD, 4U)
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#define LINE_USART2_TX PAL_LINE(GPIOD, 5U)
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#define LINE_USART2_RX PAL_LINE(GPIOD, 6U)
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#define LINE_IMU_INT PAL_LINE(GPIOD, 7U)
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#define LINE_USART3_TX PAL_LINE(GPIOD, 8U)
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#define LINE_USART3_RX PAL_LINE(GPIOD, 9U)
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#define LINE_LED3 PAL_LINE(GPIOD, 10U)
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#define LINE_LED4 PAL_LINE(GPIOD, 11U)
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#define LINE_SRV4_TIM4_CH1 PAL_LINE(GPIOD, 12U)
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#define LINE_SRV5_TIM4_CH2 PAL_LINE(GPIOD, 13U)
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#define LINE_SRV6_TIM4_CH3 PAL_LINE(GPIOD, 14U)
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#define LINE_SRV7_TIM4_CH4 PAL_LINE(GPIOD, 15U)
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#define LINE_UART8_RX PAL_LINE(GPIOE, 0U)
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#define LINE_UART8_TX PAL_LINE(GPIOE, 1U)
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#define LINE_DIS_G PAL_LINE(GPIOE, 2U)
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#define LINE_DIS_F PAL_LINE(GPIOE, 3U)
310
#define LINE_DIS_A PAL_LINE(GPIOE, 4U)
311
#define LINE_DIS_B PAL_LINE(GPIOE, 5U)
312
#define LINE_APSW PAL_LINE(GPIOE, 6U)
313
#define LINE_RC2_UART7_RX PAL_LINE(GPIOE, 7U)
314
#define LINE_DIS_E PAL_LINE(GPIOE, 8U)
315
#define LINE_DIS_D PAL_LINE(GPIOE, 9U)
316
#define LINE_XB_RST PAL_LINE(GPIOE, 15U)
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#define LINE_OSC_IN PAL_LINE(GPIOH, 0U)
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#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U)
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/*
323
* I/O ports initial setup, this configuration is established soon after reset
324
* in the initialization code.
325
* Please refer to the STM32 Reference Manual for details.
326
*/
327
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
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#define PIN_ODR_LEVEL_LOW(n) (0U << (n))
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#define PIN_ODR_LEVEL_HIGH(n) (1U << (n))
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
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#define PIN_OSPEED_SPEED_VERYLOW(n) (0U << ((n) * 2U))
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#define PIN_OSPEED_SPEED_LOW(n) (1U << ((n) * 2U))
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#define PIN_OSPEED_SPEED_MEDIUM(n) (2U << ((n) * 2U))
338
#define PIN_OSPEED_SPEED_HIGH(n) (3U << ((n) * 2U))
339
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
340
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
341
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
342
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
343
344
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(AUX3) | \
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PIN_MODE_INPUT(RC1_UART4_RX) | \
346
PIN_MODE_INPUT(AUX2) | \
347
PIN_MODE_INPUT(AUX1) | \
348
PIN_MODE_ANALOG(VBAT_MEAS) | \
349
PIN_MODE_INPUT(AUX0) | \
350
PIN_MODE_INPUT(SRV0_TIM3_CH1) | \
351
PIN_MODE_INPUT(SRV1_TIM3_CH2) | \
352
PIN_MODE_INPUT(XB_ASSO) | \
353
PIN_MODE_INPUT(USB_VBUS) | \
354
PIN_MODE_INPUT(SD_DETECT) | \
355
PIN_MODE_ALTERNATE(OTG_FS_DM) | \
356
PIN_MODE_ALTERNATE(OTG_FS_DP) | \
357
PIN_MODE_ALTERNATE(SWDIO) | \
358
PIN_MODE_ALTERNATE(SWCLK) | \
359
PIN_MODE_OUTPUT(SPI1_CS))
360
361
#define VAL_GPIOA_OTYPER (PIN_OTYPE_OPENDRAIN(AUX3) | \
362
PIN_OTYPE_OPENDRAIN(RC1_UART4_RX) | \
363
PIN_OTYPE_OPENDRAIN(AUX2) | \
364
PIN_OTYPE_OPENDRAIN(AUX1) | \
365
PIN_OTYPE_PUSHPULL(VBAT_MEAS) | \
366
PIN_OTYPE_OPENDRAIN(AUX0) | \
367
PIN_OTYPE_OPENDRAIN(SRV0_TIM3_CH1) | \
368
PIN_OTYPE_OPENDRAIN(SRV1_TIM3_CH2) | \
369
PIN_OTYPE_OPENDRAIN(XB_ASSO) | \
370
PIN_OTYPE_OPENDRAIN(USB_VBUS) | \
371
PIN_OTYPE_OPENDRAIN(SD_DETECT) | \
372
PIN_OTYPE_PUSHPULL(OTG_FS_DM) | \
373
PIN_OTYPE_PUSHPULL(OTG_FS_DP) | \
374
PIN_OTYPE_PUSHPULL(SWDIO) | \
375
PIN_OTYPE_PUSHPULL(SWCLK) | \
376
PIN_OTYPE_PUSHPULL(SPI1_CS))
377
378
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(AUX3) | \
379
PIN_OSPEED_SPEED_VERYLOW(RC1_UART4_RX) | \
380
PIN_OSPEED_SPEED_VERYLOW(AUX2) | \
381
PIN_OSPEED_SPEED_VERYLOW(AUX1) | \
382
PIN_OSPEED_SPEED_VERYLOW(VBAT_MEAS) | \
383
PIN_OSPEED_SPEED_VERYLOW(AUX0) | \
384
PIN_OSPEED_SPEED_VERYLOW(SRV0_TIM3_CH1) | \
385
PIN_OSPEED_SPEED_VERYLOW(SRV1_TIM3_CH2) | \
386
PIN_OSPEED_SPEED_VERYLOW(XB_ASSO) | \
387
PIN_OSPEED_SPEED_VERYLOW(USB_VBUS) | \
388
PIN_OSPEED_SPEED_VERYLOW(SD_DETECT) | \
389
PIN_OSPEED_SPEED_HIGH(OTG_FS_DM) | \
390
PIN_OSPEED_SPEED_HIGH(OTG_FS_DP) | \
391
PIN_OSPEED_SPEED_HIGH(SWDIO) | \
392
PIN_OSPEED_SPEED_HIGH(SWCLK) | \
393
PIN_OSPEED_SPEED_HIGH(SPI1_CS))
394
395
#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLDOWN(AUX3) | \
396
PIN_PUPDR_PULLDOWN(RC1_UART4_RX) | \
397
PIN_PUPDR_PULLDOWN(AUX2) | \
398
PIN_PUPDR_PULLDOWN(AUX1) | \
399
PIN_PUPDR_FLOATING(VBAT_MEAS) | \
400
PIN_PUPDR_PULLDOWN(AUX0) | \
401
PIN_PUPDR_PULLDOWN(SRV0_TIM3_CH1) | \
402
PIN_PUPDR_PULLDOWN(SRV1_TIM3_CH2) | \
403
PIN_PUPDR_FLOATING(XB_ASSO) | \
404
PIN_PUPDR_PULLDOWN(USB_VBUS) | \
405
PIN_PUPDR_PULLUP(SD_DETECT) | \
406
PIN_PUPDR_FLOATING(OTG_FS_DM) | \
407
PIN_PUPDR_FLOATING(OTG_FS_DP) | \
408
PIN_PUPDR_FLOATING(SWDIO) | \
409
PIN_PUPDR_FLOATING(SWCLK) | \
410
PIN_PUPDR_FLOATING(SPI1_CS))
411
412
#define VAL_GPIOA_ODR (PIN_ODR_LEVEL_HIGH(AUX3) | \
413
PIN_ODR_LEVEL_HIGH(RC1_UART4_RX) | \
414
PIN_ODR_LEVEL_HIGH(AUX2) | \
415
PIN_ODR_LEVEL_HIGH(AUX1) | \
416
PIN_ODR_LEVEL_LOW(VBAT_MEAS) | \
417
PIN_ODR_LEVEL_HIGH(AUX0) | \
418
PIN_ODR_LEVEL_HIGH(SRV0_TIM3_CH1) | \
419
PIN_ODR_LEVEL_HIGH(SRV1_TIM3_CH2) | \
420
PIN_ODR_LEVEL_LOW(XB_ASSO) | \
421
PIN_ODR_LEVEL_LOW(USB_VBUS) | \
422
PIN_ODR_LEVEL_LOW(SD_DETECT) | \
423
PIN_ODR_LEVEL_HIGH(OTG_FS_DM) | \
424
PIN_ODR_LEVEL_HIGH(OTG_FS_DP) | \
425
PIN_ODR_LEVEL_HIGH(SWDIO) | \
426
PIN_ODR_LEVEL_HIGH(SWCLK) | \
427
PIN_ODR_LEVEL_HIGH(SPI1_CS))
428
429
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(AUX3, 0) | \
430
PIN_AFIO_AF(RC1_UART4_RX, 0) | \
431
PIN_AFIO_AF(AUX2, 0) | \
432
PIN_AFIO_AF(AUX1, 0) | \
433
PIN_AFIO_AF(VBAT_MEAS, 0) | \
434
PIN_AFIO_AF(AUX0, 0) | \
435
PIN_AFIO_AF(SRV0_TIM3_CH1, 0) | \
436
PIN_AFIO_AF(SRV1_TIM3_CH2, 0))
437
438
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(XB_ASSO, 0) | \
439
PIN_AFIO_AF(USB_VBUS, 0) | \
440
PIN_AFIO_AF(SD_DETECT, 0) | \
441
PIN_AFIO_AF(OTG_FS_DM, 10) | \
442
PIN_AFIO_AF(OTG_FS_DP, 10) | \
443
PIN_AFIO_AF(SWDIO, 0) | \
444
PIN_AFIO_AF(SWCLK, 0) | \
445
PIN_AFIO_AF(SPI1_CS, 0))
446
447
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(SRV2_TIM3_CH3) | \
448
PIN_MODE_INPUT(SRV3_TIM3_CH4) | \
449
PIN_MODE_INPUT(RC1) | \
450
PIN_MODE_ALTERNATE(SPI1_SCK) | \
451
PIN_MODE_ALTERNATE(SPI1_MISO) | \
452
PIN_MODE_ALTERNATE(SPI1_MOSI) | \
453
PIN_MODE_ALTERNATE(USART1_TX) | \
454
PIN_MODE_ALTERNATE(USART1_RX) | \
455
PIN_MODE_ALTERNATE(I2C1_SCL) | \
456
PIN_MODE_ALTERNATE(I2C1_SDA) | \
457
PIN_MODE_ALTERNATE(I2C2_SCL) | \
458
PIN_MODE_ALTERNATE(I2C2_SDA) | \
459
PIN_MODE_OUTPUT(LED1) | \
460
PIN_MODE_OUTPUT(LED2) | \
461
PIN_MODE_OUTPUT(DIS_C) | \
462
PIN_MODE_OUTPUT(DIS_DP))
463
464
#define VAL_GPIOB_OTYPER (PIN_OTYPE_OPENDRAIN(SRV2_TIM3_CH3) | \
465
PIN_OTYPE_OPENDRAIN(SRV3_TIM3_CH4) | \
466
PIN_OTYPE_OPENDRAIN(RC1) | \
467
PIN_OTYPE_PUSHPULL(SPI1_SCK) | \
468
PIN_OTYPE_PUSHPULL(SPI1_MISO) | \
469
PIN_OTYPE_PUSHPULL(SPI1_MOSI) | \
470
PIN_OTYPE_PUSHPULL(USART1_TX) | \
471
PIN_OTYPE_PUSHPULL(USART1_RX) | \
472
PIN_OTYPE_OPENDRAIN(I2C1_SCL) | \
473
PIN_OTYPE_OPENDRAIN(I2C1_SDA) | \
474
PIN_OTYPE_OPENDRAIN(I2C2_SCL) | \
475
PIN_OTYPE_OPENDRAIN(I2C2_SDA) | \
476
PIN_OTYPE_PUSHPULL(LED1) | \
477
PIN_OTYPE_PUSHPULL(LED2) | \
478
PIN_OTYPE_PUSHPULL(DIS_C) | \
479
PIN_OTYPE_PUSHPULL(DIS_DP))
480
481
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(SRV2_TIM3_CH3) | \
482
PIN_OSPEED_SPEED_VERYLOW(SRV3_TIM3_CH4) | \
483
PIN_OSPEED_SPEED_VERYLOW(RC1) | \
484
PIN_OSPEED_SPEED_HIGH(SPI1_SCK) | \
485
PIN_OSPEED_SPEED_HIGH(SPI1_MISO) | \
486
PIN_OSPEED_SPEED_HIGH(SPI1_MOSI) | \
487
PIN_OSPEED_SPEED_HIGH(USART1_TX) | \
488
PIN_OSPEED_SPEED_HIGH(USART1_RX) | \
489
PIN_OSPEED_SPEED_HIGH(I2C1_SCL) | \
490
PIN_OSPEED_SPEED_HIGH(I2C1_SDA) | \
491
PIN_OSPEED_SPEED_HIGH(I2C2_SCL) | \
492
PIN_OSPEED_SPEED_HIGH(I2C2_SDA) | \
493
PIN_OSPEED_SPEED_VERYLOW(LED1) | \
494
PIN_OSPEED_SPEED_VERYLOW(LED2) | \
495
PIN_OSPEED_SPEED_VERYLOW(DIS_C) | \
496
PIN_OSPEED_SPEED_VERYLOW(DIS_DP))
497
498
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLDOWN(SRV2_TIM3_CH3) | \
499
PIN_PUPDR_PULLDOWN(SRV3_TIM3_CH4) | \
500
PIN_PUPDR_PULLDOWN(RC1) | \
501
PIN_PUPDR_FLOATING(SPI1_SCK) | \
502
PIN_PUPDR_FLOATING(SPI1_MISO) | \
503
PIN_PUPDR_FLOATING(SPI1_MOSI) | \
504
PIN_PUPDR_FLOATING(USART1_TX) | \
505
PIN_PUPDR_FLOATING(USART1_RX) | \
506
PIN_PUPDR_PULLUP(I2C1_SCL) | \
507
PIN_PUPDR_PULLUP(I2C1_SDA) | \
508
PIN_PUPDR_PULLUP(I2C2_SCL) | \
509
PIN_PUPDR_PULLUP(I2C2_SDA) | \
510
PIN_PUPDR_FLOATING(LED1) | \
511
PIN_PUPDR_FLOATING(LED2) | \
512
PIN_PUPDR_FLOATING(DIS_C) | \
513
PIN_PUPDR_FLOATING(DIS_DP))
514
515
#define VAL_GPIOB_ODR (PIN_ODR_LEVEL_HIGH(SRV2_TIM3_CH3) | \
516
PIN_ODR_LEVEL_HIGH(SRV3_TIM3_CH4) | \
517
PIN_ODR_LEVEL_HIGH(RC1) | \
518
PIN_ODR_LEVEL_HIGH(SPI1_SCK) | \
519
PIN_ODR_LEVEL_HIGH(SPI1_MISO) | \
520
PIN_ODR_LEVEL_HIGH(SPI1_MOSI) | \
521
PIN_ODR_LEVEL_HIGH(USART1_TX) | \
522
PIN_ODR_LEVEL_HIGH(USART1_RX) | \
523
PIN_ODR_LEVEL_HIGH(I2C1_SCL) | \
524
PIN_ODR_LEVEL_HIGH(I2C1_SDA) | \
525
PIN_ODR_LEVEL_HIGH(I2C2_SCL) | \
526
PIN_ODR_LEVEL_HIGH(I2C2_SDA) | \
527
PIN_ODR_LEVEL_LOW(LED1) | \
528
PIN_ODR_LEVEL_LOW(LED2) | \
529
PIN_ODR_LEVEL_LOW(DIS_C) | \
530
PIN_ODR_LEVEL_LOW(DIS_DP))
531
532
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(SRV2_TIM3_CH3, 0) | \
533
PIN_AFIO_AF(SRV3_TIM3_CH4, 0) | \
534
PIN_AFIO_AF(RC1, 0) | \
535
PIN_AFIO_AF(SPI1_SCK, 5) | \
536
PIN_AFIO_AF(SPI1_MISO, 5) | \
537
PIN_AFIO_AF(SPI1_MOSI, 5) | \
538
PIN_AFIO_AF(USART1_TX, 7) | \
539
PIN_AFIO_AF(USART1_RX, 7))
540
541
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(I2C1_SCL, 4) | \
542
PIN_AFIO_AF(I2C1_SDA, 4) | \
543
PIN_AFIO_AF(I2C2_SCL, 4) | \
544
PIN_AFIO_AF(I2C2_SDA, 4) | \
545
PIN_AFIO_AF(LED1, 0) | \
546
PIN_AFIO_AF(LED2, 0) | \
547
PIN_AFIO_AF(DIS_C, 0) | \
548
PIN_AFIO_AF(DIS_DP, 0))
549
550
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(PC00) | \
551
PIN_MODE_INPUT(PC01) | \
552
PIN_MODE_INPUT(AUX5) | \
553
PIN_MODE_INPUT(AUX4) | \
554
PIN_MODE_OUTPUT(EN_COMP) | \
555
PIN_MODE_INPUT(PC05) | \
556
PIN_MODE_INPUT(AUX6) | \
557
PIN_MODE_INPUT(AUX7) | \
558
PIN_MODE_ALTERNATE(SDMMC1_D0) | \
559
PIN_MODE_ALTERNATE(SDMMC1_D1) | \
560
PIN_MODE_ALTERNATE(SDMMC1_D2) | \
561
PIN_MODE_ALTERNATE(SDMMC1_D3) | \
562
PIN_MODE_ALTERNATE(SDMMC1_CK) | \
563
PIN_MODE_INPUT(PC13) | \
564
PIN_MODE_ALTERNATE(OSC32_IN) | \
565
PIN_MODE_ALTERNATE(OSC32_OUT))
566
567
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(PC00) | \
568
PIN_OTYPE_PUSHPULL(PC01) | \
569
PIN_OTYPE_OPENDRAIN(AUX5) | \
570
PIN_OTYPE_OPENDRAIN(AUX4) | \
571
PIN_OTYPE_PUSHPULL(EN_COMP) | \
572
PIN_OTYPE_PUSHPULL(PC05) | \
573
PIN_OTYPE_OPENDRAIN(AUX6) | \
574
PIN_OTYPE_OPENDRAIN(AUX7) | \
575
PIN_OTYPE_PUSHPULL(SDMMC1_D0) | \
576
PIN_OTYPE_PUSHPULL(SDMMC1_D1) | \
577
PIN_OTYPE_PUSHPULL(SDMMC1_D2) | \
578
PIN_OTYPE_PUSHPULL(SDMMC1_D3) | \
579
PIN_OTYPE_PUSHPULL(SDMMC1_CK) | \
580
PIN_OTYPE_PUSHPULL(PC13) | \
581
PIN_OTYPE_PUSHPULL(OSC32_IN) | \
582
PIN_OTYPE_PUSHPULL(OSC32_OUT))
583
584
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PC00) | \
585
PIN_OSPEED_SPEED_VERYLOW(PC01) | \
586
PIN_OSPEED_SPEED_VERYLOW(AUX5) | \
587
PIN_OSPEED_SPEED_VERYLOW(AUX4) | \
588
PIN_OSPEED_SPEED_VERYLOW(EN_COMP) | \
589
PIN_OSPEED_SPEED_VERYLOW(PC05) | \
590
PIN_OSPEED_SPEED_VERYLOW(AUX6) | \
591
PIN_OSPEED_SPEED_VERYLOW(AUX7) | \
592
PIN_OSPEED_SPEED_HIGH(SDMMC1_D0) | \
593
PIN_OSPEED_SPEED_HIGH(SDMMC1_D1) | \
594
PIN_OSPEED_SPEED_HIGH(SDMMC1_D2) | \
595
PIN_OSPEED_SPEED_HIGH(SDMMC1_D3) | \
596
PIN_OSPEED_SPEED_HIGH(SDMMC1_CK) | \
597
PIN_OSPEED_SPEED_VERYLOW(PC13) | \
598
PIN_OSPEED_SPEED_HIGH(OSC32_IN) | \
599
PIN_OSPEED_SPEED_HIGH(OSC32_OUT))
600
601
#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLDOWN(PC00) | \
602
PIN_PUPDR_PULLDOWN(PC01) | \
603
PIN_PUPDR_PULLDOWN(AUX5) | \
604
PIN_PUPDR_PULLDOWN(AUX4) | \
605
PIN_PUPDR_FLOATING(EN_COMP) | \
606
PIN_PUPDR_PULLDOWN(PC05) | \
607
PIN_PUPDR_PULLDOWN(AUX6) | \
608
PIN_PUPDR_PULLDOWN(AUX7) | \
609
PIN_PUPDR_PULLUP(SDMMC1_D0) | \
610
PIN_PUPDR_PULLUP(SDMMC1_D1) | \
611
PIN_PUPDR_PULLUP(SDMMC1_D2) | \
612
PIN_PUPDR_PULLUP(SDMMC1_D3) | \
613
PIN_PUPDR_PULLUP(SDMMC1_CK) | \
614
PIN_PUPDR_PULLDOWN(PC13) | \
615
PIN_PUPDR_FLOATING(OSC32_IN) | \
616
PIN_PUPDR_FLOATING(OSC32_OUT))
617
618
#define VAL_GPIOC_ODR (PIN_ODR_LEVEL_LOW(PC00) | \
619
PIN_ODR_LEVEL_LOW(PC01) | \
620
PIN_ODR_LEVEL_HIGH(AUX5) | \
621
PIN_ODR_LEVEL_HIGH(AUX4) | \
622
PIN_ODR_LEVEL_HIGH(EN_COMP) | \
623
PIN_ODR_LEVEL_LOW(PC05) | \
624
PIN_ODR_LEVEL_HIGH(AUX6) | \
625
PIN_ODR_LEVEL_HIGH(AUX7) | \
626
PIN_ODR_LEVEL_HIGH(SDMMC1_D0) | \
627
PIN_ODR_LEVEL_HIGH(SDMMC1_D1) | \
628
PIN_ODR_LEVEL_HIGH(SDMMC1_D2) | \
629
PIN_ODR_LEVEL_HIGH(SDMMC1_D3) | \
630
PIN_ODR_LEVEL_HIGH(SDMMC1_CK) | \
631
PIN_ODR_LEVEL_LOW(PC13) | \
632
PIN_ODR_LEVEL_HIGH(OSC32_IN) | \
633
PIN_ODR_LEVEL_HIGH(OSC32_OUT))
634
635
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(PC00, 0) | \
636
PIN_AFIO_AF(PC01, 0) | \
637
PIN_AFIO_AF(AUX5, 0) | \
638
PIN_AFIO_AF(AUX4, 0) | \
639
PIN_AFIO_AF(EN_COMP, 0) | \
640
PIN_AFIO_AF(PC05, 0) | \
641
PIN_AFIO_AF(AUX6, 0) | \
642
PIN_AFIO_AF(AUX7, 0))
643
644
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(SDMMC1_D0, 12) | \
645
PIN_AFIO_AF(SDMMC1_D1, 12) | \
646
PIN_AFIO_AF(SDMMC1_D2, 12) | \
647
PIN_AFIO_AF(SDMMC1_D3, 12) | \
648
PIN_AFIO_AF(SDMMC1_CK, 12) | \
649
PIN_AFIO_AF(PC13, 0) | \
650
PIN_AFIO_AF(OSC32_IN, 0) | \
651
PIN_AFIO_AF(OSC32_OUT, 0))
652
653
#define VAL_GPIOD_MODER (PIN_MODE_ALTERNATE(CAN1_RX) | \
654
PIN_MODE_ALTERNATE(CAN1_TX) | \
655
PIN_MODE_ALTERNATE(SDMMC1_CMD) | \
656
PIN_MODE_INPUT(USART2_CTS) | \
657
PIN_MODE_INPUT(USART2_RTS) | \
658
PIN_MODE_INPUT(USART2_TX) | \
659
PIN_MODE_INPUT(USART2_RX) | \
660
PIN_MODE_INPUT(IMU_INT) | \
661
PIN_MODE_ALTERNATE(USART3_TX) | \
662
PIN_MODE_ALTERNATE(USART3_RX) | \
663
PIN_MODE_OUTPUT(LED3) | \
664
PIN_MODE_OUTPUT(LED4) | \
665
PIN_MODE_INPUT(SRV4_TIM4_CH1) | \
666
PIN_MODE_INPUT(SRV5_TIM4_CH2) | \
667
PIN_MODE_INPUT(SRV6_TIM4_CH3) | \
668
PIN_MODE_INPUT(SRV7_TIM4_CH4))
669
670
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(CAN1_RX) | \
671
PIN_OTYPE_PUSHPULL(CAN1_TX) | \
672
PIN_OTYPE_PUSHPULL(SDMMC1_CMD) | \
673
PIN_OTYPE_OPENDRAIN(USART2_CTS) | \
674
PIN_OTYPE_OPENDRAIN(USART2_RTS) | \
675
PIN_OTYPE_OPENDRAIN(USART2_TX) | \
676
PIN_OTYPE_OPENDRAIN(USART2_RX) | \
677
PIN_OTYPE_OPENDRAIN(IMU_INT) | \
678
PIN_OTYPE_PUSHPULL(USART3_TX) | \
679
PIN_OTYPE_PUSHPULL(USART3_RX) | \
680
PIN_OTYPE_PUSHPULL(LED3) | \
681
PIN_OTYPE_PUSHPULL(LED4) | \
682
PIN_OTYPE_OPENDRAIN(SRV4_TIM4_CH1) | \
683
PIN_OTYPE_OPENDRAIN(SRV5_TIM4_CH2) | \
684
PIN_OTYPE_OPENDRAIN(SRV6_TIM4_CH3) | \
685
PIN_OTYPE_OPENDRAIN(SRV7_TIM4_CH4))
686
687
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_SPEED_HIGH(CAN1_RX) | \
688
PIN_OSPEED_SPEED_HIGH(CAN1_TX) | \
689
PIN_OSPEED_SPEED_HIGH(SDMMC1_CMD) | \
690
PIN_OSPEED_SPEED_VERYLOW(USART2_CTS) | \
691
PIN_OSPEED_SPEED_VERYLOW(USART2_RTS) | \
692
PIN_OSPEED_SPEED_VERYLOW(USART2_TX) | \
693
PIN_OSPEED_SPEED_VERYLOW(USART2_RX) | \
694
PIN_OSPEED_SPEED_VERYLOW(IMU_INT) | \
695
PIN_OSPEED_SPEED_HIGH(USART3_TX) | \
696
PIN_OSPEED_SPEED_HIGH(USART3_RX) | \
697
PIN_OSPEED_SPEED_VERYLOW(LED3) | \
698
PIN_OSPEED_SPEED_VERYLOW(LED4) | \
699
PIN_OSPEED_SPEED_VERYLOW(SRV4_TIM4_CH1) | \
700
PIN_OSPEED_SPEED_VERYLOW(SRV5_TIM4_CH2) | \
701
PIN_OSPEED_SPEED_VERYLOW(SRV6_TIM4_CH3) | \
702
PIN_OSPEED_SPEED_VERYLOW(SRV7_TIM4_CH4))
703
704
#define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(CAN1_RX) | \
705
PIN_PUPDR_FLOATING(CAN1_TX) | \
706
PIN_PUPDR_PULLUP(SDMMC1_CMD) | \
707
PIN_PUPDR_PULLDOWN(USART2_CTS) | \
708
PIN_PUPDR_PULLDOWN(USART2_RTS) | \
709
PIN_PUPDR_PULLDOWN(USART2_TX) | \
710
PIN_PUPDR_PULLDOWN(USART2_RX) | \
711
PIN_PUPDR_FLOATING(IMU_INT) | \
712
PIN_PUPDR_FLOATING(USART3_TX) | \
713
PIN_PUPDR_FLOATING(USART3_RX) | \
714
PIN_PUPDR_FLOATING(LED3) | \
715
PIN_PUPDR_FLOATING(LED4) | \
716
PIN_PUPDR_PULLDOWN(SRV4_TIM4_CH1) | \
717
PIN_PUPDR_PULLDOWN(SRV5_TIM4_CH2) | \
718
PIN_PUPDR_PULLDOWN(SRV6_TIM4_CH3) | \
719
PIN_PUPDR_PULLDOWN(SRV7_TIM4_CH4))
720
721
#define VAL_GPIOD_ODR (PIN_ODR_LEVEL_HIGH(CAN1_RX) | \
722
PIN_ODR_LEVEL_HIGH(CAN1_TX) | \
723
PIN_ODR_LEVEL_HIGH(SDMMC1_CMD) | \
724
PIN_ODR_LEVEL_HIGH(USART2_CTS) | \
725
PIN_ODR_LEVEL_HIGH(USART2_RTS) | \
726
PIN_ODR_LEVEL_HIGH(USART2_TX) | \
727
PIN_ODR_LEVEL_HIGH(USART2_RX) | \
728
PIN_ODR_LEVEL_LOW(IMU_INT) | \
729
PIN_ODR_LEVEL_HIGH(USART3_TX) | \
730
PIN_ODR_LEVEL_HIGH(USART3_RX) | \
731
PIN_ODR_LEVEL_LOW(LED3) | \
732
PIN_ODR_LEVEL_LOW(LED4) | \
733
PIN_ODR_LEVEL_HIGH(SRV4_TIM4_CH1) | \
734
PIN_ODR_LEVEL_HIGH(SRV5_TIM4_CH2) | \
735
PIN_ODR_LEVEL_HIGH(SRV6_TIM4_CH3) | \
736
PIN_ODR_LEVEL_HIGH(SRV7_TIM4_CH4))
737
738
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(CAN1_RX, 9) | \
739
PIN_AFIO_AF(CAN1_TX, 9) | \
740
PIN_AFIO_AF(SDMMC1_CMD, 12) | \
741
PIN_AFIO_AF(USART2_CTS, 0) | \
742
PIN_AFIO_AF(USART2_RTS, 0) | \
743
PIN_AFIO_AF(USART2_TX, 0) | \
744
PIN_AFIO_AF(USART2_RX, 0) | \
745
PIN_AFIO_AF(IMU_INT, 0))
746
747
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(USART3_TX, 7) | \
748
PIN_AFIO_AF(USART3_RX, 7) | \
749
PIN_AFIO_AF(LED3, 0) | \
750
PIN_AFIO_AF(LED4, 0) | \
751
PIN_AFIO_AF(SRV4_TIM4_CH1, 0) | \
752
PIN_AFIO_AF(SRV5_TIM4_CH2, 0) | \
753
PIN_AFIO_AF(SRV6_TIM4_CH3, 0) | \
754
PIN_AFIO_AF(SRV7_TIM4_CH4, 0))
755
756
#define VAL_GPIOE_MODER (PIN_MODE_ALTERNATE(UART8_RX) | \
757
PIN_MODE_ALTERNATE(UART8_TX) | \
758
PIN_MODE_OUTPUT(DIS_G) | \
759
PIN_MODE_OUTPUT(DIS_F) | \
760
PIN_MODE_OUTPUT(DIS_A) | \
761
PIN_MODE_OUTPUT(DIS_B) | \
762
PIN_MODE_OUTPUT(APSW) | \
763
PIN_MODE_INPUT(RC2_UART7_RX) | \
764
PIN_MODE_OUTPUT(DIS_E) | \
765
PIN_MODE_OUTPUT(DIS_D) | \
766
PIN_MODE_INPUT(PE10) | \
767
PIN_MODE_INPUT(PE11) | \
768
PIN_MODE_INPUT(PE12) | \
769
PIN_MODE_INPUT(PE13) | \
770
PIN_MODE_INPUT(PE14) | \
771
PIN_MODE_OUTPUT(XB_RST))
772
773
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(UART8_RX) | \
774
PIN_OTYPE_PUSHPULL(UART8_TX) | \
775
PIN_OTYPE_PUSHPULL(DIS_G) | \
776
PIN_OTYPE_PUSHPULL(DIS_F) | \
777
PIN_OTYPE_PUSHPULL(DIS_A) | \
778
PIN_OTYPE_PUSHPULL(DIS_B) | \
779
PIN_OTYPE_PUSHPULL(APSW) | \
780
PIN_OTYPE_OPENDRAIN(RC2_UART7_RX) | \
781
PIN_OTYPE_PUSHPULL(DIS_E) | \
782
PIN_OTYPE_PUSHPULL(DIS_D) | \
783
PIN_OTYPE_PUSHPULL(PE10) | \
784
PIN_OTYPE_PUSHPULL(PE11) | \
785
PIN_OTYPE_PUSHPULL(PE12) | \
786
PIN_OTYPE_PUSHPULL(PE13) | \
787
PIN_OTYPE_PUSHPULL(PE14) | \
788
PIN_OTYPE_PUSHPULL(XB_RST))
789
790
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_SPEED_HIGH(UART8_RX) | \
791
PIN_OSPEED_SPEED_HIGH(UART8_TX) | \
792
PIN_OSPEED_SPEED_VERYLOW(DIS_G) | \
793
PIN_OSPEED_SPEED_VERYLOW(DIS_F) | \
794
PIN_OSPEED_SPEED_VERYLOW(DIS_A) | \
795
PIN_OSPEED_SPEED_VERYLOW(DIS_B) | \
796
PIN_OSPEED_SPEED_VERYLOW(APSW) | \
797
PIN_OSPEED_SPEED_VERYLOW(RC2_UART7_RX) | \
798
PIN_OSPEED_SPEED_VERYLOW(DIS_E) | \
799
PIN_OSPEED_SPEED_VERYLOW(DIS_D) | \
800
PIN_OSPEED_SPEED_VERYLOW(PE10) | \
801
PIN_OSPEED_SPEED_VERYLOW(PE11) | \
802
PIN_OSPEED_SPEED_VERYLOW(PE12) | \
803
PIN_OSPEED_SPEED_VERYLOW(PE13) | \
804
PIN_OSPEED_SPEED_VERYLOW(PE14) | \
805
PIN_OSPEED_SPEED_VERYLOW(XB_RST))
806
807
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(UART8_RX) | \
808
PIN_PUPDR_FLOATING(UART8_TX) | \
809
PIN_PUPDR_FLOATING(DIS_G) | \
810
PIN_PUPDR_FLOATING(DIS_F) | \
811
PIN_PUPDR_FLOATING(DIS_A) | \
812
PIN_PUPDR_FLOATING(DIS_B) | \
813
PIN_PUPDR_FLOATING(APSW) | \
814
PIN_PUPDR_PULLDOWN(RC2_UART7_RX) | \
815
PIN_PUPDR_FLOATING(DIS_E) | \
816
PIN_PUPDR_FLOATING(DIS_D) | \
817
PIN_PUPDR_PULLDOWN(PE10) | \
818
PIN_PUPDR_PULLDOWN(PE11) | \
819
PIN_PUPDR_PULLDOWN(PE12) | \
820
PIN_PUPDR_PULLDOWN(PE13) | \
821
PIN_PUPDR_PULLDOWN(PE14) | \
822
PIN_PUPDR_FLOATING(XB_RST))
823
824
#define VAL_GPIOE_ODR (PIN_ODR_LEVEL_HIGH(UART8_RX) | \
825
PIN_ODR_LEVEL_HIGH(UART8_TX) | \
826
PIN_ODR_LEVEL_LOW(DIS_G) | \
827
PIN_ODR_LEVEL_LOW(DIS_F) | \
828
PIN_ODR_LEVEL_LOW(DIS_A) | \
829
PIN_ODR_LEVEL_LOW(DIS_B) | \
830
PIN_ODR_LEVEL_HIGH(APSW) | \
831
PIN_ODR_LEVEL_HIGH(RC2_UART7_RX) | \
832
PIN_ODR_LEVEL_LOW(DIS_E) | \
833
PIN_ODR_LEVEL_LOW(DIS_D) | \
834
PIN_ODR_LEVEL_LOW(PE10) | \
835
PIN_ODR_LEVEL_LOW(PE11) | \
836
PIN_ODR_LEVEL_LOW(PE12) | \
837
PIN_ODR_LEVEL_LOW(PE13) | \
838
PIN_ODR_LEVEL_LOW(PE14) | \
839
PIN_ODR_LEVEL_HIGH(XB_RST))
840
841
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(UART8_RX, 8) | \
842
PIN_AFIO_AF(UART8_TX, 8) | \
843
PIN_AFIO_AF(DIS_G, 0) | \
844
PIN_AFIO_AF(DIS_F, 0) | \
845
PIN_AFIO_AF(DIS_A, 0) | \
846
PIN_AFIO_AF(DIS_B, 0) | \
847
PIN_AFIO_AF(APSW, 0) | \
848
PIN_AFIO_AF(RC2_UART7_RX, 0))
849
850
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(DIS_E, 0) | \
851
PIN_AFIO_AF(DIS_D, 0) | \
852
PIN_AFIO_AF(PE10, 0) | \
853
PIN_AFIO_AF(PE11, 0) | \
854
PIN_AFIO_AF(PE12, 0) | \
855
PIN_AFIO_AF(PE13, 0) | \
856
PIN_AFIO_AF(PE14, 0) | \
857
PIN_AFIO_AF(XB_RST, 0))
858
859
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(PF00) | \
860
PIN_MODE_INPUT(PF01) | \
861
PIN_MODE_INPUT(PF02) | \
862
PIN_MODE_INPUT(PF03) | \
863
PIN_MODE_INPUT(PF04) | \
864
PIN_MODE_INPUT(PF05) | \
865
PIN_MODE_INPUT(PF06) | \
866
PIN_MODE_INPUT(PF07) | \
867
PIN_MODE_INPUT(PF08) | \
868
PIN_MODE_INPUT(PF09) | \
869
PIN_MODE_INPUT(PF10) | \
870
PIN_MODE_INPUT(PF11) | \
871
PIN_MODE_INPUT(PF12) | \
872
PIN_MODE_INPUT(PF13) | \
873
PIN_MODE_INPUT(PF14) | \
874
PIN_MODE_INPUT(PF15))
875
876
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(PF00) | \
877
PIN_OTYPE_PUSHPULL(PF01) | \
878
PIN_OTYPE_PUSHPULL(PF02) | \
879
PIN_OTYPE_PUSHPULL(PF03) | \
880
PIN_OTYPE_PUSHPULL(PF04) | \
881
PIN_OTYPE_PUSHPULL(PF05) | \
882
PIN_OTYPE_PUSHPULL(PF06) | \
883
PIN_OTYPE_PUSHPULL(PF07) | \
884
PIN_OTYPE_PUSHPULL(PF08) | \
885
PIN_OTYPE_PUSHPULL(PF09) | \
886
PIN_OTYPE_PUSHPULL(PF10) | \
887
PIN_OTYPE_PUSHPULL(PF11) | \
888
PIN_OTYPE_PUSHPULL(PF12) | \
889
PIN_OTYPE_PUSHPULL(PF13) | \
890
PIN_OTYPE_PUSHPULL(PF14) | \
891
PIN_OTYPE_PUSHPULL(PF15))
892
893
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PF00) | \
894
PIN_OSPEED_SPEED_VERYLOW(PF01) | \
895
PIN_OSPEED_SPEED_VERYLOW(PF02) | \
896
PIN_OSPEED_SPEED_VERYLOW(PF03) | \
897
PIN_OSPEED_SPEED_VERYLOW(PF04) | \
898
PIN_OSPEED_SPEED_VERYLOW(PF05) | \
899
PIN_OSPEED_SPEED_VERYLOW(PF06) | \
900
PIN_OSPEED_SPEED_VERYLOW(PF07) | \
901
PIN_OSPEED_SPEED_VERYLOW(PF08) | \
902
PIN_OSPEED_SPEED_VERYLOW(PF09) | \
903
PIN_OSPEED_SPEED_VERYLOW(PF10) | \
904
PIN_OSPEED_SPEED_VERYLOW(PF11) | \
905
PIN_OSPEED_SPEED_VERYLOW(PF12) | \
906
PIN_OSPEED_SPEED_VERYLOW(PF13) | \
907
PIN_OSPEED_SPEED_VERYLOW(PF14) | \
908
PIN_OSPEED_SPEED_VERYLOW(PF15))
909
910
#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLDOWN(PF00) | \
911
PIN_PUPDR_PULLDOWN(PF01) | \
912
PIN_PUPDR_PULLDOWN(PF02) | \
913
PIN_PUPDR_PULLDOWN(PF03) | \
914
PIN_PUPDR_PULLDOWN(PF04) | \
915
PIN_PUPDR_PULLDOWN(PF05) | \
916
PIN_PUPDR_PULLDOWN(PF06) | \
917
PIN_PUPDR_PULLDOWN(PF07) | \
918
PIN_PUPDR_PULLDOWN(PF08) | \
919
PIN_PUPDR_PULLDOWN(PF09) | \
920
PIN_PUPDR_PULLDOWN(PF10) | \
921
PIN_PUPDR_PULLDOWN(PF11) | \
922
PIN_PUPDR_PULLDOWN(PF12) | \
923
PIN_PUPDR_PULLDOWN(PF13) | \
924
PIN_PUPDR_PULLDOWN(PF14) | \
925
PIN_PUPDR_PULLDOWN(PF15))
926
927
#define VAL_GPIOF_ODR (PIN_ODR_LEVEL_LOW(PF00) | \
928
PIN_ODR_LEVEL_LOW(PF01) | \
929
PIN_ODR_LEVEL_LOW(PF02) | \
930
PIN_ODR_LEVEL_LOW(PF03) | \
931
PIN_ODR_LEVEL_LOW(PF04) | \
932
PIN_ODR_LEVEL_LOW(PF05) | \
933
PIN_ODR_LEVEL_LOW(PF06) | \
934
PIN_ODR_LEVEL_LOW(PF07) | \
935
PIN_ODR_LEVEL_LOW(PF08) | \
936
PIN_ODR_LEVEL_LOW(PF09) | \
937
PIN_ODR_LEVEL_LOW(PF10) | \
938
PIN_ODR_LEVEL_LOW(PF11) | \
939
PIN_ODR_LEVEL_LOW(PF12) | \
940
PIN_ODR_LEVEL_LOW(PF13) | \
941
PIN_ODR_LEVEL_LOW(PF14) | \
942
PIN_ODR_LEVEL_LOW(PF15))
943
944
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(PF00, 0) | \
945
PIN_AFIO_AF(PF01, 0) | \
946
PIN_AFIO_AF(PF02, 0) | \
947
PIN_AFIO_AF(PF03, 0) | \
948
PIN_AFIO_AF(PF04, 0) | \
949
PIN_AFIO_AF(PF05, 0) | \
950
PIN_AFIO_AF(PF06, 0) | \
951
PIN_AFIO_AF(PF07, 0))
952
953
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(PF08, 0) | \
954
PIN_AFIO_AF(PF09, 0) | \
955
PIN_AFIO_AF(PF10, 0) | \
956
PIN_AFIO_AF(PF11, 0) | \
957
PIN_AFIO_AF(PF12, 0) | \
958
PIN_AFIO_AF(PF13, 0) | \
959
PIN_AFIO_AF(PF14, 0) | \
960
PIN_AFIO_AF(PF15, 0))
961
962
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(PG00) | \
963
PIN_MODE_INPUT(PG01) | \
964
PIN_MODE_INPUT(PG02) | \
965
PIN_MODE_INPUT(PG03) | \
966
PIN_MODE_INPUT(PG04) | \
967
PIN_MODE_INPUT(PG05) | \
968
PIN_MODE_INPUT(PG06) | \
969
PIN_MODE_INPUT(PG07) | \
970
PIN_MODE_INPUT(PG08) | \
971
PIN_MODE_INPUT(PG09) | \
972
PIN_MODE_INPUT(PG10) | \
973
PIN_MODE_INPUT(PG11) | \
974
PIN_MODE_INPUT(PG12) | \
975
PIN_MODE_INPUT(PG13) | \
976
PIN_MODE_INPUT(PG14) | \
977
PIN_MODE_INPUT(PG15))
978
979
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(PG00) | \
980
PIN_OTYPE_PUSHPULL(PG01) | \
981
PIN_OTYPE_PUSHPULL(PG02) | \
982
PIN_OTYPE_PUSHPULL(PG03) | \
983
PIN_OTYPE_PUSHPULL(PG04) | \
984
PIN_OTYPE_PUSHPULL(PG05) | \
985
PIN_OTYPE_PUSHPULL(PG06) | \
986
PIN_OTYPE_PUSHPULL(PG07) | \
987
PIN_OTYPE_PUSHPULL(PG08) | \
988
PIN_OTYPE_PUSHPULL(PG09) | \
989
PIN_OTYPE_PUSHPULL(PG10) | \
990
PIN_OTYPE_PUSHPULL(PG11) | \
991
PIN_OTYPE_PUSHPULL(PG12) | \
992
PIN_OTYPE_PUSHPULL(PG13) | \
993
PIN_OTYPE_PUSHPULL(PG14) | \
994
PIN_OTYPE_PUSHPULL(PG15))
995
996
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PG00) | \
997
PIN_OSPEED_SPEED_VERYLOW(PG01) | \
998
PIN_OSPEED_SPEED_VERYLOW(PG02) | \
999
PIN_OSPEED_SPEED_VERYLOW(PG03) | \
1000
PIN_OSPEED_SPEED_VERYLOW(PG04) | \
1001
PIN_OSPEED_SPEED_VERYLOW(PG05) | \
1002
PIN_OSPEED_SPEED_VERYLOW(PG06) | \
1003
PIN_OSPEED_SPEED_VERYLOW(PG07) | \
1004
PIN_OSPEED_SPEED_VERYLOW(PG08) | \
1005
PIN_OSPEED_SPEED_VERYLOW(PG09) | \
1006
PIN_OSPEED_SPEED_VERYLOW(PG10) | \
1007
PIN_OSPEED_SPEED_VERYLOW(PG11) | \
1008
PIN_OSPEED_SPEED_VERYLOW(PG12) | \
1009
PIN_OSPEED_SPEED_VERYLOW(PG13) | \
1010
PIN_OSPEED_SPEED_VERYLOW(PG14) | \
1011
PIN_OSPEED_SPEED_VERYLOW(PG15))
1012
1013
#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLDOWN(PG00) | \
1014
PIN_PUPDR_PULLDOWN(PG01) | \
1015
PIN_PUPDR_PULLDOWN(PG02) | \
1016
PIN_PUPDR_PULLDOWN(PG03) | \
1017
PIN_PUPDR_PULLDOWN(PG04) | \
1018
PIN_PUPDR_PULLDOWN(PG05) | \
1019
PIN_PUPDR_PULLDOWN(PG06) | \
1020
PIN_PUPDR_PULLDOWN(PG07) | \
1021
PIN_PUPDR_PULLDOWN(PG08) | \
1022
PIN_PUPDR_PULLDOWN(PG09) | \
1023
PIN_PUPDR_PULLDOWN(PG10) | \
1024
PIN_PUPDR_PULLDOWN(PG11) | \
1025
PIN_PUPDR_PULLDOWN(PG12) | \
1026
PIN_PUPDR_PULLDOWN(PG13) | \
1027
PIN_PUPDR_PULLDOWN(PG14) | \
1028
PIN_PUPDR_PULLDOWN(PG15))
1029
1030
#define VAL_GPIOG_ODR (PIN_ODR_LEVEL_LOW(PG00) | \
1031
PIN_ODR_LEVEL_LOW(PG01) | \
1032
PIN_ODR_LEVEL_LOW(PG02) | \
1033
PIN_ODR_LEVEL_LOW(PG03) | \
1034
PIN_ODR_LEVEL_LOW(PG04) | \
1035
PIN_ODR_LEVEL_LOW(PG05) | \
1036
PIN_ODR_LEVEL_LOW(PG06) | \
1037
PIN_ODR_LEVEL_LOW(PG07) | \
1038
PIN_ODR_LEVEL_LOW(PG08) | \
1039
PIN_ODR_LEVEL_LOW(PG09) | \
1040
PIN_ODR_LEVEL_LOW(PG10) | \
1041
PIN_ODR_LEVEL_LOW(PG11) | \
1042
PIN_ODR_LEVEL_LOW(PG12) | \
1043
PIN_ODR_LEVEL_LOW(PG13) | \
1044
PIN_ODR_LEVEL_LOW(PG14) | \
1045
PIN_ODR_LEVEL_LOW(PG15))
1046
1047
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(PG00, 0) | \
1048
PIN_AFIO_AF(PG01, 0) | \
1049
PIN_AFIO_AF(PG02, 0) | \
1050
PIN_AFIO_AF(PG03, 0) | \
1051
PIN_AFIO_AF(PG04, 0) | \
1052
PIN_AFIO_AF(PG05, 0) | \
1053
PIN_AFIO_AF(PG06, 0) | \
1054
PIN_AFIO_AF(PG07, 0))
1055
1056
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(PG08, 0) | \
1057
PIN_AFIO_AF(PG09, 0) | \
1058
PIN_AFIO_AF(PG10, 0) | \
1059
PIN_AFIO_AF(PG11, 0) | \
1060
PIN_AFIO_AF(PG12, 0) | \
1061
PIN_AFIO_AF(PG13, 0) | \
1062
PIN_AFIO_AF(PG14, 0) | \
1063
PIN_AFIO_AF(PG15, 0))
1064
1065
#define VAL_GPIOH_MODER (PIN_MODE_ALTERNATE(OSC_IN) | \
1066
PIN_MODE_ALTERNATE(OSC_OUT) | \
1067
PIN_MODE_INPUT(PH02) | \
1068
PIN_MODE_INPUT(PH03) | \
1069
PIN_MODE_INPUT(PH04) | \
1070
PIN_MODE_INPUT(PH05) | \
1071
PIN_MODE_INPUT(PH06) | \
1072
PIN_MODE_INPUT(PH07) | \
1073
PIN_MODE_INPUT(PH08) | \
1074
PIN_MODE_INPUT(PH09) | \
1075
PIN_MODE_INPUT(PH10) | \
1076
PIN_MODE_INPUT(PH11) | \
1077
PIN_MODE_INPUT(PH12) | \
1078
PIN_MODE_INPUT(PH13) | \
1079
PIN_MODE_INPUT(PH14) | \
1080
PIN_MODE_INPUT(PH15))
1081
1082
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(OSC_IN) | \
1083
PIN_OTYPE_PUSHPULL(OSC_OUT) | \
1084
PIN_OTYPE_PUSHPULL(PH02) | \
1085
PIN_OTYPE_PUSHPULL(PH03) | \
1086
PIN_OTYPE_PUSHPULL(PH04) | \
1087
PIN_OTYPE_PUSHPULL(PH05) | \
1088
PIN_OTYPE_PUSHPULL(PH06) | \
1089
PIN_OTYPE_PUSHPULL(PH07) | \
1090
PIN_OTYPE_PUSHPULL(PH08) | \
1091
PIN_OTYPE_PUSHPULL(PH09) | \
1092
PIN_OTYPE_PUSHPULL(PH10) | \
1093
PIN_OTYPE_PUSHPULL(PH11) | \
1094
PIN_OTYPE_PUSHPULL(PH12) | \
1095
PIN_OTYPE_PUSHPULL(PH13) | \
1096
PIN_OTYPE_PUSHPULL(PH14) | \
1097
PIN_OTYPE_PUSHPULL(PH15))
1098
1099
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_SPEED_HIGH(OSC_IN) | \
1100
PIN_OSPEED_SPEED_HIGH(OSC_OUT) | \
1101
PIN_OSPEED_SPEED_VERYLOW(PH02) | \
1102
PIN_OSPEED_SPEED_VERYLOW(PH03) | \
1103
PIN_OSPEED_SPEED_VERYLOW(PH04) | \
1104
PIN_OSPEED_SPEED_VERYLOW(PH05) | \
1105
PIN_OSPEED_SPEED_VERYLOW(PH06) | \
1106
PIN_OSPEED_SPEED_VERYLOW(PH07) | \
1107
PIN_OSPEED_SPEED_VERYLOW(PH08) | \
1108
PIN_OSPEED_SPEED_VERYLOW(PH09) | \
1109
PIN_OSPEED_SPEED_VERYLOW(PH10) | \
1110
PIN_OSPEED_SPEED_VERYLOW(PH11) | \
1111
PIN_OSPEED_SPEED_VERYLOW(PH12) | \
1112
PIN_OSPEED_SPEED_VERYLOW(PH13) | \
1113
PIN_OSPEED_SPEED_VERYLOW(PH14) | \
1114
PIN_OSPEED_SPEED_VERYLOW(PH15))
1115
1116
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(OSC_IN) | \
1117
PIN_PUPDR_FLOATING(OSC_OUT) | \
1118
PIN_PUPDR_PULLDOWN(PH02) | \
1119
PIN_PUPDR_PULLDOWN(PH03) | \
1120
PIN_PUPDR_PULLDOWN(PH04) | \
1121
PIN_PUPDR_PULLDOWN(PH05) | \
1122
PIN_PUPDR_PULLDOWN(PH06) | \
1123
PIN_PUPDR_PULLDOWN(PH07) | \
1124
PIN_PUPDR_PULLDOWN(PH08) | \
1125
PIN_PUPDR_PULLDOWN(PH09) | \
1126
PIN_PUPDR_PULLDOWN(PH10) | \
1127
PIN_PUPDR_PULLDOWN(PH11) | \
1128
PIN_PUPDR_PULLDOWN(PH12) | \
1129
PIN_PUPDR_PULLDOWN(PH13) | \
1130
PIN_PUPDR_PULLDOWN(PH14) | \
1131
PIN_PUPDR_PULLDOWN(PH15))
1132
1133
#define VAL_GPIOH_ODR (PIN_ODR_LEVEL_HIGH(OSC_IN) | \
1134
PIN_ODR_LEVEL_HIGH(OSC_OUT) | \
1135
PIN_ODR_LEVEL_LOW(PH02) | \
1136
PIN_ODR_LEVEL_LOW(PH03) | \
1137
PIN_ODR_LEVEL_LOW(PH04) | \
1138
PIN_ODR_LEVEL_LOW(PH05) | \
1139
PIN_ODR_LEVEL_LOW(PH06) | \
1140
PIN_ODR_LEVEL_LOW(PH07) | \
1141
PIN_ODR_LEVEL_LOW(PH08) | \
1142
PIN_ODR_LEVEL_LOW(PH09) | \
1143
PIN_ODR_LEVEL_LOW(PH10) | \
1144
PIN_ODR_LEVEL_LOW(PH11) | \
1145
PIN_ODR_LEVEL_LOW(PH12) | \
1146
PIN_ODR_LEVEL_LOW(PH13) | \
1147
PIN_ODR_LEVEL_LOW(PH14) | \
1148
PIN_ODR_LEVEL_LOW(PH15))
1149
1150
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(OSC_IN, 0) | \
1151
PIN_AFIO_AF(OSC_OUT, 0) | \
1152
PIN_AFIO_AF(PH02, 0) | \
1153
PIN_AFIO_AF(PH03, 0) | \
1154
PIN_AFIO_AF(PH04, 0) | \
1155
PIN_AFIO_AF(PH05, 0) | \
1156
PIN_AFIO_AF(PH06, 0) | \
1157
PIN_AFIO_AF(PH07, 0))
1158
1159
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(PH08, 0) | \
1160
PIN_AFIO_AF(PH09, 0) | \
1161
PIN_AFIO_AF(PH10, 0) | \
1162
PIN_AFIO_AF(PH11, 0) | \
1163
PIN_AFIO_AF(PH12, 0) | \
1164
PIN_AFIO_AF(PH13, 0) | \
1165
PIN_AFIO_AF(PH14, 0) | \
1166
PIN_AFIO_AF(PH15, 0))
1167
1168
#define VAL_GPIOI_MODER (PIN_MODE_INPUT(PI00) | \
1169
PIN_MODE_INPUT(PI01) | \
1170
PIN_MODE_INPUT(PI02) | \
1171
PIN_MODE_INPUT(PI03) | \
1172
PIN_MODE_INPUT(PI04) | \
1173
PIN_MODE_INPUT(PI05) | \
1174
PIN_MODE_INPUT(PI06) | \
1175
PIN_MODE_INPUT(PI07) | \
1176
PIN_MODE_INPUT(PI08) | \
1177
PIN_MODE_INPUT(PI09) | \
1178
PIN_MODE_INPUT(PI10) | \
1179
PIN_MODE_INPUT(PI11) | \
1180
PIN_MODE_INPUT(PI12) | \
1181
PIN_MODE_INPUT(PI13) | \
1182
PIN_MODE_INPUT(PI14) | \
1183
PIN_MODE_INPUT(PI15))
1184
1185
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(PI00) | \
1186
PIN_OTYPE_PUSHPULL(PI01) | \
1187
PIN_OTYPE_PUSHPULL(PI02) | \
1188
PIN_OTYPE_PUSHPULL(PI03) | \
1189
PIN_OTYPE_PUSHPULL(PI04) | \
1190
PIN_OTYPE_PUSHPULL(PI05) | \
1191
PIN_OTYPE_PUSHPULL(PI06) | \
1192
PIN_OTYPE_PUSHPULL(PI07) | \
1193
PIN_OTYPE_PUSHPULL(PI08) | \
1194
PIN_OTYPE_PUSHPULL(PI09) | \
1195
PIN_OTYPE_PUSHPULL(PI10) | \
1196
PIN_OTYPE_PUSHPULL(PI11) | \
1197
PIN_OTYPE_PUSHPULL(PI12) | \
1198
PIN_OTYPE_PUSHPULL(PI13) | \
1199
PIN_OTYPE_PUSHPULL(PI14) | \
1200
PIN_OTYPE_PUSHPULL(PI15))
1201
1202
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PI00) | \
1203
PIN_OSPEED_SPEED_VERYLOW(PI01) | \
1204
PIN_OSPEED_SPEED_VERYLOW(PI02) | \
1205
PIN_OSPEED_SPEED_VERYLOW(PI03) | \
1206
PIN_OSPEED_SPEED_VERYLOW(PI04) | \
1207
PIN_OSPEED_SPEED_VERYLOW(PI05) | \
1208
PIN_OSPEED_SPEED_VERYLOW(PI06) | \
1209
PIN_OSPEED_SPEED_VERYLOW(PI07) | \
1210
PIN_OSPEED_SPEED_VERYLOW(PI08) | \
1211
PIN_OSPEED_SPEED_VERYLOW(PI09) | \
1212
PIN_OSPEED_SPEED_VERYLOW(PI10) | \
1213
PIN_OSPEED_SPEED_VERYLOW(PI11) | \
1214
PIN_OSPEED_SPEED_VERYLOW(PI12) | \
1215
PIN_OSPEED_SPEED_VERYLOW(PI13) | \
1216
PIN_OSPEED_SPEED_VERYLOW(PI14) | \
1217
PIN_OSPEED_SPEED_VERYLOW(PI15))
1218
1219
#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLDOWN(PI00) | \
1220
PIN_PUPDR_PULLDOWN(PI01) | \
1221
PIN_PUPDR_PULLDOWN(PI02) | \
1222
PIN_PUPDR_PULLDOWN(PI03) | \
1223
PIN_PUPDR_PULLDOWN(PI04) | \
1224
PIN_PUPDR_PULLDOWN(PI05) | \
1225
PIN_PUPDR_PULLDOWN(PI06) | \
1226
PIN_PUPDR_PULLDOWN(PI07) | \
1227
PIN_PUPDR_PULLDOWN(PI08) | \
1228
PIN_PUPDR_PULLDOWN(PI09) | \
1229
PIN_PUPDR_PULLDOWN(PI10) | \
1230
PIN_PUPDR_PULLDOWN(PI11) | \
1231
PIN_PUPDR_PULLDOWN(PI12) | \
1232
PIN_PUPDR_PULLDOWN(PI13) | \
1233
PIN_PUPDR_PULLDOWN(PI14) | \
1234
PIN_PUPDR_PULLDOWN(PI15))
1235
1236
#define VAL_GPIOI_ODR (PIN_ODR_LEVEL_LOW(PI00) | \
1237
PIN_ODR_LEVEL_LOW(PI01) | \
1238
PIN_ODR_LEVEL_LOW(PI02) | \
1239
PIN_ODR_LEVEL_LOW(PI03) | \
1240
PIN_ODR_LEVEL_LOW(PI04) | \
1241
PIN_ODR_LEVEL_LOW(PI05) | \
1242
PIN_ODR_LEVEL_LOW(PI06) | \
1243
PIN_ODR_LEVEL_LOW(PI07) | \
1244
PIN_ODR_LEVEL_LOW(PI08) | \
1245
PIN_ODR_LEVEL_LOW(PI09) | \
1246
PIN_ODR_LEVEL_LOW(PI10) | \
1247
PIN_ODR_LEVEL_LOW(PI11) | \
1248
PIN_ODR_LEVEL_LOW(PI12) | \
1249
PIN_ODR_LEVEL_LOW(PI13) | \
1250
PIN_ODR_LEVEL_LOW(PI14) | \
1251
PIN_ODR_LEVEL_LOW(PI15))
1252
1253
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(PI00, 0) | \
1254
PIN_AFIO_AF(PI01, 0) | \
1255
PIN_AFIO_AF(PI02, 0) | \
1256
PIN_AFIO_AF(PI03, 0) | \
1257
PIN_AFIO_AF(PI04, 0) | \
1258
PIN_AFIO_AF(PI05, 0) | \
1259
PIN_AFIO_AF(PI06, 0) | \
1260
PIN_AFIO_AF(PI07, 0))
1261
1262
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(PI08, 0) | \
1263
PIN_AFIO_AF(PI09, 0) | \
1264
PIN_AFIO_AF(PI10, 0) | \
1265
PIN_AFIO_AF(PI11, 0) | \
1266
PIN_AFIO_AF(PI12, 0) | \
1267
PIN_AFIO_AF(PI13, 0) | \
1268
PIN_AFIO_AF(PI14, 0) | \
1269
PIN_AFIO_AF(PI15, 0))
1270
1271
#define VAL_GPIOJ_MODER (PIN_MODE_INPUT(PJ00) | \
1272
PIN_MODE_INPUT(PJ01) | \
1273
PIN_MODE_INPUT(PJ02) | \
1274
PIN_MODE_INPUT(PJ03) | \
1275
PIN_MODE_INPUT(PJ04) | \
1276
PIN_MODE_INPUT(PJ05) | \
1277
PIN_MODE_INPUT(PJ06) | \
1278
PIN_MODE_INPUT(PJ07) | \
1279
PIN_MODE_INPUT(PJ08) | \
1280
PIN_MODE_INPUT(PJ09) | \
1281
PIN_MODE_INPUT(PJ10) | \
1282
PIN_MODE_INPUT(PJ11) | \
1283
PIN_MODE_INPUT(PJ12) | \
1284
PIN_MODE_INPUT(PJ13) | \
1285
PIN_MODE_INPUT(PJ14) | \
1286
PIN_MODE_INPUT(PJ15))
1287
1288
#define VAL_GPIOJ_OTYPER (PIN_OTYPE_PUSHPULL(PJ00) | \
1289
PIN_OTYPE_PUSHPULL(PJ01) | \
1290
PIN_OTYPE_PUSHPULL(PJ02) | \
1291
PIN_OTYPE_PUSHPULL(PJ03) | \
1292
PIN_OTYPE_PUSHPULL(PJ04) | \
1293
PIN_OTYPE_PUSHPULL(PJ05) | \
1294
PIN_OTYPE_PUSHPULL(PJ06) | \
1295
PIN_OTYPE_PUSHPULL(PJ07) | \
1296
PIN_OTYPE_PUSHPULL(PJ08) | \
1297
PIN_OTYPE_PUSHPULL(PJ09) | \
1298
PIN_OTYPE_PUSHPULL(PJ10) | \
1299
PIN_OTYPE_PUSHPULL(PJ11) | \
1300
PIN_OTYPE_PUSHPULL(PJ12) | \
1301
PIN_OTYPE_PUSHPULL(PJ13) | \
1302
PIN_OTYPE_PUSHPULL(PJ14) | \
1303
PIN_OTYPE_PUSHPULL(PJ15))
1304
1305
#define VAL_GPIOJ_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PJ00) | \
1306
PIN_OSPEED_SPEED_VERYLOW(PJ01) | \
1307
PIN_OSPEED_SPEED_VERYLOW(PJ02) | \
1308
PIN_OSPEED_SPEED_VERYLOW(PJ03) | \
1309
PIN_OSPEED_SPEED_VERYLOW(PJ04) | \
1310
PIN_OSPEED_SPEED_VERYLOW(PJ05) | \
1311
PIN_OSPEED_SPEED_VERYLOW(PJ06) | \
1312
PIN_OSPEED_SPEED_VERYLOW(PJ07) | \
1313
PIN_OSPEED_SPEED_VERYLOW(PJ08) | \
1314
PIN_OSPEED_SPEED_VERYLOW(PJ09) | \
1315
PIN_OSPEED_SPEED_VERYLOW(PJ10) | \
1316
PIN_OSPEED_SPEED_VERYLOW(PJ11) | \
1317
PIN_OSPEED_SPEED_VERYLOW(PJ12) | \
1318
PIN_OSPEED_SPEED_VERYLOW(PJ13) | \
1319
PIN_OSPEED_SPEED_VERYLOW(PJ14) | \
1320
PIN_OSPEED_SPEED_VERYLOW(PJ15))
1321
1322
#define VAL_GPIOJ_PUPDR (PIN_PUPDR_PULLDOWN(PJ00) | \
1323
PIN_PUPDR_PULLDOWN(PJ01) | \
1324
PIN_PUPDR_PULLDOWN(PJ02) | \
1325
PIN_PUPDR_PULLDOWN(PJ03) | \
1326
PIN_PUPDR_PULLDOWN(PJ04) | \
1327
PIN_PUPDR_PULLDOWN(PJ05) | \
1328
PIN_PUPDR_PULLDOWN(PJ06) | \
1329
PIN_PUPDR_PULLDOWN(PJ07) | \
1330
PIN_PUPDR_PULLDOWN(PJ08) | \
1331
PIN_PUPDR_PULLDOWN(PJ09) | \
1332
PIN_PUPDR_PULLDOWN(PJ10) | \
1333
PIN_PUPDR_PULLDOWN(PJ11) | \
1334
PIN_PUPDR_PULLDOWN(PJ12) | \
1335
PIN_PUPDR_PULLDOWN(PJ13) | \
1336
PIN_PUPDR_PULLDOWN(PJ14) | \
1337
PIN_PUPDR_PULLDOWN(PJ15))
1338
1339
#define VAL_GPIOJ_ODR (PIN_ODR_LEVEL_LOW(PJ00) | \
1340
PIN_ODR_LEVEL_LOW(PJ01) | \
1341
PIN_ODR_LEVEL_LOW(PJ02) | \
1342
PIN_ODR_LEVEL_LOW(PJ03) | \
1343
PIN_ODR_LEVEL_LOW(PJ04) | \
1344
PIN_ODR_LEVEL_LOW(PJ05) | \
1345
PIN_ODR_LEVEL_LOW(PJ06) | \
1346
PIN_ODR_LEVEL_LOW(PJ07) | \
1347
PIN_ODR_LEVEL_LOW(PJ08) | \
1348
PIN_ODR_LEVEL_LOW(PJ09) | \
1349
PIN_ODR_LEVEL_LOW(PJ10) | \
1350
PIN_ODR_LEVEL_LOW(PJ11) | \
1351
PIN_ODR_LEVEL_LOW(PJ12) | \
1352
PIN_ODR_LEVEL_LOW(PJ13) | \
1353
PIN_ODR_LEVEL_LOW(PJ14) | \
1354
PIN_ODR_LEVEL_LOW(PJ15))
1355
1356
#define VAL_GPIOJ_AFRL (PIN_AFIO_AF(PJ00, 0) | \
1357
PIN_AFIO_AF(PJ01, 0) | \
1358
PIN_AFIO_AF(PJ02, 0) | \
1359
PIN_AFIO_AF(PJ03, 0) | \
1360
PIN_AFIO_AF(PJ04, 0) | \
1361
PIN_AFIO_AF(PJ05, 0) | \
1362
PIN_AFIO_AF(PJ06, 0) | \
1363
PIN_AFIO_AF(PJ07, 0))
1364
1365
#define VAL_GPIOJ_AFRH (PIN_AFIO_AF(PJ08, 0) | \
1366
PIN_AFIO_AF(PJ09, 0) | \
1367
PIN_AFIO_AF(PJ10, 0) | \
1368
PIN_AFIO_AF(PJ11, 0) | \
1369
PIN_AFIO_AF(PJ12, 0) | \
1370
PIN_AFIO_AF(PJ13, 0) | \
1371
PIN_AFIO_AF(PJ14, 0) | \
1372
PIN_AFIO_AF(PJ15, 0))
1373
1374
#define VAL_GPIOK_MODER (PIN_MODE_INPUT(PK00) | \
1375
PIN_MODE_INPUT(PK01) | \
1376
PIN_MODE_INPUT(PK02) | \
1377
PIN_MODE_INPUT(PK03) | \
1378
PIN_MODE_INPUT(PK04) | \
1379
PIN_MODE_INPUT(PK05) | \
1380
PIN_MODE_INPUT(PK06) | \
1381
PIN_MODE_INPUT(PK07) | \
1382
PIN_MODE_INPUT(PK08) | \
1383
PIN_MODE_INPUT(PK09) | \
1384
PIN_MODE_INPUT(PK10) | \
1385
PIN_MODE_INPUT(PK11) | \
1386
PIN_MODE_INPUT(PK12) | \
1387
PIN_MODE_INPUT(PK13) | \
1388
PIN_MODE_INPUT(PK14) | \
1389
PIN_MODE_INPUT(PK15))
1390
1391
#define VAL_GPIOK_OTYPER (PIN_OTYPE_PUSHPULL(PK00) | \
1392
PIN_OTYPE_PUSHPULL(PK01) | \
1393
PIN_OTYPE_PUSHPULL(PK02) | \
1394
PIN_OTYPE_PUSHPULL(PK03) | \
1395
PIN_OTYPE_PUSHPULL(PK04) | \
1396
PIN_OTYPE_PUSHPULL(PK05) | \
1397
PIN_OTYPE_PUSHPULL(PK06) | \
1398
PIN_OTYPE_PUSHPULL(PK07) | \
1399
PIN_OTYPE_PUSHPULL(PK08) | \
1400
PIN_OTYPE_PUSHPULL(PK09) | \
1401
PIN_OTYPE_PUSHPULL(PK10) | \
1402
PIN_OTYPE_PUSHPULL(PK11) | \
1403
PIN_OTYPE_PUSHPULL(PK12) | \
1404
PIN_OTYPE_PUSHPULL(PK13) | \
1405
PIN_OTYPE_PUSHPULL(PK14) | \
1406
PIN_OTYPE_PUSHPULL(PK15))
1407
1408
#define VAL_GPIOK_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PK00) | \
1409
PIN_OSPEED_SPEED_VERYLOW(PK01) | \
1410
PIN_OSPEED_SPEED_VERYLOW(PK02) | \
1411
PIN_OSPEED_SPEED_VERYLOW(PK03) | \
1412
PIN_OSPEED_SPEED_VERYLOW(PK04) | \
1413
PIN_OSPEED_SPEED_VERYLOW(PK05) | \
1414
PIN_OSPEED_SPEED_VERYLOW(PK06) | \
1415
PIN_OSPEED_SPEED_VERYLOW(PK07) | \
1416
PIN_OSPEED_SPEED_VERYLOW(PK08) | \
1417
PIN_OSPEED_SPEED_VERYLOW(PK09) | \
1418
PIN_OSPEED_SPEED_VERYLOW(PK10) | \
1419
PIN_OSPEED_SPEED_VERYLOW(PK11) | \
1420
PIN_OSPEED_SPEED_VERYLOW(PK12) | \
1421
PIN_OSPEED_SPEED_VERYLOW(PK13) | \
1422
PIN_OSPEED_SPEED_VERYLOW(PK14) | \
1423
PIN_OSPEED_SPEED_VERYLOW(PK15))
1424
1425
#define VAL_GPIOK_PUPDR (PIN_PUPDR_PULLDOWN(PK00) | \
1426
PIN_PUPDR_PULLDOWN(PK01) | \
1427
PIN_PUPDR_PULLDOWN(PK02) | \
1428
PIN_PUPDR_PULLDOWN(PK03) | \
1429
PIN_PUPDR_PULLDOWN(PK04) | \
1430
PIN_PUPDR_PULLDOWN(PK05) | \
1431
PIN_PUPDR_PULLDOWN(PK06) | \
1432
PIN_PUPDR_PULLDOWN(PK07) | \
1433
PIN_PUPDR_PULLDOWN(PK08) | \
1434
PIN_PUPDR_PULLDOWN(PK09) | \
1435
PIN_PUPDR_PULLDOWN(PK10) | \
1436
PIN_PUPDR_PULLDOWN(PK11) | \
1437
PIN_PUPDR_PULLDOWN(PK12) | \
1438
PIN_PUPDR_PULLDOWN(PK13) | \
1439
PIN_PUPDR_PULLDOWN(PK14) | \
1440
PIN_PUPDR_PULLDOWN(PK15))
1441
1442
#define VAL_GPIOK_ODR (PIN_ODR_LEVEL_LOW(PK00) | \
1443
PIN_ODR_LEVEL_LOW(PK01) | \
1444
PIN_ODR_LEVEL_LOW(PK02) | \
1445
PIN_ODR_LEVEL_LOW(PK03) | \
1446
PIN_ODR_LEVEL_LOW(PK04) | \
1447
PIN_ODR_LEVEL_LOW(PK05) | \
1448
PIN_ODR_LEVEL_LOW(PK06) | \
1449
PIN_ODR_LEVEL_LOW(PK07) | \
1450
PIN_ODR_LEVEL_LOW(PK08) | \
1451
PIN_ODR_LEVEL_LOW(PK09) | \
1452
PIN_ODR_LEVEL_LOW(PK10) | \
1453
PIN_ODR_LEVEL_LOW(PK11) | \
1454
PIN_ODR_LEVEL_LOW(PK12) | \
1455
PIN_ODR_LEVEL_LOW(PK13) | \
1456
PIN_ODR_LEVEL_LOW(PK14) | \
1457
PIN_ODR_LEVEL_LOW(PK15))
1458
1459
#define VAL_GPIOK_AFRL (PIN_AFIO_AF(PK00, 0) | \
1460
PIN_AFIO_AF(PK01, 0) | \
1461
PIN_AFIO_AF(PK02, 0) | \
1462
PIN_AFIO_AF(PK03, 0) | \
1463
PIN_AFIO_AF(PK04, 0) | \
1464
PIN_AFIO_AF(PK05, 0) | \
1465
PIN_AFIO_AF(PK06, 0) | \
1466
PIN_AFIO_AF(PK07, 0))
1467
1468
#define VAL_GPIOK_AFRH (PIN_AFIO_AF(PK08, 0) | \
1469
PIN_AFIO_AF(PK09, 0) | \
1470
PIN_AFIO_AF(PK10, 0) | \
1471
PIN_AFIO_AF(PK11, 0) | \
1472
PIN_AFIO_AF(PK12, 0) | \
1473
PIN_AFIO_AF(PK13, 0) | \
1474
PIN_AFIO_AF(PK14, 0) | \
1475
PIN_AFIO_AF(PK15, 0))
1476
1477
#define AF_OTG_FS_DM 10U
1478
#define AF_LINE_OTG_FS_DM 10U
1479
#define AF_OTG_FS_DP 10U
1480
#define AF_LINE_OTG_FS_DP 10U
1481
#define AF_SWDIO 0U
1482
#define AF_LINE_SWDIO 0U
1483
#define AF_SWCLK 0U
1484
#define AF_LINE_SWCLK 0U
1485
#define AF_SPI1_SCK 5U
1486
#define AF_LINE_SPI1_SCK 5U
1487
#define AF_SPI1_MISO 5U
1488
#define AF_LINE_SPI1_MISO 5U
1489
#define AF_SPI1_MOSI 5U
1490
#define AF_LINE_SPI1_MOSI 5U
1491
#define AF_USART1_TX 7U
1492
#define AF_LINE_USART1_TX 7U
1493
#define AF_USART1_RX 7U
1494
#define AF_LINE_USART1_RX 7U
1495
#define AF_I2C1_SCL 4U
1496
#define AF_LINE_I2C1_SCL 4U
1497
#define AF_I2C1_SDA 4U
1498
#define AF_LINE_I2C1_SDA 4U
1499
#define AF_I2C2_SCL 4U
1500
#define AF_LINE_I2C2_SCL 4U
1501
#define AF_I2C2_SDA 4U
1502
#define AF_LINE_I2C2_SDA 4U
1503
#define AF_SDMMC1_D0 12U
1504
#define AF_LINE_SDMMC1_D0 12U
1505
#define AF_SDMMC1_D1 12U
1506
#define AF_LINE_SDMMC1_D1 12U
1507
#define AF_SDMMC1_D2 12U
1508
#define AF_LINE_SDMMC1_D2 12U
1509
#define AF_SDMMC1_D3 12U
1510
#define AF_LINE_SDMMC1_D3 12U
1511
#define AF_SDMMC1_CK 12U
1512
#define AF_LINE_SDMMC1_CK 12U
1513
#define AF_OSC32_IN 0U
1514
#define AF_LINE_OSC32_IN 0U
1515
#define AF_OSC32_OUT 0U
1516
#define AF_LINE_OSC32_OUT 0U
1517
#define AF_CAN1_RX 9U
1518
#define AF_LINE_CAN1_RX 9U
1519
#define AF_CAN1_TX 9U
1520
#define AF_LINE_CAN1_TX 9U
1521
#define AF_SDMMC1_CMD 12U
1522
#define AF_LINE_SDMMC1_CMD 12U
1523
#define AF_USART3_TX 7U
1524
#define AF_LINE_USART3_TX 7U
1525
#define AF_USART3_RX 7U
1526
#define AF_LINE_USART3_RX 7U
1527
#define AF_UART8_RX 8U
1528
#define AF_LINE_UART8_RX 8U
1529
#define AF_UART8_TX 8U
1530
#define AF_LINE_UART8_TX 8U
1531
#define AF_OSC_IN 0U
1532
#define AF_LINE_OSC_IN 0U
1533
#define AF_OSC_OUT 0U
1534
#define AF_LINE_OSC_OUT 0U
1535
1536
1537
#if !defined(_FROM_ASM_)
1538
#ifdef __cplusplus
1539
extern
"C"
{
1540
#endif
1541
void
boardInit
(
void
);
1542
#ifdef __cplusplus
1543
}
1544
#endif
1545
#endif
/* _FROM_ASM_ */
1546
boardInit
void boardInit(void)
Board-specific initialization code.
Definition:
board.c:261
sw
airborne
boards
chimera
chibios
v1.0
board.h
Generated on Wed Feb 10 2021 04:33:56 for Paparazzi UAS by
1.8.8
1.8.8 
