Paparazzi UAS
v5.18.0_stable
Paparazzi is a free software Unmanned Aircraft System.
lcd_dogm_hw.c
Go to the documentation of this file.
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/*
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* Copyright (C) 2009 ENAC
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*
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* This file is part of paparazzi.
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*
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* paparazzi is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* paparazzi is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with paparazzi; see the file COPYING. If not, write to
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* the Free Software Foundation, 59 Temple Place - Suite 330,
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* Boston, MA 02111-1307, USA.
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*
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*/
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#include "
LPC21xx.h
"
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#include "
armVIC.h
"
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#include "
lcd_dogm_hw.h
"
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static
void
SPI1_ISR
(
void
) __attribute__((naked));
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#define PINSEL1_SCK (2 << 2)
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#define PINSEL1_MOSI (2 << 6)
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#define PINSEL1_SSEL (2 << 8)
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/* SSPCR0 settings */
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#define SSP_DSS 0x07 << 0
/* data size : 8 bits */
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#define SSP_FRF 0x00 << 4
/* frame format : SPI */
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#define SSP_CPOL 0x01 << 6
/* clock polarity : idle high */
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#define SSP_CPHA 0x01 << 7
/* clock phase : low->high */
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#define SSP_SCR 0x1F << 8
/* serial clock rate : 29.3kHz, SSP input clock / 16 */
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/* SSPCR1 settings */
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#define SSP_LBM 0x00 << 0
/* loopback mode : disabled */
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#define SSP_SSE 0x00 << 1
/* SSP enable : disabled */
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#define SSP_MS 0x00 << 2
/* master slave mode : master */
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#define SSP_SOD 0x00 << 3
/* slave output disable : don't care when master */
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#ifndef SSPCPSR_VAL
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#define SSPCPSR_VAL 0x04
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#endif
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#warning "This driver should be updated to use the new SPI peripheral"
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#ifndef SPI1_VIC_SLOT
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#define SPI1_VIC_SLOT 7
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#endif
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void
lcd_spi_tx
(
uint8_t
data)
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{
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SpiClearRti
();
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SpiEnableRti
();
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SpiEnable
();
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SSPDR
= data;
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}
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void
lcd_dogm_init_hw
(
void
)
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{
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/* setup pins for SSP (SCK, MOSI) */
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PINSEL1
|=
PINSEL1_SCK
|
PINSEL1_MOSI
;
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/* setup SSP */
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SSPCR0
=
SSP_DSS
|
SSP_FRF
|
SSP_CPOL
|
SSP_CPHA
|
SSP_SCR
;
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SSPCR1
=
SSP_LBM
|
SSP_MS
|
SSP_SOD
;
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SSPCPSR
=
SSPCPSR_VAL
;
/* Prescaler */
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/* SS, RS pin is output */
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SetBit(
LCDDOGM_SS_IODIR
,
LCDDOGM_SS_PIN
);
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SetBit(
LCDDOGM_RS_IODIR
,
LCDDOGM_RS_PIN
);
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/* unselected lcd */
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lcddogmUnselect
();
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/* Configure interrupt vector for SPI */
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VICIntSelect
&= ~
VIC_BIT
(
VIC_SPI1
);
/* SPI1 selected as IRQ */
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VICIntEnable
=
VIC_BIT
(
VIC_SPI1
);
/* SPI1 interrupt enabled */
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_VIC_CNTL
(
SPI1_VIC_SLOT
) =
VIC_ENABLE
|
VIC_SPI1
;
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_VIC_CNTL
(
SPI1_VIC_SLOT
) = (
uint32_t
)
SPI1_ISR
;
/* address of the ISR */
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}
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void
SPI1_ISR
(
void
)
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{
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ISR_ENTRY
();
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while
(bit_is_set(
SSPSR
,
RNE
)) {
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uint16_t
foo
__attribute__((unused));
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foo
=
SSPDR
;
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}
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SpiClearRti
();
/* clear interrupt */
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SpiDisableRti
();
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SpiDisable
();
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lcddogmUnselect
();
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VICVectAddr
= 0x00000000;
/* clear this interrupt from the VIC */
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ISR_EXIT
();
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}
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SSPCR1
#define SSPCR1
Definition:
LPC21xx.h:223
uint16_t
unsigned short uint16_t
Definition:
types.h:16
SPI1_ISR
static void SPI1_ISR(void)
Definition:
lcd_dogm_hw.c:88
armVIC.h
LPC21xx.h
VICIntSelect
#define VICIntSelect
Definition:
LPC21xx.h:430
VIC_SPI1
#define VIC_SPI1
Definition:
lpcVIC.h:81
SSPCR0
#define SSPCR0
Definition:
LPC21xx.h:222
SSPCPSR
#define SSPCPSR
Definition:
LPC21xx.h:226
uint32_t
unsigned long uint32_t
Definition:
types.h:18
PINSEL1_MOSI
#define PINSEL1_MOSI
Definition:
lcd_dogm_hw.c:31
SSP_SCR
#define SSP_SCR
Definition:
lcd_dogm_hw.c:39
SSP_FRF
#define SSP_FRF
Definition:
lcd_dogm_hw.c:36
SSP_MS
#define SSP_MS
Definition:
lcd_dogm_hw.c:44
foo
uint16_t foo
Definition:
main_demo5.c:59
SSP_CPOL
#define SSP_CPOL
Definition:
lcd_dogm_hw.c:37
SSP_SOD
#define SSP_SOD
Definition:
lcd_dogm_hw.c:45
SpiClearRti
static void SpiClearRti(struct spi_periph *p)
Definition:
spi_arch.c:161
VIC_BIT
#define VIC_BIT(chan)
Definition:
lpcVIC.h:105
SpiEnableRti
static void SpiEnableRti(struct spi_periph *p)
Definition:
spi_arch.c:151
SSP_LBM
#define SSP_LBM
Definition:
lcd_dogm_hw.c:42
lcd_dogm_hw.h
SpiDisable
#define SpiDisable()
Definition:
spi_slave_hs_arch.h:48
SpiEnable
#define SpiEnable()
Definition:
spi_slave_hs_arch.h:44
lcd_spi_tx
void lcd_spi_tx(uint8_t data)
Definition:
lcd_dogm_hw.c:57
SSPCPSR_VAL
#define SSPCPSR_VAL
Definition:
lcd_dogm_hw.c:48
SSPSR
#define SSPSR
Definition:
LPC21xx.h:225
uint8_t
unsigned char uint8_t
Definition:
types.h:14
VICVectAddr
#define VICVectAddr
Definition:
LPC21xx.h:436
LCDDOGM_SS_PIN
#define LCDDOGM_SS_PIN
Definition:
lcd_dogm_hw.h:11
SpiDisableRti
static void SpiDisableRti(struct spi_periph *p)
Definition:
spi_arch.c:156
lcd_dogm_init_hw
void lcd_dogm_init_hw(void)
Definition:
lcd_dogm_hw.c:65
ISR_ENTRY
#define ISR_ENTRY()
Definition:
armVIC.h:40
ISR_EXIT
#define ISR_EXIT()
Definition:
armVIC.h:61
SSP_DSS
#define SSP_DSS
Definition:
lcd_dogm_hw.c:35
LCDDOGM_RS_IODIR
#define LCDDOGM_RS_IODIR
Definition:
lcd_dogm_hw.h:24
SPI1_VIC_SLOT
#define SPI1_VIC_SLOT
Definition:
lcd_dogm_hw.c:54
SSPDR
#define SSPDR
Definition:
LPC21xx.h:224
VIC_ENABLE
#define VIC_ENABLE
Definition:
lpcVIC.h:102
VICIntEnable
#define VICIntEnable
Definition:
LPC21xx.h:431
RNE
#define RNE
Definition:
LPC21xx.h:279
PINSEL1
#define PINSEL1
Definition:
LPC21xx.h:348
lcddogmUnselect
#define lcddogmUnselect()
Definition:
lcd_dogm_hw.h:31
LCDDOGM_SS_IODIR
#define LCDDOGM_SS_IODIR
Definition:
lcd_dogm_hw.h:20
PINSEL1_SCK
#define PINSEL1_SCK
Definition:
lcd_dogm_hw.c:30
SSP_CPHA
#define SSP_CPHA
Definition:
lcd_dogm_hw.c:38
_VIC_CNTL
#define _VIC_CNTL(idx)
Definition:
armVIC.h:19
LCDDOGM_RS_PIN
#define LCDDOGM_RS_PIN
Definition:
lcd_dogm_hw.h:14
sw
airborne
arch
lpc21
modules
display
lcd_dogm_hw.c
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