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Paparazzi UAS
v5.12_stable-4-g9b43e9b
Paparazzi is a free software Unmanned Aircraft System.
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Include dependency graph for max11040_hw.h:
This graph shows which files directly or indirectly include this file:Go to the source code of this file.
Macros | |
| #define | MAXM_DIVISOR_128 2 |
| #define | MAXM_DIVISOR_256 3 |
| #define | MAXM_DIVISOR_512 4 |
| #define | MAXM_DIVISOR_1024 5 |
| #define | MAXM_DIVISOR MAXM_DIVISOR_512 |
| #define | SSP_CLOCK 468750 |
| #define | SSP_DDS 0x07 << 0 /* data size : 8 bits */ |
| #define | SSP_FRF 0x00 << 4 /* frame format : SPI */ |
| #define | SSP_CPOL 0x00 << 6 /* clock polarity : data captured on first clock transition */ |
| #define | SSP_CPHA 0x01 << 7 /* clock phase : SCK idles low */ |
| #define | SSP_SCR 0x00 << 8 /* serial clock rate : divide by 16 */ |
| #define | SSP_LBM 0x00 << 0 /* loopback mode : disabled */ |
| #define | SSP_SSE 0x00 << 1 /* SSP enable : disabled */ |
| #define | SSP_MS 0x00 << 2 /* master slave mode : master */ |
| #define | SSP_SOD 0x00 << 3 /* slave output disable : don't care when master */ |
| #define | SSPCR0_VAL (SSP_DDS | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR ) |
| #define | SSPCR1_VAL (SSP_LBM | SSP_SSE | SSP_MS | SSP_SOD ) |
| #define | SSP_PINSEL1_SCK (2<<2) |
| #define | SSP_PINSEL1_MISO (2<<4) |
| #define | SSP_PINSEL1_MOSI (2<<6) |
| #define | SSP_PINSEL1_SSEL (2<<8) |
| #define | SSP_Enable() SetBit(SSPCR1, SSE); |
| #define | SSP_Disable() ClearBit(SSPCR1, SSE); |
| #define | SSP_EnableRxi() SetBit(SSPIMSC, RXIM) |
| #define | SSP_DisableRxi() ClearBit(SSPIMSC, RXIM) |
| #define | SSP_ClearRxi() SetBit(SSPICR, RXIM); |
| #define | SSP_EnableTxi() SetBit(SSPIMSC, TXIM) |
| #define | SSP_DisableTxi() ClearBit(SSPIMSC, TXIM) |
| #define | SSP_ClearTxi() SetBit(SSPICR, TXIM); |
| #define | SSP_EnableRti() SetBit(SSPIMSC, RTIM); |
| #define | SSP_DisableRti() ClearBit(SSPIMSC, RTIM); |
| #define | SSP_ClearRti() SetBit(SSPICR, RTIC); |
| #define | MaxmSelect() SetBit(MAXM_SS_IOCLR, MAXM_SS_PIN) |
| #define | MaxmUnselect() SetBit(MAXM_SS_IOSET, MAXM_SS_PIN) |
Functions | |
| void | max11040_hw_init (void) |
| #define MAXM_DIVISOR MAXM_DIVISOR_512 |
Definition at line 17 of file max11040_hw.h.
| #define MAXM_DIVISOR_1024 5 |
Definition at line 15 of file max11040_hw.h.
| #define MAXM_DIVISOR_128 2 |
Definition at line 12 of file max11040_hw.h.
| #define MAXM_DIVISOR_256 3 |
Definition at line 13 of file max11040_hw.h.
| #define MAXM_DIVISOR_512 4 |
Definition at line 14 of file max11040_hw.h.
| #define MaxmSelect | ( | ) | SetBit(MAXM_SS_IOCLR, MAXM_SS_PIN) |
Definition at line 55 of file max11040_hw.h.
Referenced by EXTINT_ISR().
| #define MaxmUnselect | ( | ) | SetBit(MAXM_SS_IOSET, MAXM_SS_PIN) |
Definition at line 56 of file max11040_hw.h.
Referenced by SSP_ISR().
Definition at line 53 of file max11040_hw.h.
Referenced by max11040_hw_init(), and SSP_ISR().
Definition at line 47 of file max11040_hw.h.
Referenced by SSP_ISR().
Definition at line 50 of file max11040_hw.h.
| #define SSP_CLOCK 468750 |
Definition at line 20 of file max11040_hw.h.
| #define SSP_CPHA 0x01 << 7 /* clock phase : SCK idles low */ |
Definition at line 26 of file max11040_hw.h.
| #define SSP_CPOL 0x00 << 6 /* clock polarity : data captured on first clock transition */ |
Definition at line 25 of file max11040_hw.h.
| #define SSP_DDS 0x07 << 0 /* data size : 8 bits */ |
Definition at line 23 of file max11040_hw.h.
Definition at line 44 of file max11040_hw.h.
Definition at line 52 of file max11040_hw.h.
Definition at line 46 of file max11040_hw.h.
Definition at line 49 of file max11040_hw.h.
Definition at line 43 of file max11040_hw.h.
Referenced by max11040_hw_init().
Definition at line 51 of file max11040_hw.h.
Referenced by max11040_hw_init().
Definition at line 45 of file max11040_hw.h.
Definition at line 48 of file max11040_hw.h.
| #define SSP_FRF 0x00 << 4 /* frame format : SPI */ |
Definition at line 24 of file max11040_hw.h.
| #define SSP_LBM 0x00 << 0 /* loopback mode : disabled */ |
Definition at line 30 of file max11040_hw.h.
| #define SSP_MS 0x00 << 2 /* master slave mode : master */ |
Definition at line 32 of file max11040_hw.h.
| #define SSP_PINSEL1_MISO (2<<4) |
Definition at line 39 of file max11040_hw.h.
| #define SSP_PINSEL1_MOSI (2<<6) |
Definition at line 40 of file max11040_hw.h.
| #define SSP_PINSEL1_SCK (2<<2) |
Definition at line 38 of file max11040_hw.h.
| #define SSP_PINSEL1_SSEL (2<<8) |
Definition at line 41 of file max11040_hw.h.
| #define SSP_SCR 0x00 << 8 /* serial clock rate : divide by 16 */ |
Definition at line 27 of file max11040_hw.h.
| #define SSP_SOD 0x00 << 3 /* slave output disable : don't care when master */ |
Definition at line 33 of file max11040_hw.h.
| #define SSP_SSE 0x00 << 1 /* SSP enable : disabled */ |
Definition at line 31 of file max11040_hw.h.
Definition at line 35 of file max11040_hw.h.
Definition at line 36 of file max11040_hw.h.
| void max11040_hw_init | ( | void | ) |
Definition at line 271 of file max11040_hw.c.
References _VIC_ADDR, _VIC_CNTL, EXTINT, EXTINT_ISR(), EXTMODE, EXTPOLAR, MAXM_NB_ADCS, PINSEL1, SPI1_VIC_SLOT, SSP_ClearRti, SSP_Enable, SSP_EnableRti, SSP_ISR(), SSP_PINSEL1_MISO, SSP_PINSEL1_MOSI, SSP_PINSEL1_SCK, SSP_PINSEL1_SSEL, SSP_Send, SSPCPSR, SSPCR0, SSPCR0_VAL, SSPCR1, SSPCR1_VAL, VIC_BIT, VIC_ENABLE, VIC_SPI1, VICIntEnable, and VICIntSelect.
Referenced by max11040_init().
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