Paparazzi UAS
v7.0_unstable
Paparazzi is a free software Unmanned Aircraft System.
tawaki_v2.0.h
Go to the documentation of this file.
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#ifndef CONFIG_TAWAKI_2_00_H
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#define CONFIG_TAWAKI_2_00_H
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#define BOARD_TAWAKI_V2
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#include "
board.h
"
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/*
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* AHB_CLK
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*/
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#define AHB_CLK STM32_HCLK
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/*
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* Concat macro
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*/
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#define _CONCAT_BOARD_PARAM(_s1, _s2) _s1 ## _s2
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#define CONCAT_BOARD_PARAM(_s1, _s2) _CONCAT_BOARD_PARAM(_s1, _s2)
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/*
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* LEDs
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*/
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/* red, on PD15, 1 on LED_ON, 0 on LED_OFF */
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#ifndef USE_LED_1
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#define USE_LED_1 1
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#endif
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#define LED_1_GPIO PAL_PORT(LINE_LED1)
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#define LED_1_GPIO_PIN PAL_PAD(LINE_LED1)
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#define LED_1_GPIO_ON gpio_set
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#define LED_1_GPIO_OFF gpio_clear
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/* orange, on PA10, 1 on LED_ON, 0 on LED_OFF */
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#ifndef USE_LED_2
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#define USE_LED_2 1
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#endif
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#define LED_2_GPIO PAL_PORT(LINE_LED2)
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#define LED_2_GPIO_PIN PAL_PAD(LINE_LED2)
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#define LED_2_GPIO_ON gpio_set
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#define LED_2_GPIO_OFF gpio_clear
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/* green, on PC7, 1 on LED_ON, 0 on LED_OFF */
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#ifndef USE_LED_3
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#define USE_LED_3 1
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#endif
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#define LED_3_GPIO PAL_PORT(LINE_LED3)
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#define LED_3_GPIO_PIN PAL_PAD(LINE_LED3)
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#define LED_3_GPIO_ON gpio_set
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#define LED_3_GPIO_OFF gpio_clear
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/* yellow, on PD10, 1 on LED_ON, 0 on LED_OFF */
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#ifndef USE_LED_4
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#define USE_LED_4 1
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#endif
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#define LED_4_GPIO PAL_PORT(LINE_LED4)
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#define LED_4_GPIO_PIN PAL_PAD(LINE_LED4)
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#define LED_4_GPIO_ON gpio_set
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#define LED_4_GPIO_OFF gpio_clear
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/*
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* ADCs
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*/
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// AUXa1
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#if USE_ADC_1
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#define AD1_1_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_A1_ADC_INP)
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#define ADC_1 AD1_1
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#define ADC_1_GPIO_PORT PAL_PORT(LINE_AUX_A1)
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#define ADC_1_GPIO_PIN PAL_PAD(LINE_AUX_A1)
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#endif
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// AUXa2
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#if USE_ADC_2
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#define AD1_2_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_A2_ADC_INP)
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#define ADC_2 AD1_2
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#define ADC_2_GPIO_PORT PAL_PORT(LINE_AUX_A2)
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#define ADC_2_GPIO_PIN PAL_PAD(LINE_AUX_A2)
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#endif
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// AUXa3
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#if USE_ADC_3
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#define AD1_3_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_A3_ADC_INP)
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#define ADC_3 AD1_3
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#define ADC_3_GPIO_PORT PAL_PORT(LINE_AUX_A3)
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#define ADC_3_GPIO_PIN PAL_PAD(LINE_AUX_A3)
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#endif
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// AUXa4
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#if USE_ADC_4
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#define AD1_4_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_A4_ADC_INP)
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#define ADC_4 AD1_4
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#define ADC_4_GPIO_PORT PAL_PORT(LINE_AUX_A4)
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#define ADC_4_GPIO_PIN PAL_PAD(LINE_AUX_A4)
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#endif
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// AUXb1
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#if USE_ADC_5
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#define AD1_5_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_B1_ADC_IN)
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#define ADC_5 AD1_5
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#define ADC_5_GPIO_PORT PAL_PORT(LINE_AUX_B1)
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#define ADC_5_GPIO_PIN PAL_PAD(LINE_AUX_B1)
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#endif
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// AUXb2
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#if USE_ADC_6
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#define AD1_6_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_B2_ADC_IN)
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#define ADC_6 AD1_6
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#define ADC_6_GPIO_PORT PAL_PORT(LINE_AUX_B2)
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#define ADC_6_GPIO_PIN PAL_PAD(LINE_AUX_B2)
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#endif
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// AUXb3
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#if USE_ADC_7
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#define AD1_7_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_B3_ADC_IN)
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#define ADC_7 AD1_7
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#define ADC_7_GPIO_PORT PAL_PORT(LINE_AUX_B3)
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#define ADC_7_GPIO_PIN PAL_PAD(LINE_AUX_B3)
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#endif
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// AUXb4
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#if USE_ADC_8
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#define AD1_8_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_B4_ADC_IN)
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#define ADC_8 AD1_8
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#define ADC_8_GPIO_PORT PAL_PORT(LINE_AUX_B4)
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#define ADC_8_GPIO_PIN PAL_PAD(LINE_AUX_B4)
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#endif
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// Internal ADC for battery enabled by default
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#ifndef USE_ADC_9
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#define USE_ADC_9 1
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#endif
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#if USE_ADC_9
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#define AD1_9_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, VBAT_MEAS_ADC_INP)
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#define ADC_9 AD1_9
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#define ADC_9_GPIO_PORT PAL_PORT(LINE_VBAT_MEAS)
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#define ADC_9_GPIO_PIN PAL_PAD(LINE_VBAT_MEAS)
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#endif
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/* allow to define ADC_CHANNEL_VSUPPLY in the airframe file*/
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#ifndef ADC_CHANNEL_VSUPPLY
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#define ADC_CHANNEL_VSUPPLY ADC_9
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#endif
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/*
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* R1 = 2.2k
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* R2 = 12k
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* adc * (3.3 / 2^16) * ((R1 + R2) / R1)
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*/
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#define VBAT_R1 2200.0f
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#define VBAT_R2 18000.0f
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#define DefaultVoltageOfAdc(adc) ((3.3f/65536.0f)*((VBAT_R1+VBAT_R2)/VBAT_R1)*adc)
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/*
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* PWM defines
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*/
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// SRVa connectors, activated in PWM mode by default
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#ifndef USE_PWM1
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#define USE_PWM1 1
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#endif
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#if USE_PWM1
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#define PWM_SERVO_1 1
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#define PWM_SERVO_1_GPIO PAL_PORT(LINE_SRVA1)
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#define PWM_SERVO_1_PIN PAL_PAD(LINE_SRVA1)
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#define PWM_SERVO_1_AF AF_SRVA1
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#define PWM_SERVO_1_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVA1_TIM)
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#define PWM_SERVO_1_CHANNEL (SRVA1_TIM_CH-1)
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#define PWM_SERVO_1_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVA1_TIM)
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#endif
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#ifndef USE_PWM2
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#define USE_PWM2 1
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#endif
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#if USE_PWM2
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#define PWM_SERVO_2 2
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#define PWM_SERVO_2_GPIO PAL_PORT(LINE_SRVA2)
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#define PWM_SERVO_2_PIN PAL_PAD(LINE_SRVA2)
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#define PWM_SERVO_2_AF AF_SRVA2
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#define PWM_SERVO_2_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVA2_TIM)
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#define PWM_SERVO_2_CHANNEL (SRVA2_TIM_CH-1)
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#define PWM_SERVO_2_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVA2_TIM)
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#endif
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#ifndef USE_PWM3
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#define USE_PWM3 1
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#endif
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#if USE_PWM3
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#define PWM_SERVO_3 3
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#define PWM_SERVO_3_GPIO PAL_PORT(LINE_SRVA3)
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#define PWM_SERVO_3_PIN PAL_PAD(LINE_SRVA3)
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#define PWM_SERVO_3_AF AF_SRVA3
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#define PWM_SERVO_3_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVA3_TIM)
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#define PWM_SERVO_3_CHANNEL (SRVA3_TIM_CH-1)
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#define PWM_SERVO_3_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVA3_TIM)
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#endif
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#ifndef USE_PWM4
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#define USE_PWM4 1
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#endif
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#if USE_PWM4
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#define PWM_SERVO_4 4
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#define PWM_SERVO_4_GPIO PAL_PORT(LINE_SRVA4)
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#define PWM_SERVO_4_PIN PAL_PAD(LINE_SRVA4)
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#define PWM_SERVO_4_AF AF_SRVA4
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#define PWM_SERVO_4_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVA4_TIM)
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#define PWM_SERVO_4_CHANNEL (SRVA4_TIM_CH-1)
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#define PWM_SERVO_4_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVA4_TIM)
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#endif
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// SRVb connector, PWM mode disabled by default (DShot is enabled by default)
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#ifndef USE_PWM5
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#define USE_PWM5 0
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#endif
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#if USE_PWM5
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#define PWM_SERVO_5 5
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#define PWM_SERVO_5_GPIO PAL_PORT(LINE_SRVB1)
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#define PWM_SERVO_5_PIN PAL_PAD(LINE_SRVB1)
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#define PWM_SERVO_5_AF AF_SRVB1
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#define PWM_SERVO_5_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVB1_TIM)
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#define PWM_SERVO_5_CHANNEL (SRVB1_TIM_CH-1)
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#define PWM_SERVO_5_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVB1_TIM)
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#endif
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#ifndef USE_PWM6
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#define USE_PWM6 0
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#endif
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#if USE_PWM6
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#define PWM_SERVO_6 6
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#define PWM_SERVO_6_GPIO PAL_PORT(LINE_SRVB2)
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#define PWM_SERVO_6_PIN PAL_PAD(LINE_SRVB2)
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#define PWM_SERVO_6_AF AF_SRVB2
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#define PWM_SERVO_6_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVB2_TIM)
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#define PWM_SERVO_6_CHANNEL (SRVB2_TIM_CH-1)
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#define PWM_SERVO_6_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVB2_TIM)
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#endif
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#ifndef USE_PWM7
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#define USE_PWM7 0
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#endif
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#if USE_PWM7
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#define PWM_SERVO_7 7
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#define PWM_SERVO_7_GPIO PAL_PORT(LINE_SRVB3)
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#define PWM_SERVO_7_PIN PAL_PAD(LINE_SRVB3)
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#define PWM_SERVO_7_AF AF_SRVB3
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#define PWM_SERVO_7_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVB3_TIM)
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#define PWM_SERVO_7_CHANNEL (SRVB3_TIM_CH-1)
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#define PWM_SERVO_7_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVB3_TIM)
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#endif
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#ifndef USE_PWM8
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#define USE_PWM8 0
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#endif
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#if USE_PWM8
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#define PWM_SERVO_8 8
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#define PWM_SERVO_8_GPIO PAL_PORT(LINE_SRVB4)
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#define PWM_SERVO_8_PIN PAL_PAD(LINE_SRVB4)
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#define PWM_SERVO_8_AF AF_SRVB4
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#define PWM_SERVO_8_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVB4_TIM)
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#define PWM_SERVO_8_CHANNEL (SRVB4_TIM_CH-1)
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#define PWM_SERVO_8_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVB4_TIM)
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#endif
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#ifndef USE_PWM9
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#define USE_PWM9 0
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#endif
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#if USE_PWM9
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#define PWM_SERVO_9 9
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#define PWM_SERVO_9_GPIO PAL_PORT(LINE_AUX_A1)
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#define PWM_SERVO_9_PIN PAL_PAD(LINE_AUX_A1)
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#define PWM_SERVO_9_AF GPIO_AF2
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#define PWM_SERVO_9_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_A1_TIM)
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#define PWM_SERVO_9_CHANNEL (AUX_A1_TIM_CH-1)
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#define PWM_SERVO_9_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_A1_TIM)
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#endif
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#ifndef USE_PWM10
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#define USE_PWM10 0
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#endif
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#if USE_PWM10
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#define PWM_SERVO_10 10
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#define PWM_SERVO_10_GPIO PAL_PORT(LINE_AUX_A2)
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#define PWM_SERVO_10_PIN PAL_PAD(LINE_AUX_A2)
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#define PWM_SERVO_10_AF GPIO_AF2
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#define PWM_SERVO_10_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_A2_TIM)
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#define PWM_SERVO_10_CHANNEL (AUX_A2_TIM_CH-1)
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#define PWM_SERVO_10_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_A2_TIM)
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#endif
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#ifndef USE_PWM11
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#define USE_PWM11 0
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#endif
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#if USE_PWM11
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#define PWM_SERVO_11 11
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#define PWM_SERVO_11_GPIO PAL_PORT(LINE_AUX_A3)
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#define PWM_SERVO_11_PIN PAL_PAD(LINE_AUX_A3)
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#define PWM_SERVO_11_AF GPIO_AF2
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#define PWM_SERVO_11_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_A3_TIM)
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#define PWM_SERVO_11_CHANNEL (AUX_A3_TIM_CH-1)
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#define PWM_SERVO_11_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_A3_TIM)
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#endif
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#ifndef USE_PWM12
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#define USE_PWM12 0
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#endif
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#if USE_PWM12
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#define PWM_SERVO_12 12
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#define PWM_SERVO_12_GPIO PAL_PORT(LINE_AUX_A4)
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#define PWM_SERVO_12_PIN PAL_PAD(LINE_AUX_A4)
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#define PWM_SERVO_12_AF GPIO_AF2
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#define PWM_SERVO_12_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_A4_TIM)
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#define PWM_SERVO_12_CHANNEL (AUX_A4_TIM_CH-1)
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#define PWM_SERVO_12_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_A4_TIM)
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#endif
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#ifndef USE_PWM13
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#define USE_PWM13 0
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#endif
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#if USE_PWM13
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#define PWM_SERVO_13 13
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#define PWM_SERVO_13_GPIO PAL_PORT(LINE_AUX_B1)
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#define PWM_SERVO_13_PIN PAL_PAD(LINE_AUX_B1)
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#define PWM_SERVO_13_AF GPIO_AF2
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#define PWM_SERVO_13_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_B1_TIM)
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#define PWM_SERVO_13_CHANNEL (AUX_B1_TIM_CH-1)
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#define PWM_SERVO_13_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_B1_TIM)
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#endif
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#ifndef USE_PWM14
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#define USE_PWM14 0
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#endif
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#if USE_PWM14
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#define PWM_SERVO_14 14
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#define PWM_SERVO_14_GPIO PAL_PORT(LINE_AUX_B2)
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#define PWM_SERVO_14_PIN PAL_PAD(LINE_AUX_B2)
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#define PWM_SERVO_14_AF GPIO_AF2
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#define PWM_SERVO_14_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_B2_TIM)
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#define PWM_SERVO_14_CHANNEL (AUX_B2_TIM_CH-1)
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#define PWM_SERVO_14_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_B2_TIM)
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#endif
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#ifndef USE_PWM15
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#define USE_PWM15 0
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#endif
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#if USE_PWM15
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#define PWM_SERVO_15 15
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#define PWM_SERVO_15_GPIO PAL_PORT(LINE_AUX_B3)
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#define PWM_SERVO_15_PIN PAL_PAD(LINE_AUX_B3)
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#define PWM_SERVO_15_AF GPIO_AF2
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#define PWM_SERVO_15_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_B3_TIM)
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#define PWM_SERVO_15_CHANNEL (AUX_B3_TIM_CH-1)
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#define PWM_SERVO_15_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_B3_TIM)
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#endif
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#ifndef USE_PWM16
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#define USE_PWM16 0
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#endif
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#if USE_PWM16
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#define PWM_SERVO_16 16
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#define PWM_SERVO_16_GPIO PAL_PORT(LINE_AUX_B4)
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#define PWM_SERVO_16_PIN PAL_PAD(LINE_AUX_B4)
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#define PWM_SERVO_16_AF GPIO_AF2
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#define PWM_SERVO_16_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_B4_TIM)
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#define PWM_SERVO_16_CHANNEL (AUX_B4_TIM_CH-1)
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#define PWM_SERVO_16_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_B4_TIM)
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#endif
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// servo index starting at 1 + regular servos + aux servos
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// so NB = 1+8+8
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#define ACTUATORS_PWM_NB 17
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#ifdef DSHOT_TIM3_TELEMETRY_NUM
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#define DSHOT_TIM3_TELEMETRY_DEV CONCAT_BOARD_PARAM(&SD, DSHOT_TIM3_TELEMETRY_NUM)
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#else
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#define DSHOT_TIM3_TELEMETRY_DEV NULL
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#endif
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#ifdef DSHOT_TIM1_TELEMETRY_NUM
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#define DSHOT_TIM1_TELEMETRY_DEV CONCAT_BOARD_PARAM(&SD, DSHOT_TIM1_TELEMETRY_NUM)
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#else
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#define DSHOT_TIM1_TELEMETRY_DEV NULL
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#endif
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// macros for possible dshot telemetry
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#define DSHOT_TLM_RX 1
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#define DSHOT_TLM_AUX_RX 4
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#ifndef USE_DSHOT_TIM3
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#define USE_DSHOT_TIM3 1
// use SRVb for DShot by default
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#endif
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#if USE_DSHOT_TIM3
// Servo B1, B2, B3, B4 on TIM4
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// Servo B1, B2, B3, B4 on TM4 are primary DSHOT connector
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#define DSHOT_SERVO_1 1
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#define DSHOT_SERVO_1_GPIO PAL_PORT(LINE_SRVB1)
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#define DSHOT_SERVO_1_PIN PAL_PAD(LINE_SRVB1)
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#define DSHOT_SERVO_1_AF AF_SRVB1
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#define DSHOT_SERVO_1_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVB1_TIM)
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#define DSHOT_SERVO_1_CHANNEL SRVB1_TIM_CH
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#define DSHOT_SERVO_2 2
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#define DSHOT_SERVO_2_GPIO PAL_PORT(LINE_SRVB2)
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#define DSHOT_SERVO_2_PIN PAL_PAD(LINE_SRVB2)
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#define DSHOT_SERVO_2_AF AF_SRVB2
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#define DSHOT_SERVO_2_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVB2_TIM)
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#define DSHOT_SERVO_2_CHANNEL SRVB2_TIM_CH
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#define DSHOT_SERVO_3 3
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#define DSHOT_SERVO_3_GPIO PAL_PORT(LINE_SRVB3)
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#define DSHOT_SERVO_3_PIN PAL_PAD(LINE_SRVB3)
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#define DSHOT_SERVO_3_AF AF_SRVB3
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#define DSHOT_SERVO_3_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVB3_TIM)
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#define DSHOT_SERVO_3_CHANNEL SRVB3_TIM_CH
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#define DSHOT_SERVO_4 4
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#define DSHOT_SERVO_4_GPIO PAL_PORT(LINE_SRVB4)
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#define DSHOT_SERVO_4_PIN PAL_PAD(LINE_SRVB4)
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#define DSHOT_SERVO_4_AF AF_SRVB4
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#define DSHOT_SERVO_4_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVB4_TIM)
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#define DSHOT_SERVO_4_CHANNEL SRVB4_TIM_CH
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#define DSHOT_CONF_TIM3 1
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#if DSHOT_BIDIR
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#define DSHOT_CAPT_CONF3_DEF \
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.dma_capt_cfg = { \
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.gptd = &DSHOT1_BIDIR_GPT, \
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.dma_streams = {DSHOTS_CAPTURE_STREAMS(3)}, \
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.dma_capture = &dshot3DmaCaptureBuffer, \
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.dcache_memory_in_use = false, \
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},
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#else
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#define DSHOT_CAPT_CONF3_DEF
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#endif
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#define DSHOT_CONF3_DEF { \
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.dma_stream = STM32_DMA_STREAM_ID_ANY, \
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.dmamux = STM32_DMAMUX1_TIM3_UP, \
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.pwmp = &PWMD3, \
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.tlm_sd = DSHOT_TIM3_TELEMETRY_DEV, \
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.dma_buf = &dshot3DmaBuffer, \
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DSHOT_CAPT_CONF3_DEF \
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.dcache_memory_in_use = false \
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}
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#endif
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#if USE_DSHOT_TIM1
// Servo A1, A2, A3, A4 on TIM1 only activated if needed
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#define DSHOT_SERVO_5 5
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#define DSHOT_SERVO_5_GPIO PAL_PORT(LINE_SRVA1)
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#define DSHOT_SERVO_5_PIN PAL_PAD(LINE_SRVA1)
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#define DSHOT_SERVO_5_AF AF_SRVA1
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#define DSHOT_SERVO_5_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVA1_TIM)
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#define DSHOT_SERVO_5_CHANNEL SRVA1_TIM_CH
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#define DSHOT_SERVO_6 6
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#define DSHOT_SERVO_6_GPIO PAL_PORT(LINE_SRVA2)
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#define DSHOT_SERVO_6_PIN PAL_PAD(LINE_SRVA2)
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#define DSHOT_SERVO_6_AF AF_SRVA2
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#define DSHOT_SERVO_6_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVA2_TIM)
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#define DSHOT_SERVO_6_CHANNEL SRVA2_TIM_CH
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#define DSHOT_SERVO_7 7
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#define DSHOT_SERVO_7_GPIO PAL_PORT(LINE_SRVA3)
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#define DSHOT_SERVO_7_PIN PAL_PAD(LINE_SRVA3)
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#define DSHOT_SERVO_7_AF AF_SRVA3
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#define DSHOT_SERVO_7_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVA3_TIM)
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#define DSHOT_SERVO_7_CHANNEL SRVA3_TIM_CH
485
486
#define DSHOT_SERVO_8 8
487
#define DSHOT_SERVO_8_GPIO PAL_PORT(LINE_SRVA4)
488
#define DSHOT_SERVO_8_PIN PAL_PAD(LINE_SRVA4)
489
#define DSHOT_SERVO_8_AF AF_SRVA4
490
#define DSHOT_SERVO_8_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVA4_TIM)
491
#define DSHOT_SERVO_8_CHANNEL SRVA4_TIM_CH
492
493
#define DSHOT_CONF_TIM1 1
494
495
#if DSHOT_BIDIR
496
#ifndef DSHOT2_BIDIR_GPT
497
#error "Select and activate DSHOT2_BIDIR_GPT for DSHOT_CONF1. Example: USE_GPT8=TRUE, DSHOT2_BIDIR_GPT=GPTD8"
498
#endif
499
#define DSHOT_CAPT_CONF1_DEF \
500
.dma_capt_cfg = { \
501
.gptd = &DSHOT2_BIDIR_GPT, \
502
.dma_streams = {DSHOTS_CAPTURE_STREAMS(1)}, \
503
.dma_capture = &dshot1DmaCaptureBuffer, \
504
.dcache_memory_in_use = false, \
505
},
506
#else
507
#define DSHOT_CAPT_CONF1_DEF
508
#endif
509
510
#define DSHOT_CONF1_DEF { \
511
.dma_stream = STM32_DMA_STREAM_ID_ANY, \
512
.dmamux = STM32_DMAMUX1_TIM1_UP, \
513
.pwmp = &PWMD1, \
514
.tlm_sd = DSHOT_TIM1_TELEMETRY_DEV, \
515
.dma_buf = &dshot1DmaBuffer, \
516
DSHOT_CAPT_CONF1_DEF \
517
.dcache_memory_in_use = false \
518
}
519
520
#endif
521
525
#define UART2_GPIO_PORT_TX PAL_PORT(LINE_UART2_TX)
526
#define UART2_GPIO_TX PAL_PAD(LINE_UART2_TX)
527
#define UART2_GPIO_PORT_RX PAL_PORT(LINE_UART2_RX)
528
#define UART2_GPIO_RX PAL_PAD(LINE_UART2_RX)
529
#define UART2_GPIO_AF AF_UART2_TX
530
#ifndef UART2_HW_FLOW_CONTROL
531
#define UART2_HW_FLOW_CONTROL FALSE
532
#endif
533
539
#define UART3_GPIO_PORT_TX PAL_PORT(LINE_UART3_TX)
540
#define UART3_GPIO_TX PAL_PAD(LINE_UART3_TX)
541
#define UART3_GPIO_PORT_RX PAL_PORT(LINE_UART3_RX)
542
#define UART3_GPIO_RX PAL_PAD(LINE_UART3_RX)
543
#define UART3_GPIO_AF AF_UART3_TX
544
545
#define UART7_GPIO_PORT_TX PAL_PORT(LINE_UART7_TX)
546
#define UART7_GPIO_TX PAL_PAD(LINE_UART7_TX)
547
#define UART7_GPIO_PORT_RX PAL_PORT(LINE_UART7_RX)
548
#define UART7_GPIO_RX PAL_PAD(LINE_UART7_RX)
549
#define UART7_GPIO_AF AF_UART7_TX
550
555
#define UART4_GPIO_PORT_TX PAL_PORT(LINE_AUX_A1)
556
#define UART4_GPIO_TX PAL_PAD(LINE_AUX_A1)
557
#define UART4_GPIO_PORT_RX PAL_PORT(LINE_AUX_A2)
558
#define UART4_GPIO_RX PAL_PAD(LINE_AUX_A2)
559
#define UART4_GPIO_AF AUX_A1_UART_AF
560
565
#define UART1_GPIO_PORT_RX PAL_PORT(LINE_DSHOT_RX)
566
#define UART1_GPIO_RX PAL_PAD(LINE_DSHOT_RX)
567
#define UART1_GPIO_AF AF_DSHOT_RX
568
581
// In case, do dynamic config of UARTs
582
#ifndef USE_UART8_RX
583
#define USE_UART8_RX TRUE
584
#endif
585
#ifndef USE_UART8_TX
// may be used in half duplex mode
586
#define USE_UART8_TX FALSE
587
#endif
588
// Tx and Rx are configured on the same pin, only one of them should be used
589
#define UART8_GPIO_PORT_TX PAL_PORT(LINE_RC1)
590
#define UART8_GPIO_TX PAL_PAD(LINE_RC1)
591
#define UART8_GPIO_PORT_RX PAL_PORT(LINE_RC1)
592
#define UART8_GPIO_RX PAL_PAD(LINE_RC1)
593
#define UART8_GPIO_AF RC1_UART_AF
594
595
#ifndef USE_UART6_RX
596
#define USE_UART6_RX FALSE
597
#endif
598
#ifndef USE_UART6_TX
599
#define USE_UART6_TX TRUE
600
#endif
601
// Tx and Rx are configured on the same pin, only one of them should be used
602
#define UART6_GPIO_PORT_TX PAL_PORT(LINE_RC2)
603
#define UART6_GPIO_TX PAL_PAD(LINE_RC2)
604
#define UART6_GPIO_PORT_RX PAL_PORT(LINE_RC2)
605
#define UART6_GPIO_RX PAL_PAD(LINE_RC2)
606
#define UART6_GPIO_AF RC2_USART_AF
607
608
/* The line that is pulled low at power up to initiate the bind process
609
* PB1: AUXb4
610
*/
611
#define SPEKTRUM_BIND_PIN PAL_PORT(LINE_AUX_B4)
612
#define SPEKTRUM_BIND_PIN_PORT PAL_PAD(LINE_AUX_B4)
613
614
// no wait with chibios as the RTC oscillator takes longer to stabilize
615
#define SPEKTRUM_BIND_WAIT 30000
616
622
#define RC_PPM_TICKS_PER_USEC 6
623
#define PPM_TIMER_FREQUENCY 6000000
624
#define PPM_CHANNEL CONCAT_BOARD_PARAM(ICU_CHANNEL_, RC2_TIM_CH)
625
#define PPM_TIMER CONCAT_BOARD_PARAM(ICUD, RC2_TIM)
626
627
/*
628
* PWM input
629
*/
630
// PWM_INPUT 1 on PA0 (AUXa1)
631
#define PWM_INPUT1_ICU ICUD2
632
#define PWM_INPUT1_CHANNEL ICU_CHANNEL_1
633
#define PWM_INPUT1_GPIO_PORT PAL_PORT(LINE_AUX_A1)
634
#define PWM_INPUT1_GPIO_PIN PAL_PAD(LINE_AUX_A1)
635
#define PWM_INPUT1_GPIO_AF GPIO_AF1
636
637
// PWM_INPUT 2 on PA1 (AUXa2)
638
#define PWM_INPUT2_ICU ICUD5
639
#define PWM_INPUT2_CHANNEL ICU_CHANNEL_2
640
#define PWM_INPUT2_GPIO_PORT PAL_PORT(LINE_AUX_A2)
641
#define PWM_INPUT2_GPIO_PIN PAL_PAD(LINE_AUX_A2)
642
#define PWM_INPUT2_GPIO_AF GPIO_AF2
643
647
// Digital noise filter: 0 disabled, [0x1 - 0xF] enable up to n t_I2CCLK
648
#define STM32_CR1_DNF(n) ((n & 0x0f) << 8)
649
// Timing register
650
#define I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR (STM32_TIMINGR_PRESC(0U) | \
651
STM32_TIMINGR_SCLDEL(10U) | STM32_TIMINGR_SDADEL(0U) | \
652
STM32_TIMINGR_SCLH(34U) | STM32_TIMINGR_SCLL(86U))
653
#define I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR (STM32_TIMINGR_PRESC(1U) | \
654
STM32_TIMINGR_SCLDEL(9U) | STM32_TIMINGR_SDADEL(0U) | \
655
STM32_TIMINGR_SCLH(105U) | STM32_TIMINGR_SCLL(153U))
656
657
658
// Internal I2C (baro, magneto)
659
660
#ifndef I2C4_CLOCK_SPEED
661
#define I2C4_CLOCK_SPEED 400000
662
#endif
663
664
#if I2C4_CLOCK_SPEED == 400000
665
#define I2C4_CFG_DEF { \
666
.timingr = I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
667
.cr1 = STM32_CR1_DNF(0), \
668
.cr2 = 0 \
669
}
670
#elif I2C4_CLOCK_SPEED == 100000
671
#define I2C4_CFG_DEF { \
672
.timingr = I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
673
.cr1 = STM32_CR1_DNF(0), \
674
.cr2 = 0 \
675
}
676
#else
677
#error "Unknown I2C4 clock speed"
678
#endif
679
680
// External I2C
681
682
#ifndef I2C2_CLOCK_SPEED
683
#define I2C2_CLOCK_SPEED 400000
684
#endif
685
686
#if I2C2_CLOCK_SPEED == 400000
687
#define I2C2_CFG_DEF { \
688
.timingr = I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
689
.cr1 = STM32_CR1_DNF(0), \
690
.cr2 = 0 \
691
}
692
#elif I2C2_CLOCK_SPEED == 100000
693
#define I2C2_CFG_DEF { \
694
.timingr = I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
695
.cr1 = STM32_CR1_DNF(0), \
696
.cr2 = 0 \
697
}
698
#else
699
#error "Unknown I2C2 clock speed"
700
#endif
701
706
// Internal SPI (IMU)
707
#define SPI6_GPIO_AF AF_SPI6_INTERNAL_CLK
708
#define SPI6_GPIO_PORT_MISO PAL_PORT(LINE_SPI6_INTERNAL_MISO)
709
#define SPI6_GPIO_MISO PAL_PAD(LINE_SPI6_INTERNAL_MISO)
710
#define SPI6_GPIO_PORT_MOSI PAL_PORT(LINE_SPI6_INTERNAL_MOSI)
711
#define SPI6_GPIO_MOSI PAL_PAD(LINE_SPI6_INTERNAL_MOSI)
712
#define SPI6_GPIO_PORT_SCK PAL_PORT(LINE_SPI6_INTERNAL_CLK)
713
#define SPI6_GPIO_SCK PAL_PAD(LINE_SPI6_INTERNAL_CLK)
714
715
// External SPI
716
#define SPI2_GPIO_AF AF_SPI2_EXTERNAL_CLK
717
#define SPI2_GPIO_PORT_MISO PAL_PORT(LINE_SPI2_EXTERNAL_MISO)
718
#define SPI2_GPIO_MISO PAL_PAD(LINE_SPI2_EXTERNAL_MISO)
719
#define SPI2_GPIO_PORT_MOSI PAL_PORT(LINE_SPI2_EXTERNAL_MOSI)
720
#define SPI2_GPIO_MOSI PAL_PAD(LINE_SPI2_EXTERNAL_MOSI)
721
#define SPI2_GPIO_PORT_SCK PAL_PORT(LINE_SPI2_EXTERNAL_CLK)
722
#define SPI2_GPIO_SCK PAL_PAD(LINE_SPI2_EXTERNAL_CLK)
723
724
// SLAVE0 on SPI connector (NSS possible)
725
#define SPI_SELECT_SLAVE0_PORT PAL_PORT(LINE_SPI2_EXTERNAL_CS)
726
#define SPI_SELECT_SLAVE0_PIN PAL_PAD(LINE_SPI2_EXTERNAL_CS)
727
// SLAVE1 on AUXb1
728
#define SPI_SELECT_SLAVE1_PORT PAL_PORT(LINE_AUX_B1)
729
#define SPI_SELECT_SLAVE1_PIN PAL_PAD(LINE_AUX_B1)
730
// SLAVE2 on AUXb2
731
#define SPI_SELECT_SLAVE2_PORT PAL_PORT(LINE_AUX_B2)
732
#define SPI_SELECT_SLAVE2_PIN PAL_PAD(LINE_AUX_B2)
733
// SLAVE3 on AUXb3
734
#define SPI_SELECT_SLAVE3_PORT PAL_PORT(LINE_AUX_B3)
735
#define SPI_SELECT_SLAVE3_PIN PAL_PAD(LINE_AUX_B3)
736
// SLAVE4 on AUXb4
737
#define SPI_SELECT_SLAVE4_PORT PAL_PORT(LINE_AUX_B4)
738
#define SPI_SELECT_SLAVE4_PIN PAL_PAD(LINE_AUX_B4)
739
// SLAVE5 on PE4 (internal IMU)
740
#define SPI_SELECT_SLAVE5_PORT PAL_PORT(LINE_SPI6_INTERNAL_CS)
741
#define SPI_SELECT_SLAVE5_PIN PAL_PAD(LINE_SPI6_INTERNAL_CS)
742
749
#ifndef USE_BARO_BOARD
750
#define USE_BARO_BOARD 0
751
#endif
752
756
#define SDIO_D0_PORT PAL_PORT(LINE_SDMMC1_D0)
757
#define SDIO_D0_PIN PAL_PAD(LINE_SDMMC1_D0)
758
#define SDIO_D1_PORT PAL_PORT(LINE_SDMMC1_D1)
759
#define SDIO_D1_PIN PAL_PAD(LINE_SDMMC1_D1)
760
#define SDIO_D2_PORT PAL_PORT(LINE_SDMMC1_D2)
761
#define SDIO_D2_PIN PAL_PAD(LINE_SDMMC1_D2)
762
#define SDIO_D3_PORT PAL_PORT(LINE_SDMMC1_D3)
763
#define SDIO_D3_PIN PAL_PAD(LINE_SDMMC1_D3)
764
#define SDIO_CK_PORT PAL_PORT(LINE_SDMMC1_CK)
765
#define SDIO_CK_PIN PAL_PAD(LINE_SDMMC1_CK)
766
#define SDIO_CMD_PORT PAL_PORT(LINE_SDMMC1_CMD)
767
#define SDIO_CMD_PIN PAL_PAD(LINE_SDMMC1_CMD)
768
#define SDIO_AF AF_SDMMC1_CK
769
// bat monitoring for file closing
770
#define SDLOG_BAT_ADC CONCAT_BOARD_PARAM(ADCD, VBAT_MEAS_ADC)
771
#define SDLOG_BAT_CHAN CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, VBAT_MEAS_ADC_INP)
772
// usb led status
773
#define SDLOG_USB_LED 4
774
#define SDLOG_USB_VBUS_PORT PAL_PORT(LINE_USB_VBUS)
775
#define SDLOG_USB_VBUS_PIN PAL_PAD(LINE_USB_VBUS)
776
777
778
/*
779
* Actuators for fixedwing
780
*/
781
/* Default actuators driver */
782
#define DEFAULT_ACTUATORS "modules/actuators/actuators_pwm.h"
783
#define ActuatorDefaultSet(_x,_y) ActuatorPwmSet(_x,_y)
784
#define ActuatorsDefaultInit() ActuatorsPwmInit()
785
#define ActuatorsDefaultCommit() ActuatorsPwmCommit()
786
790
#define WS2812D1_GPIO PAL_PORT(LINE_AUX_A1)
791
#define WS2812D1_PIN PAL_PAD(LINE_AUX_A1)
792
#define WS2812D1_AF 2
793
#define WS2812D1_CFG_DEF { \
794
.dma_stream = STM32_DMA_STREAM_ID_ANY, \
795
.dmamux = STM32_DMAMUX1_TIM5_UP, \
796
.dma_priority = STM32_PWM5_UP_DMA_PRIORITY, \
797
.pwm_channel = 0, \
798
.pwmp = &PWMD5 \
799
}
800
801
#endif
/* CONFIG_TAWAKI_2_00_H */
802
board.h
sw
airborne
boards
tawaki
chibios
v2.0
tawaki_v2.0.h
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