Paparazzi UAS  v7.0_unstable
Paparazzi is a free software Unmanned Aircraft System.
tawaki_v2.0.h
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1 #ifndef CONFIG_TAWAKI_2_00_H
2 #define CONFIG_TAWAKI_2_00_H
3 
4 #define BOARD_TAWAKI_V2
5 
9 #include "board.h"
10 
15 /*
16  * AHB_CLK
17  */
18 #define AHB_CLK STM32_HCLK
19 
20 /*
21  * Concat macro
22  */
23 #define _CONCAT_BOARD_PARAM(_s1, _s2) _s1 ## _s2
24 #define CONCAT_BOARD_PARAM(_s1, _s2) _CONCAT_BOARD_PARAM(_s1, _s2)
25 
26 /*
27  * LEDs
28  */
29 /* red, on PD15, 1 on LED_ON, 0 on LED_OFF */
30 #ifndef USE_LED_1
31 #define USE_LED_1 1
32 #endif
33 #define LED_1_GPIO PAL_PORT(LINE_LED1)
34 #define LED_1_GPIO_PIN PAL_PAD(LINE_LED1)
35 #define LED_1_GPIO_ON gpio_set
36 #define LED_1_GPIO_OFF gpio_clear
37 
38 /* orange, on PA10, 1 on LED_ON, 0 on LED_OFF */
39 #ifndef USE_LED_2
40 #define USE_LED_2 1
41 #endif
42 #define LED_2_GPIO PAL_PORT(LINE_LED2)
43 #define LED_2_GPIO_PIN PAL_PAD(LINE_LED2)
44 #define LED_2_GPIO_ON gpio_set
45 #define LED_2_GPIO_OFF gpio_clear
46 
47 /* green, on PC7, 1 on LED_ON, 0 on LED_OFF */
48 #ifndef USE_LED_3
49 #define USE_LED_3 1
50 #endif
51 #define LED_3_GPIO PAL_PORT(LINE_LED3)
52 #define LED_3_GPIO_PIN PAL_PAD(LINE_LED3)
53 #define LED_3_GPIO_ON gpio_set
54 #define LED_3_GPIO_OFF gpio_clear
55 
56 /* yellow, on PD10, 1 on LED_ON, 0 on LED_OFF */
57 #ifndef USE_LED_4
58 #define USE_LED_4 1
59 #endif
60 #define LED_4_GPIO PAL_PORT(LINE_LED4)
61 #define LED_4_GPIO_PIN PAL_PAD(LINE_LED4)
62 #define LED_4_GPIO_ON gpio_set
63 #define LED_4_GPIO_OFF gpio_clear
64 
65 /*
66  * ADCs
67  */
68 // AUXa1
69 #if USE_ADC_1
70 #define AD1_1_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_A1_ADC_INP)
71 #define ADC_1 AD1_1
72 #define ADC_1_GPIO_PORT PAL_PORT(LINE_AUX_A1)
73 #define ADC_1_GPIO_PIN PAL_PAD(LINE_AUX_A1)
74 #endif
75 
76 // AUXa2
77 #if USE_ADC_2
78 #define AD1_2_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_A2_ADC_INP)
79 #define ADC_2 AD1_2
80 #define ADC_2_GPIO_PORT PAL_PORT(LINE_AUX_A2)
81 #define ADC_2_GPIO_PIN PAL_PAD(LINE_AUX_A2)
82 #endif
83 
84 // AUXa3
85 #if USE_ADC_3
86 #define AD1_3_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_A3_ADC_INP)
87 #define ADC_3 AD1_3
88 #define ADC_3_GPIO_PORT PAL_PORT(LINE_AUX_A3)
89 #define ADC_3_GPIO_PIN PAL_PAD(LINE_AUX_A3)
90 #endif
91 
92 // AUXa4
93 #if USE_ADC_4
94 #define AD1_4_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_A4_ADC_INP)
95 #define ADC_4 AD1_4
96 #define ADC_4_GPIO_PORT PAL_PORT(LINE_AUX_A4)
97 #define ADC_4_GPIO_PIN PAL_PAD(LINE_AUX_A4)
98 #endif
99 
100 // AUXb1
101 #if USE_ADC_5
102 #define AD1_5_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_B1_ADC_IN)
103 #define ADC_5 AD1_5
104 #define ADC_5_GPIO_PORT PAL_PORT(LINE_AUX_B1)
105 #define ADC_5_GPIO_PIN PAL_PAD(LINE_AUX_B1)
106 #endif
107 
108 // AUXb2
109 #if USE_ADC_6
110 #define AD1_6_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_B2_ADC_IN)
111 #define ADC_6 AD1_6
112 #define ADC_6_GPIO_PORT PAL_PORT(LINE_AUX_B2)
113 #define ADC_6_GPIO_PIN PAL_PAD(LINE_AUX_B2)
114 #endif
115 
116 // AUXb3
117 #if USE_ADC_7
118 #define AD1_7_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_B3_ADC_IN)
119 #define ADC_7 AD1_7
120 #define ADC_7_GPIO_PORT PAL_PORT(LINE_AUX_B3)
121 #define ADC_7_GPIO_PIN PAL_PAD(LINE_AUX_B3)
122 #endif
123 
124 // AUXb4
125 #if USE_ADC_8
126 #define AD1_8_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_B4_ADC_IN)
127 #define ADC_8 AD1_8
128 #define ADC_8_GPIO_PORT PAL_PORT(LINE_AUX_B4)
129 #define ADC_8_GPIO_PIN PAL_PAD(LINE_AUX_B4)
130 #endif
131 
132 // Internal ADC for battery enabled by default
133 #ifndef USE_ADC_9
134 #define USE_ADC_9 1
135 #endif
136 #if USE_ADC_9
137 #define AD1_9_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, VBAT_MEAS_ADC_INP)
138 #define ADC_9 AD1_9
139 #define ADC_9_GPIO_PORT PAL_PORT(LINE_VBAT_MEAS)
140 #define ADC_9_GPIO_PIN PAL_PAD(LINE_VBAT_MEAS)
141 #endif
142 
143 /* allow to define ADC_CHANNEL_VSUPPLY in the airframe file*/
144 #ifndef ADC_CHANNEL_VSUPPLY
145 #define ADC_CHANNEL_VSUPPLY ADC_9
146 #endif
147 
148 /*
149  * R1 = 2.2k
150  * R2 = 12k
151  * adc * (3.3 / 2^16) * ((R1 + R2) / R1)
152  */
153 #define VBAT_R1 2200.0f
154 #define VBAT_R2 18000.0f
155 #define DefaultVoltageOfAdc(adc) ((3.3f/65536.0f)*((VBAT_R1+VBAT_R2)/VBAT_R1)*adc)
156 
157 /*
158  * PWM defines
159  */
160 
161 // SRVa connectors, activated in PWM mode by default
162 
163 #ifndef USE_PWM1
164 #define USE_PWM1 1
165 #endif
166 #if USE_PWM1
167 #define PWM_SERVO_1 1
168 #define PWM_SERVO_1_GPIO PAL_PORT(LINE_SRVA1)
169 #define PWM_SERVO_1_PIN PAL_PAD(LINE_SRVA1)
170 #define PWM_SERVO_1_AF AF_SRVA1
171 #define PWM_SERVO_1_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVA1_TIM)
172 #define PWM_SERVO_1_CHANNEL (SRVA1_TIM_CH-1)
173 #define PWM_SERVO_1_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVA1_TIM)
174 #endif
175 
176 #ifndef USE_PWM2
177 #define USE_PWM2 1
178 #endif
179 #if USE_PWM2
180 #define PWM_SERVO_2 2
181 #define PWM_SERVO_2_GPIO PAL_PORT(LINE_SRVA2)
182 #define PWM_SERVO_2_PIN PAL_PAD(LINE_SRVA2)
183 #define PWM_SERVO_2_AF AF_SRVA2
184 #define PWM_SERVO_2_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVA2_TIM)
185 #define PWM_SERVO_2_CHANNEL (SRVA2_TIM_CH-1)
186 #define PWM_SERVO_2_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVA2_TIM)
187 #endif
188 
189 #ifndef USE_PWM3
190 #define USE_PWM3 1
191 #endif
192 #if USE_PWM3
193 #define PWM_SERVO_3 3
194 #define PWM_SERVO_3_GPIO PAL_PORT(LINE_SRVA3)
195 #define PWM_SERVO_3_PIN PAL_PAD(LINE_SRVA3)
196 #define PWM_SERVO_3_AF AF_SRVA3
197 #define PWM_SERVO_3_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVA3_TIM)
198 #define PWM_SERVO_3_CHANNEL (SRVA3_TIM_CH-1)
199 #define PWM_SERVO_3_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVA3_TIM)
200 #endif
201 
202 #ifndef USE_PWM4
203 #define USE_PWM4 1
204 #endif
205 #if USE_PWM4
206 #define PWM_SERVO_4 4
207 #define PWM_SERVO_4_GPIO PAL_PORT(LINE_SRVA4)
208 #define PWM_SERVO_4_PIN PAL_PAD(LINE_SRVA4)
209 #define PWM_SERVO_4_AF AF_SRVA4
210 #define PWM_SERVO_4_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVA4_TIM)
211 #define PWM_SERVO_4_CHANNEL (SRVA4_TIM_CH-1)
212 #define PWM_SERVO_4_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVA4_TIM)
213 #endif
214 
215 // SRVb connector, PWM mode disabled by default (DShot is enabled by default)
216 
217 #ifndef USE_PWM5
218 #define USE_PWM5 0
219 #endif
220 #if USE_PWM5
221 #define PWM_SERVO_5 5
222 #define PWM_SERVO_5_GPIO PAL_PORT(LINE_SRVB1)
223 #define PWM_SERVO_5_PIN PAL_PAD(LINE_SRVB1)
224 #define PWM_SERVO_5_AF AF_SRVB1
225 #define PWM_SERVO_5_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVB1_TIM)
226 #define PWM_SERVO_5_CHANNEL (SRVB1_TIM_CH-1)
227 #define PWM_SERVO_5_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVB1_TIM)
228 #endif
229 
230 #ifndef USE_PWM6
231 #define USE_PWM6 0
232 #endif
233 #if USE_PWM6
234 #define PWM_SERVO_6 6
235 #define PWM_SERVO_6_GPIO PAL_PORT(LINE_SRVB2)
236 #define PWM_SERVO_6_PIN PAL_PAD(LINE_SRVB2)
237 #define PWM_SERVO_6_AF AF_SRVB2
238 #define PWM_SERVO_6_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVB2_TIM)
239 #define PWM_SERVO_6_CHANNEL (SRVB2_TIM_CH-1)
240 #define PWM_SERVO_6_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVB2_TIM)
241 #endif
242 
243 #ifndef USE_PWM7
244 #define USE_PWM7 0
245 #endif
246 #if USE_PWM7
247 #define PWM_SERVO_7 7
248 #define PWM_SERVO_7_GPIO PAL_PORT(LINE_SRVB3)
249 #define PWM_SERVO_7_PIN PAL_PAD(LINE_SRVB3)
250 #define PWM_SERVO_7_AF AF_SRVB3
251 #define PWM_SERVO_7_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVB3_TIM)
252 #define PWM_SERVO_7_CHANNEL (SRVB3_TIM_CH-1)
253 #define PWM_SERVO_7_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVB3_TIM)
254 #endif
255 
256 #ifndef USE_PWM8
257 #define USE_PWM8 0
258 #endif
259 #if USE_PWM8
260 #define PWM_SERVO_8 8
261 #define PWM_SERVO_8_GPIO PAL_PORT(LINE_SRVB4)
262 #define PWM_SERVO_8_PIN PAL_PAD(LINE_SRVB4)
263 #define PWM_SERVO_8_AF AF_SRVB4
264 #define PWM_SERVO_8_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVB4_TIM)
265 #define PWM_SERVO_8_CHANNEL (SRVB4_TIM_CH-1)
266 #define PWM_SERVO_8_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVB4_TIM)
267 #endif
268 
269 #ifndef USE_PWM9
270 #define USE_PWM9 0
271 #endif
272 #if USE_PWM9
273 #define PWM_SERVO_9 9
274 #define PWM_SERVO_9_GPIO PAL_PORT(LINE_AUX_A1)
275 #define PWM_SERVO_9_PIN PAL_PAD(LINE_AUX_A1)
276 #define PWM_SERVO_9_AF GPIO_AF2
277 #define PWM_SERVO_9_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_A1_TIM)
278 #define PWM_SERVO_9_CHANNEL (AUX_A1_TIM_CH-1)
279 #define PWM_SERVO_9_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_A1_TIM)
280 #endif
281 
282 #ifndef USE_PWM10
283 #define USE_PWM10 0
284 #endif
285 #if USE_PWM10
286 #define PWM_SERVO_10 10
287 #define PWM_SERVO_10_GPIO PAL_PORT(LINE_AUX_A2)
288 #define PWM_SERVO_10_PIN PAL_PAD(LINE_AUX_A2)
289 #define PWM_SERVO_10_AF GPIO_AF2
290 #define PWM_SERVO_10_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_A2_TIM)
291 #define PWM_SERVO_10_CHANNEL (AUX_A2_TIM_CH-1)
292 #define PWM_SERVO_10_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_A2_TIM)
293 #endif
294 
295 #ifndef USE_PWM11
296 #define USE_PWM11 0
297 #endif
298 #if USE_PWM11
299 #define PWM_SERVO_11 11
300 #define PWM_SERVO_11_GPIO PAL_PORT(LINE_AUX_A3)
301 #define PWM_SERVO_11_PIN PAL_PAD(LINE_AUX_A3)
302 #define PWM_SERVO_11_AF GPIO_AF2
303 #define PWM_SERVO_11_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_A3_TIM)
304 #define PWM_SERVO_11_CHANNEL (AUX_A3_TIM_CH-1)
305 #define PWM_SERVO_11_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_A3_TIM)
306 #endif
307 
308 #ifndef USE_PWM12
309 #define USE_PWM12 0
310 #endif
311 #if USE_PWM12
312 #define PWM_SERVO_12 12
313 #define PWM_SERVO_12_GPIO PAL_PORT(LINE_AUX_A4)
314 #define PWM_SERVO_12_PIN PAL_PAD(LINE_AUX_A4)
315 #define PWM_SERVO_12_AF GPIO_AF2
316 #define PWM_SERVO_12_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_A4_TIM)
317 #define PWM_SERVO_12_CHANNEL (AUX_A4_TIM_CH-1)
318 #define PWM_SERVO_12_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_A4_TIM)
319 #endif
320 
321 #ifndef USE_PWM13
322 #define USE_PWM13 0
323 #endif
324 #if USE_PWM13
325 #define PWM_SERVO_13 13
326 #define PWM_SERVO_13_GPIO PAL_PORT(LINE_AUX_B1)
327 #define PWM_SERVO_13_PIN PAL_PAD(LINE_AUX_B1)
328 #define PWM_SERVO_13_AF GPIO_AF2
329 #define PWM_SERVO_13_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_B1_TIM)
330 #define PWM_SERVO_13_CHANNEL (AUX_B1_TIM_CH-1)
331 #define PWM_SERVO_13_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_B1_TIM)
332 #endif
333 
334 #ifndef USE_PWM14
335 #define USE_PWM14 0
336 #endif
337 #if USE_PWM14
338 #define PWM_SERVO_14 14
339 #define PWM_SERVO_14_GPIO PAL_PORT(LINE_AUX_B2)
340 #define PWM_SERVO_14_PIN PAL_PAD(LINE_AUX_B2)
341 #define PWM_SERVO_14_AF GPIO_AF2
342 #define PWM_SERVO_14_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_B2_TIM)
343 #define PWM_SERVO_14_CHANNEL (AUX_B2_TIM_CH-1)
344 #define PWM_SERVO_14_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_B2_TIM)
345 #endif
346 
347 #ifndef USE_PWM15
348 #define USE_PWM15 0
349 #endif
350 #if USE_PWM15
351 #define PWM_SERVO_15 15
352 #define PWM_SERVO_15_GPIO PAL_PORT(LINE_AUX_B3)
353 #define PWM_SERVO_15_PIN PAL_PAD(LINE_AUX_B3)
354 #define PWM_SERVO_15_AF GPIO_AF2
355 #define PWM_SERVO_15_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_B3_TIM)
356 #define PWM_SERVO_15_CHANNEL (AUX_B3_TIM_CH-1)
357 #define PWM_SERVO_15_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_B3_TIM)
358 #endif
359 
360 #ifndef USE_PWM16
361 #define USE_PWM16 0
362 #endif
363 #if USE_PWM16
364 #define PWM_SERVO_16 16
365 #define PWM_SERVO_16_GPIO PAL_PORT(LINE_AUX_B4)
366 #define PWM_SERVO_16_PIN PAL_PAD(LINE_AUX_B4)
367 #define PWM_SERVO_16_AF GPIO_AF2
368 #define PWM_SERVO_16_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_B4_TIM)
369 #define PWM_SERVO_16_CHANNEL (AUX_B4_TIM_CH-1)
370 #define PWM_SERVO_16_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_B4_TIM)
371 #endif
372 
373 // servo index starting at 1 + regular servos + aux servos
374 // so NB = 1+8+8
375 #define ACTUATORS_PWM_NB 17
376 
377 
381 #ifdef DSHOT_TIM3_TELEMETRY_NUM
382 #define DSHOT_TIM3_TELEMETRY_DEV CONCAT_BOARD_PARAM(&SD, DSHOT_TIM3_TELEMETRY_NUM)
383 #else
384 #define DSHOT_TIM3_TELEMETRY_DEV NULL
385 #endif
386 
387 #ifdef DSHOT_TIM1_TELEMETRY_NUM
388 #define DSHOT_TIM1_TELEMETRY_DEV CONCAT_BOARD_PARAM(&SD, DSHOT_TIM1_TELEMETRY_NUM)
389 #else
390 #define DSHOT_TIM1_TELEMETRY_DEV NULL
391 #endif
392 
393 // macros for possible dshot telemetry
394 #define DSHOT_TLM_RX 1
395 #define DSHOT_TLM_AUX_RX 4
396 
397 #ifndef USE_DSHOT_TIM3
398 #define USE_DSHOT_TIM3 1 // use SRVb for DShot by default
399 #endif
400 
401 
402 
403 
404 #if USE_DSHOT_TIM3 // Servo B1, B2, B3, B4 on TIM4
405 
406 // Servo B1, B2, B3, B4 on TM4 are primary DSHOT connector
407 #define DSHOT_SERVO_1 1
408 #define DSHOT_SERVO_1_GPIO PAL_PORT(LINE_SRVB1)
409 #define DSHOT_SERVO_1_PIN PAL_PAD(LINE_SRVB1)
410 #define DSHOT_SERVO_1_AF AF_SRVB1
411 #define DSHOT_SERVO_1_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVB1_TIM)
412 #define DSHOT_SERVO_1_CHANNEL SRVB1_TIM_CH
413 
414 #define DSHOT_SERVO_2 2
415 #define DSHOT_SERVO_2_GPIO PAL_PORT(LINE_SRVB2)
416 #define DSHOT_SERVO_2_PIN PAL_PAD(LINE_SRVB2)
417 #define DSHOT_SERVO_2_AF AF_SRVB2
418 #define DSHOT_SERVO_2_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVB2_TIM)
419 #define DSHOT_SERVO_2_CHANNEL SRVB2_TIM_CH
420 
421 #define DSHOT_SERVO_3 3
422 #define DSHOT_SERVO_3_GPIO PAL_PORT(LINE_SRVB3)
423 #define DSHOT_SERVO_3_PIN PAL_PAD(LINE_SRVB3)
424 #define DSHOT_SERVO_3_AF AF_SRVB3
425 #define DSHOT_SERVO_3_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVB3_TIM)
426 #define DSHOT_SERVO_3_CHANNEL SRVB3_TIM_CH
427 
428 #define DSHOT_SERVO_4 4
429 #define DSHOT_SERVO_4_GPIO PAL_PORT(LINE_SRVB4)
430 #define DSHOT_SERVO_4_PIN PAL_PAD(LINE_SRVB4)
431 #define DSHOT_SERVO_4_AF AF_SRVB4
432 #define DSHOT_SERVO_4_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVB4_TIM)
433 #define DSHOT_SERVO_4_CHANNEL SRVB4_TIM_CH
434 
435 #define DSHOT_CONF_TIM3 1
436 
437 
438 #if DSHOT_BIDIR
439 
440 #define DSHOT_CAPT_CONF3_DEF \
441  .dma_capt_cfg = { \
442  .gptd = &DSHOT1_BIDIR_GPT, \
443  .dma_streams = {DSHOTS_CAPTURE_STREAMS(3)}, \
444  .dma_capture = &dshot3DmaCaptureBuffer, \
445  .dcache_memory_in_use = false, \
446  },
447 #else
448 #define DSHOT_CAPT_CONF3_DEF
449 #endif
450 
451 #define DSHOT_CONF3_DEF { \
452  .dma_stream = STM32_DMA_STREAM_ID_ANY, \
453  .dmamux = STM32_DMAMUX1_TIM3_UP, \
454  .pwmp = &PWMD3, \
455  .tlm_sd = DSHOT_TIM3_TELEMETRY_DEV, \
456  .dma_buf = &dshot3DmaBuffer, \
457  DSHOT_CAPT_CONF3_DEF \
458  .dcache_memory_in_use = false \
459 }
460 
461 #endif
462 
463 #if USE_DSHOT_TIM1 // Servo A1, A2, A3, A4 on TIM1 only activated if needed
464 
465 #define DSHOT_SERVO_5 5
466 #define DSHOT_SERVO_5_GPIO PAL_PORT(LINE_SRVA1)
467 #define DSHOT_SERVO_5_PIN PAL_PAD(LINE_SRVA1)
468 #define DSHOT_SERVO_5_AF AF_SRVA1
469 #define DSHOT_SERVO_5_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVA1_TIM)
470 #define DSHOT_SERVO_5_CHANNEL SRVA1_TIM_CH
471 
472 #define DSHOT_SERVO_6 6
473 #define DSHOT_SERVO_6_GPIO PAL_PORT(LINE_SRVA2)
474 #define DSHOT_SERVO_6_PIN PAL_PAD(LINE_SRVA2)
475 #define DSHOT_SERVO_6_AF AF_SRVA2
476 #define DSHOT_SERVO_6_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVA2_TIM)
477 #define DSHOT_SERVO_6_CHANNEL SRVA2_TIM_CH
478 
479 #define DSHOT_SERVO_7 7
480 #define DSHOT_SERVO_7_GPIO PAL_PORT(LINE_SRVA3)
481 #define DSHOT_SERVO_7_PIN PAL_PAD(LINE_SRVA3)
482 #define DSHOT_SERVO_7_AF AF_SRVA3
483 #define DSHOT_SERVO_7_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVA3_TIM)
484 #define DSHOT_SERVO_7_CHANNEL SRVA3_TIM_CH
485 
486 #define DSHOT_SERVO_8 8
487 #define DSHOT_SERVO_8_GPIO PAL_PORT(LINE_SRVA4)
488 #define DSHOT_SERVO_8_PIN PAL_PAD(LINE_SRVA4)
489 #define DSHOT_SERVO_8_AF AF_SRVA4
490 #define DSHOT_SERVO_8_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVA4_TIM)
491 #define DSHOT_SERVO_8_CHANNEL SRVA4_TIM_CH
492 
493 #define DSHOT_CONF_TIM1 1
494 
495 #if DSHOT_BIDIR
496 #ifndef DSHOT2_BIDIR_GPT
497 #error "Select and activate DSHOT2_BIDIR_GPT for DSHOT_CONF1. Example: USE_GPT8=TRUE, DSHOT2_BIDIR_GPT=GPTD8"
498 #endif
499 #define DSHOT_CAPT_CONF1_DEF \
500  .dma_capt_cfg = { \
501  .gptd = &DSHOT2_BIDIR_GPT, \
502  .dma_streams = {DSHOTS_CAPTURE_STREAMS(1)}, \
503  .dma_capture = &dshot1DmaCaptureBuffer, \
504  .dcache_memory_in_use = false, \
505  },
506 #else
507 #define DSHOT_CAPT_CONF1_DEF
508 #endif
509 
510 #define DSHOT_CONF1_DEF { \
511  .dma_stream = STM32_DMA_STREAM_ID_ANY, \
512  .dmamux = STM32_DMAMUX1_TIM1_UP, \
513  .pwmp = &PWMD1, \
514  .tlm_sd = DSHOT_TIM1_TELEMETRY_DEV, \
515  .dma_buf = &dshot1DmaBuffer, \
516  DSHOT_CAPT_CONF1_DEF \
517  .dcache_memory_in_use = false \
518 }
519 
520 #endif
521 
525 #define UART2_GPIO_PORT_TX PAL_PORT(LINE_UART2_TX)
526 #define UART2_GPIO_TX PAL_PAD(LINE_UART2_TX)
527 #define UART2_GPIO_PORT_RX PAL_PORT(LINE_UART2_RX)
528 #define UART2_GPIO_RX PAL_PAD(LINE_UART2_RX)
529 #define UART2_GPIO_AF AF_UART2_TX
530 #ifndef UART2_HW_FLOW_CONTROL
531 #define UART2_HW_FLOW_CONTROL FALSE
532 #endif
533 
539 #define UART3_GPIO_PORT_TX PAL_PORT(LINE_UART3_TX)
540 #define UART3_GPIO_TX PAL_PAD(LINE_UART3_TX)
541 #define UART3_GPIO_PORT_RX PAL_PORT(LINE_UART3_RX)
542 #define UART3_GPIO_RX PAL_PAD(LINE_UART3_RX)
543 #define UART3_GPIO_AF AF_UART3_TX
544 
545 #define UART7_GPIO_PORT_TX PAL_PORT(LINE_UART7_TX)
546 #define UART7_GPIO_TX PAL_PAD(LINE_UART7_TX)
547 #define UART7_GPIO_PORT_RX PAL_PORT(LINE_UART7_RX)
548 #define UART7_GPIO_RX PAL_PAD(LINE_UART7_RX)
549 #define UART7_GPIO_AF AF_UART7_TX
550 
555 #define UART4_GPIO_PORT_TX PAL_PORT(LINE_AUX_A1)
556 #define UART4_GPIO_TX PAL_PAD(LINE_AUX_A1)
557 #define UART4_GPIO_PORT_RX PAL_PORT(LINE_AUX_A2)
558 #define UART4_GPIO_RX PAL_PAD(LINE_AUX_A2)
559 #define UART4_GPIO_AF AUX_A1_UART_AF
560 
565 #define UART1_GPIO_PORT_RX PAL_PORT(LINE_DSHOT_RX)
566 #define UART1_GPIO_RX PAL_PAD(LINE_DSHOT_RX)
567 #define UART1_GPIO_AF AF_DSHOT_RX
568 
581 // In case, do dynamic config of UARTs
582 #ifndef USE_UART8_RX
583 #define USE_UART8_RX TRUE
584 #endif
585 #ifndef USE_UART8_TX // may be used in half duplex mode
586 #define USE_UART8_TX FALSE
587 #endif
588 // Tx and Rx are configured on the same pin, only one of them should be used
589 #define UART8_GPIO_PORT_TX PAL_PORT(LINE_RC1)
590 #define UART8_GPIO_TX PAL_PAD(LINE_RC1)
591 #define UART8_GPIO_PORT_RX PAL_PORT(LINE_RC1)
592 #define UART8_GPIO_RX PAL_PAD(LINE_RC1)
593 #define UART8_GPIO_AF RC1_UART_AF
594 
595 #ifndef USE_UART6_RX
596 #define USE_UART6_RX FALSE
597 #endif
598 #ifndef USE_UART6_TX
599 #define USE_UART6_TX TRUE
600 #endif
601 // Tx and Rx are configured on the same pin, only one of them should be used
602 #define UART6_GPIO_PORT_TX PAL_PORT(LINE_RC2)
603 #define UART6_GPIO_TX PAL_PAD(LINE_RC2)
604 #define UART6_GPIO_PORT_RX PAL_PORT(LINE_RC2)
605 #define UART6_GPIO_RX PAL_PAD(LINE_RC2)
606 #define UART6_GPIO_AF RC2_USART_AF
607 
608 /* The line that is pulled low at power up to initiate the bind process
609  * PB1: AUXb4
610  */
611 #define SPEKTRUM_BIND_PIN PAL_PORT(LINE_AUX_B4)
612 #define SPEKTRUM_BIND_PIN_PORT PAL_PAD(LINE_AUX_B4)
613 
614 // no wait with chibios as the RTC oscillator takes longer to stabilize
615 #define SPEKTRUM_BIND_WAIT 30000
616 
622 #define RC_PPM_TICKS_PER_USEC 6
623 #define PPM_TIMER_FREQUENCY 6000000
624 #define PPM_CHANNEL CONCAT_BOARD_PARAM(ICU_CHANNEL_, RC2_TIM_CH)
625 #define PPM_TIMER CONCAT_BOARD_PARAM(ICUD, RC2_TIM)
626 
627 /*
628  * PWM input
629  */
630 // PWM_INPUT 1 on PA0 (AUXa1)
631 #define PWM_INPUT1_ICU ICUD2
632 #define PWM_INPUT1_CHANNEL ICU_CHANNEL_1
633 #define PWM_INPUT1_GPIO_PORT PAL_PORT(LINE_AUX_A1)
634 #define PWM_INPUT1_GPIO_PIN PAL_PAD(LINE_AUX_A1)
635 #define PWM_INPUT1_GPIO_AF GPIO_AF1
636 
637 // PWM_INPUT 2 on PA1 (AUXa2)
638 #define PWM_INPUT2_ICU ICUD5
639 #define PWM_INPUT2_CHANNEL ICU_CHANNEL_2
640 #define PWM_INPUT2_GPIO_PORT PAL_PORT(LINE_AUX_A2)
641 #define PWM_INPUT2_GPIO_PIN PAL_PAD(LINE_AUX_A2)
642 #define PWM_INPUT2_GPIO_AF GPIO_AF2
643 
647 // Digital noise filter: 0 disabled, [0x1 - 0xF] enable up to n t_I2CCLK
648 #define STM32_CR1_DNF(n) ((n & 0x0f) << 8)
649 // Timing register
650 #define I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR (STM32_TIMINGR_PRESC(0U) | \
651  STM32_TIMINGR_SCLDEL(10U) | STM32_TIMINGR_SDADEL(0U) | \
652  STM32_TIMINGR_SCLH(34U) | STM32_TIMINGR_SCLL(86U))
653 #define I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR (STM32_TIMINGR_PRESC(1U) | \
654  STM32_TIMINGR_SCLDEL(9U) | STM32_TIMINGR_SDADEL(0U) | \
655  STM32_TIMINGR_SCLH(105U) | STM32_TIMINGR_SCLL(153U))
656 
657 
658 // Internal I2C (baro, magneto)
659 
660 #ifndef I2C4_CLOCK_SPEED
661 #define I2C4_CLOCK_SPEED 400000
662 #endif
663 
664 #if I2C4_CLOCK_SPEED == 400000
665 #define I2C4_CFG_DEF { \
666  .timingr = I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
667  .cr1 = STM32_CR1_DNF(0), \
668  .cr2 = 0 \
669 }
670 #elif I2C4_CLOCK_SPEED == 100000
671 #define I2C4_CFG_DEF { \
672  .timingr = I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
673  .cr1 = STM32_CR1_DNF(0), \
674  .cr2 = 0 \
675 }
676 #else
677 #error "Unknown I2C4 clock speed"
678 #endif
679 
680 // External I2C
681 
682 #ifndef I2C2_CLOCK_SPEED
683 #define I2C2_CLOCK_SPEED 400000
684 #endif
685 
686 #if I2C2_CLOCK_SPEED == 400000
687 #define I2C2_CFG_DEF { \
688  .timingr = I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
689  .cr1 = STM32_CR1_DNF(0), \
690  .cr2 = 0 \
691 }
692 #elif I2C2_CLOCK_SPEED == 100000
693 #define I2C2_CFG_DEF { \
694  .timingr = I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
695  .cr1 = STM32_CR1_DNF(0), \
696  .cr2 = 0 \
697 }
698 #else
699 #error "Unknown I2C2 clock speed"
700 #endif
701 
706 // Internal SPI (IMU)
707 #define SPI6_GPIO_AF AF_SPI6_INTERNAL_CLK
708 #define SPI6_GPIO_PORT_MISO PAL_PORT(LINE_SPI6_INTERNAL_MISO)
709 #define SPI6_GPIO_MISO PAL_PAD(LINE_SPI6_INTERNAL_MISO)
710 #define SPI6_GPIO_PORT_MOSI PAL_PORT(LINE_SPI6_INTERNAL_MOSI)
711 #define SPI6_GPIO_MOSI PAL_PAD(LINE_SPI6_INTERNAL_MOSI)
712 #define SPI6_GPIO_PORT_SCK PAL_PORT(LINE_SPI6_INTERNAL_CLK)
713 #define SPI6_GPIO_SCK PAL_PAD(LINE_SPI6_INTERNAL_CLK)
714 
715 // External SPI
716 #define SPI2_GPIO_AF AF_SPI2_EXTERNAL_CLK
717 #define SPI2_GPIO_PORT_MISO PAL_PORT(LINE_SPI2_EXTERNAL_MISO)
718 #define SPI2_GPIO_MISO PAL_PAD(LINE_SPI2_EXTERNAL_MISO)
719 #define SPI2_GPIO_PORT_MOSI PAL_PORT(LINE_SPI2_EXTERNAL_MOSI)
720 #define SPI2_GPIO_MOSI PAL_PAD(LINE_SPI2_EXTERNAL_MOSI)
721 #define SPI2_GPIO_PORT_SCK PAL_PORT(LINE_SPI2_EXTERNAL_CLK)
722 #define SPI2_GPIO_SCK PAL_PAD(LINE_SPI2_EXTERNAL_CLK)
723 
724 // SLAVE0 on SPI connector (NSS possible)
725 #define SPI_SELECT_SLAVE0_PORT PAL_PORT(LINE_SPI2_EXTERNAL_CS)
726 #define SPI_SELECT_SLAVE0_PIN PAL_PAD(LINE_SPI2_EXTERNAL_CS)
727 // SLAVE1 on AUXb1
728 #define SPI_SELECT_SLAVE1_PORT PAL_PORT(LINE_AUX_B1)
729 #define SPI_SELECT_SLAVE1_PIN PAL_PAD(LINE_AUX_B1)
730 // SLAVE2 on AUXb2
731 #define SPI_SELECT_SLAVE2_PORT PAL_PORT(LINE_AUX_B2)
732 #define SPI_SELECT_SLAVE2_PIN PAL_PAD(LINE_AUX_B2)
733 // SLAVE3 on AUXb3
734 #define SPI_SELECT_SLAVE3_PORT PAL_PORT(LINE_AUX_B3)
735 #define SPI_SELECT_SLAVE3_PIN PAL_PAD(LINE_AUX_B3)
736 // SLAVE4 on AUXb4
737 #define SPI_SELECT_SLAVE4_PORT PAL_PORT(LINE_AUX_B4)
738 #define SPI_SELECT_SLAVE4_PIN PAL_PAD(LINE_AUX_B4)
739 // SLAVE5 on PE4 (internal IMU)
740 #define SPI_SELECT_SLAVE5_PORT PAL_PORT(LINE_SPI6_INTERNAL_CS)
741 #define SPI_SELECT_SLAVE5_PIN PAL_PAD(LINE_SPI6_INTERNAL_CS)
742 
749 #ifndef USE_BARO_BOARD
750 #define USE_BARO_BOARD 0
751 #endif
752 
756 #define SDIO_D0_PORT PAL_PORT(LINE_SDMMC1_D0)
757 #define SDIO_D0_PIN PAL_PAD(LINE_SDMMC1_D0)
758 #define SDIO_D1_PORT PAL_PORT(LINE_SDMMC1_D1)
759 #define SDIO_D1_PIN PAL_PAD(LINE_SDMMC1_D1)
760 #define SDIO_D2_PORT PAL_PORT(LINE_SDMMC1_D2)
761 #define SDIO_D2_PIN PAL_PAD(LINE_SDMMC1_D2)
762 #define SDIO_D3_PORT PAL_PORT(LINE_SDMMC1_D3)
763 #define SDIO_D3_PIN PAL_PAD(LINE_SDMMC1_D3)
764 #define SDIO_CK_PORT PAL_PORT(LINE_SDMMC1_CK)
765 #define SDIO_CK_PIN PAL_PAD(LINE_SDMMC1_CK)
766 #define SDIO_CMD_PORT PAL_PORT(LINE_SDMMC1_CMD)
767 #define SDIO_CMD_PIN PAL_PAD(LINE_SDMMC1_CMD)
768 #define SDIO_AF AF_SDMMC1_CK
769 // bat monitoring for file closing
770 #define SDLOG_BAT_ADC CONCAT_BOARD_PARAM(ADCD, VBAT_MEAS_ADC)
771 #define SDLOG_BAT_CHAN CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, VBAT_MEAS_ADC_INP)
772 // usb led status
773 #define SDLOG_USB_LED 4
774 #define SDLOG_USB_VBUS_PORT PAL_PORT(LINE_USB_VBUS)
775 #define SDLOG_USB_VBUS_PIN PAL_PAD(LINE_USB_VBUS)
776 
777 
778 /*
779  * Actuators for fixedwing
780  */
781  /* Default actuators driver */
782 #define DEFAULT_ACTUATORS "modules/actuators/actuators_pwm.h"
783 #define ActuatorDefaultSet(_x,_y) ActuatorPwmSet(_x,_y)
784 #define ActuatorsDefaultInit() ActuatorsPwmInit()
785 #define ActuatorsDefaultCommit() ActuatorsPwmCommit()
786 
790 #define WS2812D1_GPIO PAL_PORT(LINE_AUX_A1)
791 #define WS2812D1_PIN PAL_PAD(LINE_AUX_A1)
792 #define WS2812D1_AF 2
793 #define WS2812D1_CFG_DEF { \
794  .dma_stream = STM32_DMA_STREAM_ID_ANY, \
795  .dmamux = STM32_DMAMUX1_TIM5_UP, \
796  .dma_priority = STM32_PWM5_UP_DMA_PRIORITY, \
797  .pwm_channel = 0, \
798  .pwmp = &PWMD5 \
799 }
800 
801 #endif /* CONFIG_TAWAKI_2_00_H */
802