Paparazzi UAS
v7.0_unstable
Paparazzi is a free software Unmanned Aircraft System.
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board.h
Go to the documentation of this file.
1
/*
2
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
3
4
Licensed under the Apache License, Version 2.0 (the "License");
5
you may not use this file except in compliance with the License.
6
You may obtain a copy of the License at
7
8
http://www.apache.org/licenses/LICENSE-2.0
9
10
Unless required by applicable law or agreed to in writing, software
11
distributed under the License is distributed on an "AS IS" BASIS,
12
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13
See the License for the specific language governing permissions and
14
limitations under the License.
15
*/
16
17
#pragma once
18
19
/*
20
* Board identifier.
21
*/
22
#define BOARD_PX4FMU_6X
23
#define BOARD_NAME "PX4FMU 6X"
24
25
/*
26
* Board oscillators-related settings.
27
*/
28
#if !defined(STM32_LSECLK)
29
#define STM32_LSECLK 32768U
30
#endif
31
32
#define STM32_LSEDRV (3U << 3U)
33
34
#if !defined(STM32_HSECLK)
35
#define STM32_HSECLK 16000000U
36
#endif
37
38
/*
39
* MCU type as defined in the ST header.
40
*/
41
#define STM32H753xx
42
#define MCUCONF_H7
43
44
/*
45
* PWM TIM defines
46
* enable TIM4, TIM5 and TIM12 by default
47
*/
48
#ifndef USE_PWM_TIM4
49
#define USE_PWM_TIM4 1
50
#endif
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52
#ifndef USE_PWM_TIM5
53
#define USE_PWM_TIM5 1
54
#endif
55
56
#ifndef USE_PWM_TIM12
57
//#define USE_PWM_TIM12 1
58
#endif
59
60
/*
61
* IO pins assignments.
62
*/
63
#define PA00_ADC1 0U
64
#define PA01_ETH_RMII_REF_CLK 1U
65
#define PA02_ETH_MDIO 2U
66
#define PA03_UART2 3U
67
#define PA04_ADC2 4U
68
#define PA05_SPI1_SCK 5U
69
#define PA06_SPI6_MISO 6U
70
#define PA07_ETH_RMII_CRS_DV 7U
71
#define PA08_I2C3_SCL 8U
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#define PA09_USB_VBUS 9U
73
#define PA10_SPI2_DRDY 10U
74
#define PA11_USB_DM 11U
75
#define PA12_USB_DP 12U
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#define PA13_SWDIO 13U
77
#define PA14_SWCLK 14U
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#define PA15 15U
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80
#define PB00_ADC3 0U
81
#define PB01_ADC5 1U
82
#define PB02_SPI3_MOSI 2U
83
#define PB03_SPI6_SCK 3U
84
#define PB04_SDIO_D3 4U
85
#define PB05_SPI1_MOSI 5U
86
#define PB06_UART1_TX 6U
87
#define PB07_UART1_RX 7U
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#define PB08_I2C1_SCL 8U
89
#define PB09_I2C1_SDA 9U
90
#define PB10_IMU_HEATER 10U
91
#define PB11_ETH_RMII_TX_EN 11U
92
#define PB12_CAN2_RX 12U
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#define PB13_CAN2_TX 13U
94
#define PB14_SDIO_D0 14U
95
#define PB15_SDIO_D1 15U
96
97
#define PC00_NFC_GPIO 0U
98
#define PC01_ETH_MDC 1U
99
#define PC02_ADC6 2U
100
#define PC03_ADC7 3U
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#define PC04_ETH_RMII_RXD0 4U
102
#define PC05_ETH_RMII_RXD1 5U
103
#define PC06_UART6_TX 6U
104
#define PC07_UART6_RX 7U
105
#define PC08_UART5_RTS 8U
106
#define PC09_UART5_CTS 9U
107
#define PC10_SPI3_SCK 10U
108
#define PC11_SPI3_MISO 11U
109
#define PC12_UART5_TX 12U
110
#define PC13_VDD_3V3_SD_CARD_EN 13U
111
#define PC14 14U
112
#define PC15 15U
113
114
#define PD00_CAN1_RX 0U
115
#define PD01_CAN1_TX 1U
116
#define PD02_UART5_RX 2U
117
#define PD03_UART2_CTS 3U
118
#define PD04_UART2_RTS 4U
119
#define PD05_UART2_TX 5U
120
#define PD06_SDIO_CK 6U
121
#define PD07_SDIO_CMD 7U
122
#define PD08_UART3_TX 8U
123
#define PD09_UART3_RX 9U
124
#define PD10_LED4 10U
125
#define PD11 11U
126
#define PD12 12U
127
#define PD13_SERVO5 13U
128
#define PD14_SERVO6 14U
129
#define PD15 15U
130
131
#define PE00_UART8_RX 0U
132
#define PE01_UART8_TX 1U
133
#define PE02 2U
134
#define PE03_LED1 3U
135
#define PE04_LED2 4U
136
#define PE05_LED3 5U
137
#define PE06_NARMED 6U
138
#define PE07_VDD_3V3_SENSORS3_EN 7U
139
#define PE08_UART7_TX 8U
140
#define PE09 9U
141
#define PE10_UART7_CTS 10U
142
#define PE11_FMU_CAP1 11U
143
#define PE12_SPI4_SCK 12U
144
#define PE13_SPI4_MISO 13U
145
#define PE14_SPI4_MOSI 14U
146
#define PE15_VDD_5V_PERIPH_OC 15U
147
148
#define PF00_I2C2_SDA 0U
149
#define PF01_I2C2_SCL 1U
150
#define PF02 2U
151
#define PF03_SPI4_DRDY1 3U
152
#define PF04_VDD_3V3_SENSORS2_EN 4U
153
#define PF05_SAFETY_IN 5U
154
#define PF06_UART7_RX 6U
155
#define PF07_SPI5_SCK 7U
156
#define PF08_UART7_RTS 8U
157
#define PF09_ALARM 9U
158
#define PF10 10U
159
#define PF11_SPI5_MOSI 11U
160
#define PF12_ADC4 12U
161
#define PF13_VDD_5V_HIPOWER_OC 13U
162
#define PF14_I2C4_SCL 14U
163
#define PF15_I2C4_SDA 15U
164
165
#define PG00_HW_VER_REV_DRIVE 0U
166
#define PG01_VDD_BRICK_VALID 1U
167
#define PG02_VDD_BRICK2_VALID 2U
168
#define PG03_VDD_BRICK3_VALID 3U
169
#define PG04_VDD_5V_PERIPH_EN 4U
170
#define PG05_DRDY1_BMP388 5U
171
#define PG06 6U
172
#define PG07_SPI_SLAVE6 7U
173
#define PG08_VDD_3V3_SENSORS4_EN 8U
174
#define PG09_SPI1_MISO 9U
175
#define PG10_VDD_5V_HIPOWER_EN 10U
176
#define PG11_SDIO_D2 11U
177
#define PG12_ETH_RMII_TXD1 12U
178
#define PG13_ETH_RMII_TXD0 13U
179
#define PG14_SPI6_MOSI 14U
180
#define PG15_ETH_POWER_EN 15U
181
182
#define PH00_OSC_IN 0U
183
#define PH01_OSC_OUT 1U
184
#define PH02_SPEKTRUM_PWR_EN 2U
185
#define PH03_HW_VER_SENS 3U
186
#define PH04_HW_REV_SENS 4U
187
#define PH05_SPI_SLAVE2 5U
188
#define PH06 6U
189
#define PH07_SPI5_MISO 7U
190
#define PH08_I2C3_SDA 8U
191
#define PH09 9U
192
#define PH10_SERVO4 10U
193
#define PH11_SERVO3 11U
194
#define PH12_SERVO2 12U
195
#define PH13_UART4_TX 13U
196
#define PH14_UART4_RX 14U
197
#define PH15_SPI_SLAVE5 15U
198
199
#define PI00_SERVO1 0U
200
#define PI01_SPI2_SCK 1U
201
#define PI02_SPI2_MISO 2U
202
#define PI03_SPI2_MOSI 3U
203
#define PI04_SPI_SLAVE3 4U
204
#define PI05_PWM_INPUT1 5U
205
#define PI06_SPI3_DRDY1 6U
206
#define PI07_SPI3_DRDY2 7U
207
#define PI08_SPI_SLAVE4 8U
208
#define PI09_SPI_SLAVE1 9U
209
#define PI10_SPI_SLAVE7 10U
210
#define PI11_VDD_3V3_SENSORS1_EN 11U
211
#define PI12 12U
212
#define PI13 13U
213
#define PI14 14U
214
#define PI15 15U
215
216
#define PJ00 0U
217
#define PJ01 1U
218
#define PJ02 2U
219
#define PJ03 3U
220
#define PJ04 4U
221
#define PJ05 5U
222
#define PJ06 6U
223
#define PJ07 7U
224
#define PJ08 8U
225
#define PJ09 9U
226
#define PJ10 10U
227
#define PJ11 11U
228
#define PJ12 12U
229
#define PJ13 13U
230
#define PJ14 14U
231
#define PJ15 15U
232
233
#define PK00 0U
234
#define PK01 1U
235
#define PK02 2U
236
#define PK03 3U
237
#define PK04 4U
238
#define PK05 5U
239
#define PK06 6U
240
#define PK07 7U
241
#define PK08 8U
242
#define PK09 9U
243
#define PK10 10U
244
#define PK11 11U
245
#define PK12 12U
246
#define PK13 13U
247
#define PK14 14U
248
#define PK15 15U
249
250
/*
251
* IO lines assignments.
252
*/
253
#define LINE_ADC1 PAL_LINE(GPIOA, 0U)
254
#define LINE_ETH_RMII_REF_CLK PAL_LINE(GPIOA, 1U)
255
#define LINE_ETH_MDIO PAL_LINE(GPIOA, 2U)
256
#define LINE_UART2 PAL_LINE(GPIOA, 3U)
257
#define LINE_ADC2 PAL_LINE(GPIOA, 4U)
258
#define LINE_SPI1_SCK PAL_LINE(GPIOA, 5U)
259
#define LINE_SPI6_MISO PAL_LINE(GPIOA, 6U)
260
#define LINE_ETH_RMII_CRS_DV PAL_LINE(GPIOA, 7U)
261
#define LINE_I2C3_SCL PAL_LINE(GPIOA, 8U)
262
#define LINE_USB_VBUS PAL_LINE(GPIOA, 9U)
263
#define LINE_SPI2_DRDY PAL_LINE(GPIOA, 10U)
264
#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
265
#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
266
#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
267
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
268
269
#define LINE_ADC3 PAL_LINE(GPIOB, 0U)
270
#define LINE_ADC5 PAL_LINE(GPIOB, 1U)
271
#define LINE_SPI3_MOSI PAL_LINE(GPIOB, 2U)
272
#define LINE_SPI6_SCK PAL_LINE(GPIOB, 3U)
273
#define LINE_SDIO_D3 PAL_LINE(GPIOB, 4U)
274
#define LINE_SPI1_MOSI PAL_LINE(GPIOB, 5U)
275
#define LINE_UART1_TX PAL_LINE(GPIOB, 6U)
276
#define LINE_UART1_RX PAL_LINE(GPIOB, 7U)
277
#define LINE_I2C1_SCL PAL_LINE(GPIOB, 8U)
278
#define LINE_I2C1_SDA PAL_LINE(GPIOB, 9U)
279
#define LINE_IMU_HEATER PAL_LINE(GPIOB, 10U)
280
#define LINE_ETH_RMII_TX_EN PAL_LINE(GPIOB, 11U)
281
#define LINE_CAN2_RX PAL_LINE(GPIOB, 12U)
282
#define LINE_CAN2_TX PAL_LINE(GPIOB, 13U)
283
#define LINE_SDIO_D0 PAL_LINE(GPIOB, 14U)
284
#define LINE_SDIO_D1 PAL_LINE(GPIOB, 15U)
285
286
#define LINE_NFC_GPIO PAL_LINE(GPIOC, 0U)
287
#define LINE_ETH_MDC PAL_LINE(GPIOC, 1U)
288
#define LINE_ADC6 PAL_LINE(GPIOC, 2U)
289
#define LINE_ADC7 PAL_LINE(GPIOC, 3U)
290
#define LINE_ETH_RMII_RXD0 PAL_LINE(GPIOC, 4U)
291
#define LINE_ETH_RMII_RXD1 PAL_LINE(GPIOC, 5U)
292
#define LINE_UART6_TX PAL_LINE(GPIOC, 6U)
293
#define LINE_UART6_RX PAL_LINE(GPIOC, 7U)
294
#define LINE_UART5_RTS PAL_LINE(GPIOC, 8U)
295
#define LINE_UART5_CTS PAL_LINE(GPIOC, 9U)
296
#define LINE_SPI3_SCK PAL_LINE(GPIOC, 10U)
297
#define LINE_SPI3_MISO PAL_LINE(GPIOC, 11U)
298
#define LINE_UART5_TX PAL_LINE(GPIOC, 12U)
299
#define LINE_VDD_3V3_SD_CARD_EN PAL_LINE(GPIOC, 13U)
300
301
#define LINE_CAN1_RX PAL_LINE(GPIOD, 0U)
302
#define LINE_CAN1_TX PAL_LINE(GPIOD, 1U)
303
#define LINE_UART5_RX PAL_LINE(GPIOD, 2U)
304
#define LINE_UART2_CTS PAL_LINE(GPIOD, 3U)
305
#define LINE_UART2_RTS PAL_LINE(GPIOD, 4U)
306
#define LINE_UART2_TX PAL_LINE(GPIOD, 5U)
307
#define LINE_SDIO_CK PAL_LINE(GPIOD, 6U)
308
#define LINE_SDIO_CMD PAL_LINE(GPIOD, 7U)
309
#define LINE_UART3_TX PAL_LINE(GPIOD, 8U)
310
#define LINE_UART3_RX PAL_LINE(GPIOD, 9U)
311
#define LINE_LED4 PAL_LINE(GPIOD, 10U)
312
#define LINE_SERVO5 PAL_LINE(GPIOD, 13U)
313
#define LINE_SERVO6 PAL_LINE(GPIOD, 14U)
314
315
#define LINE_UART8_RX PAL_LINE(GPIOE, 0U)
316
#define LINE_UART8_TX PAL_LINE(GPIOE, 1U)
317
#define LINE_LED1 PAL_LINE(GPIOE, 3U)
318
#define LINE_LED2 PAL_LINE(GPIOE, 4U)
319
#define LINE_LED3 PAL_LINE(GPIOE, 5U)
320
#define LINE_NARMED PAL_LINE(GPIOE, 6U)
321
#define LINE_VDD_3V3_SENSORS3_EN PAL_LINE(GPIOE, 7U)
322
#define LINE_UART7_TX PAL_LINE(GPIOE, 8U)
323
#define LINE_UART7_CTS PAL_LINE(GPIOE, 10U)
324
#define LINE_FMU_CAP1 PAL_LINE(GPIOE, 11U)
325
#define LINE_SPI4_SCK PAL_LINE(GPIOE, 12U)
326
#define LINE_SPI4_MISO PAL_LINE(GPIOE, 13U)
327
#define LINE_SPI4_MOSI PAL_LINE(GPIOE, 14U)
328
#define LINE_VDD_5V_PERIPH_OC PAL_LINE(GPIOE, 15U)
329
330
#define LINE_I2C2_SDA PAL_LINE(GPIOF, 0U)
331
#define LINE_I2C2_SCL PAL_LINE(GPIOF, 1U)
332
#define LINE_SPI4_DRDY1 PAL_LINE(GPIOF, 3U)
333
#define LINE_VDD_3V3_SENSORS2_EN PAL_LINE(GPIOF, 4U)
334
#define LINE_SAFETY_IN PAL_LINE(GPIOF, 5U)
335
#define LINE_UART7_RX PAL_LINE(GPIOF, 6U)
336
#define LINE_SPI5_SCK PAL_LINE(GPIOF, 7U)
337
#define LINE_UART7_RTS PAL_LINE(GPIOF, 8U)
338
#define LINE_ALARM PAL_LINE(GPIOF, 9U)
339
#define LINE_SPI5_MOSI PAL_LINE(GPIOF, 11U)
340
#define LINE_ADC4 PAL_LINE(GPIOF, 12U)
341
#define LINE_VDD_5V_HIPOWER_OC PAL_LINE(GPIOF, 13U)
342
#define LINE_I2C4_SCL PAL_LINE(GPIOF, 14U)
343
#define LINE_I2C4_SDA PAL_LINE(GPIOF, 15U)
344
345
#define LINE_HW_VER_REV_DRIVE PAL_LINE(GPIOG, 0U)
346
#define LINE_VDD_BRICK_VALID PAL_LINE(GPIOG, 1U)
347
#define LINE_VDD_BRICK2_VALID PAL_LINE(GPIOG, 2U)
348
#define LINE_VDD_BRICK3_VALID PAL_LINE(GPIOG, 3U)
349
#define LINE_VDD_5V_PERIPH_EN PAL_LINE(GPIOG, 4U)
350
#define LINE_DRDY1_BMP388 PAL_LINE(GPIOG, 5U)
351
#define LINE_SPI_SLAVE6 PAL_LINE(GPIOG, 7U)
352
#define LINE_VDD_3V3_SENSORS4_EN PAL_LINE(GPIOG, 8U)
353
#define LINE_SPI1_MISO PAL_LINE(GPIOG, 9U)
354
#define LINE_VDD_5V_HIPOWER_EN PAL_LINE(GPIOG, 10U)
355
#define LINE_SDIO_D2 PAL_LINE(GPIOG, 11U)
356
#define LINE_ETH_RMII_TXD1 PAL_LINE(GPIOG, 12U)
357
#define LINE_ETH_RMII_TXD0 PAL_LINE(GPIOG, 13U)
358
#define LINE_SPI6_MOSI PAL_LINE(GPIOG, 14U)
359
#define LINE_ETH_POWER_EN PAL_LINE(GPIOG, 15U)
360
361
#define LINE_OSC_IN PAL_LINE(GPIOH, 0U)
362
#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U)
363
#define LINE_SPEKTRUM_PWR_EN PAL_LINE(GPIOH, 2U)
364
#define LINE_HW_VER_SENS PAL_LINE(GPIOH, 3U)
365
#define LINE_HW_REV_SENS PAL_LINE(GPIOH, 4U)
366
#define LINE_SPI_SLAVE2 PAL_LINE(GPIOH, 5U)
367
#define LINE_SPI5_MISO PAL_LINE(GPIOH, 7U)
368
#define LINE_I2C3_SDA PAL_LINE(GPIOH, 8U)
369
#define LINE_SERVO4 PAL_LINE(GPIOH, 10U)
370
#define LINE_SERVO3 PAL_LINE(GPIOH, 11U)
371
#define LINE_SERVO2 PAL_LINE(GPIOH, 12U)
372
#define LINE_UART4_TX PAL_LINE(GPIOH, 13U)
373
#define LINE_UART4_RX PAL_LINE(GPIOH, 14U)
374
#define LINE_SPI_SLAVE5 PAL_LINE(GPIOH, 15U)
375
376
#define LINE_SERVO1 PAL_LINE(GPIOI, 0U)
377
#define LINE_SPI2_SCK PAL_LINE(GPIOI, 1U)
378
#define LINE_SPI2_MISO PAL_LINE(GPIOI, 2U)
379
#define LINE_SPI2_MOSI PAL_LINE(GPIOI, 3U)
380
#define LINE_SPI_SLAVE3 PAL_LINE(GPIOI, 4U)
381
#define LINE_PWM_INPUT1 PAL_LINE(GPIOI, 5U)
382
#define LINE_SPI3_DRDY1 PAL_LINE(GPIOI, 6U)
383
#define LINE_SPI3_DRDY2 PAL_LINE(GPIOI, 7U)
384
#define LINE_SPI_SLAVE4 PAL_LINE(GPIOI, 8U)
385
#define LINE_SPI_SLAVE1 PAL_LINE(GPIOI, 9U)
386
#define LINE_SPI_SLAVE7 PAL_LINE(GPIOI, 10U)
387
#define LINE_VDD_3V3_SENSORS1_EN PAL_LINE(GPIOI, 11U)
388
389
390
/*
391
* I/O ports initial setup, this configuration is established soon after reset
392
* in the initialization code.
393
* Please refer to the STM32 Reference Manual for details.
394
*/
395
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
396
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
397
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
398
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
399
#define PIN_ODR_LEVEL_LOW(n) (0U << (n))
400
#define PIN_ODR_LEVEL_HIGH(n) (1U << (n))
401
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
402
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
403
#define PIN_OSPEED_SPEED_VERYLOW(n) (0U << ((n) * 2U))
404
#define PIN_OSPEED_SPEED_LOW(n) (1U << ((n) * 2U))
405
#define PIN_OSPEED_SPEED_MEDIUM(n) (2U << ((n) * 2U))
406
#define PIN_OSPEED_SPEED_HIGH(n) (3U << ((n) * 2U))
407
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
408
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
409
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
410
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
411
412
#define VAL_GPIOA_MODER (PIN_MODE_ANALOG(PA00_ADC1) | \
413
PIN_MODE_INPUT(PA01_ETH_RMII_REF_CLK) | \
414
PIN_MODE_INPUT(PA02_ETH_MDIO) | \
415
PIN_MODE_ALTERNATE(PA03_UART2) | \
416
PIN_MODE_ANALOG(PA04_ADC2) | \
417
PIN_MODE_ALTERNATE(PA05_SPI1_SCK) | \
418
PIN_MODE_ALTERNATE(PA06_SPI6_MISO) | \
419
PIN_MODE_INPUT(PA07_ETH_RMII_CRS_DV) | \
420
PIN_MODE_ALTERNATE(PA08_I2C3_SCL) | \
421
PIN_MODE_INPUT(PA09_USB_VBUS) | \
422
PIN_MODE_INPUT(PA10_SPI2_DRDY) | \
423
PIN_MODE_ALTERNATE(PA11_USB_DM) | \
424
PIN_MODE_ALTERNATE(PA12_USB_DP) | \
425
PIN_MODE_ALTERNATE(PA13_SWDIO) | \
426
PIN_MODE_ALTERNATE(PA14_SWCLK) | \
427
PIN_MODE_INPUT(PA15))
412
#define VAL_GPIOA_MODER (PIN_MODE_ANALOG(PA00_ADC1) | \
…
428
429
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(PA00_ADC1) | \
430
PIN_OTYPE_OPENDRAIN(PA01_ETH_RMII_REF_CLK) | \
431
PIN_OTYPE_OPENDRAIN(PA02_ETH_MDIO) | \
432
PIN_OTYPE_PUSHPULL(PA03_UART2) | \
433
PIN_OTYPE_PUSHPULL(PA04_ADC2) | \
434
PIN_OTYPE_PUSHPULL(PA05_SPI1_SCK) | \
435
PIN_OTYPE_PUSHPULL(PA06_SPI6_MISO) | \
436
PIN_OTYPE_OPENDRAIN(PA07_ETH_RMII_CRS_DV) | \
437
PIN_OTYPE_OPENDRAIN(PA08_I2C3_SCL) | \
438
PIN_OTYPE_OPENDRAIN(PA09_USB_VBUS) | \
439
PIN_OTYPE_OPENDRAIN(PA10_SPI2_DRDY) | \
440
PIN_OTYPE_PUSHPULL(PA11_USB_DM) | \
441
PIN_OTYPE_PUSHPULL(PA12_USB_DP) | \
442
PIN_OTYPE_PUSHPULL(PA13_SWDIO) | \
443
PIN_OTYPE_PUSHPULL(PA14_SWCLK) | \
444
PIN_OTYPE_PUSHPULL(PA15))
429
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(PA00_ADC1) | \
…
445
446
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PA00_ADC1) | \
447
PIN_OSPEED_SPEED_VERYLOW(PA01_ETH_RMII_REF_CLK) | \
448
PIN_OSPEED_SPEED_VERYLOW(PA02_ETH_MDIO) | \
449
PIN_OSPEED_SPEED_HIGH(PA03_UART2) | \
450
PIN_OSPEED_SPEED_VERYLOW(PA04_ADC2) | \
451
PIN_OSPEED_SPEED_HIGH(PA05_SPI1_SCK) | \
452
PIN_OSPEED_SPEED_HIGH(PA06_SPI6_MISO) | \
453
PIN_OSPEED_SPEED_VERYLOW(PA07_ETH_RMII_CRS_DV) | \
454
PIN_OSPEED_SPEED_HIGH(PA08_I2C3_SCL) | \
455
PIN_OSPEED_SPEED_VERYLOW(PA09_USB_VBUS) | \
456
PIN_OSPEED_SPEED_VERYLOW(PA10_SPI2_DRDY) | \
457
PIN_OSPEED_SPEED_HIGH(PA11_USB_DM) | \
458
PIN_OSPEED_SPEED_HIGH(PA12_USB_DP) | \
459
PIN_OSPEED_SPEED_HIGH(PA13_SWDIO) | \
460
PIN_OSPEED_SPEED_HIGH(PA14_SWCLK) | \
461
PIN_OSPEED_SPEED_VERYLOW(PA15))
446
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PA00_ADC1) | \
…
462
463
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(PA00_ADC1) | \
464
PIN_PUPDR_PULLDOWN(PA01_ETH_RMII_REF_CLK) | \
465
PIN_PUPDR_PULLDOWN(PA02_ETH_MDIO) | \
466
PIN_PUPDR_FLOATING(PA03_UART2) | \
467
PIN_PUPDR_FLOATING(PA04_ADC2) | \
468
PIN_PUPDR_FLOATING(PA05_SPI1_SCK) | \
469
PIN_PUPDR_FLOATING(PA06_SPI6_MISO) | \
470
PIN_PUPDR_PULLDOWN(PA07_ETH_RMII_CRS_DV) | \
471
PIN_PUPDR_PULLUP(PA08_I2C3_SCL) | \
472
PIN_PUPDR_PULLDOWN(PA09_USB_VBUS) | \
473
PIN_PUPDR_PULLDOWN(PA10_SPI2_DRDY) | \
474
PIN_PUPDR_FLOATING(PA11_USB_DM) | \
475
PIN_PUPDR_FLOATING(PA12_USB_DP) | \
476
PIN_PUPDR_FLOATING(PA13_SWDIO) | \
477
PIN_PUPDR_FLOATING(PA14_SWCLK) | \
478
PIN_PUPDR_PULLDOWN(PA15))
463
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(PA00_ADC1) | \
…
479
480
#define VAL_GPIOA_ODR (PIN_ODR_LEVEL_LOW(PA00_ADC1) | \
481
PIN_ODR_LEVEL_HIGH(PA01_ETH_RMII_REF_CLK) | \
482
PIN_ODR_LEVEL_HIGH(PA02_ETH_MDIO) | \
483
PIN_ODR_LEVEL_HIGH(PA03_UART2) | \
484
PIN_ODR_LEVEL_LOW(PA04_ADC2) | \
485
PIN_ODR_LEVEL_HIGH(PA05_SPI1_SCK) | \
486
PIN_ODR_LEVEL_HIGH(PA06_SPI6_MISO) | \
487
PIN_ODR_LEVEL_HIGH(PA07_ETH_RMII_CRS_DV) | \
488
PIN_ODR_LEVEL_HIGH(PA08_I2C3_SCL) | \
489
PIN_ODR_LEVEL_LOW(PA09_USB_VBUS) | \
490
PIN_ODR_LEVEL_HIGH(PA10_SPI2_DRDY) | \
491
PIN_ODR_LEVEL_HIGH(PA11_USB_DM) | \
492
PIN_ODR_LEVEL_HIGH(PA12_USB_DP) | \
493
PIN_ODR_LEVEL_HIGH(PA13_SWDIO) | \
494
PIN_ODR_LEVEL_HIGH(PA14_SWCLK) | \
495
PIN_ODR_LEVEL_LOW(PA15))
480
#define VAL_GPIOA_ODR (PIN_ODR_LEVEL_LOW(PA00_ADC1) | \
…
496
497
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(PA00_ADC1, 0) | \
498
PIN_AFIO_AF(PA01_ETH_RMII_REF_CLK, 0) | \
499
PIN_AFIO_AF(PA02_ETH_MDIO, 0) | \
500
PIN_AFIO_AF(PA03_UART2, 7) | \
501
PIN_AFIO_AF(PA04_ADC2, 0) | \
502
PIN_AFIO_AF(PA05_SPI1_SCK, 5) | \
503
PIN_AFIO_AF(PA06_SPI6_MISO, 8) | \
504
PIN_AFIO_AF(PA07_ETH_RMII_CRS_DV, 0))
497
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(PA00_ADC1, 0) | \
…
505
506
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(PA08_I2C3_SCL, 4) | \
507
PIN_AFIO_AF(PA09_USB_VBUS, 0) | \
508
PIN_AFIO_AF(PA10_SPI2_DRDY, 0) | \
509
PIN_AFIO_AF(PA11_USB_DM, 10) | \
510
PIN_AFIO_AF(PA12_USB_DP, 10) | \
511
PIN_AFIO_AF(PA13_SWDIO, 0) | \
512
PIN_AFIO_AF(PA14_SWCLK, 0) | \
513
PIN_AFIO_AF(PA15, 0))
506
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(PA08_I2C3_SCL, 4) | \
…
514
515
#define VAL_GPIOB_MODER (PIN_MODE_ANALOG(PB00_ADC3) | \
516
PIN_MODE_ANALOG(PB01_ADC5) | \
517
PIN_MODE_ALTERNATE(PB02_SPI3_MOSI) | \
518
PIN_MODE_ALTERNATE(PB03_SPI6_SCK) | \
519
PIN_MODE_ALTERNATE(PB04_SDIO_D3) | \
520
PIN_MODE_ALTERNATE(PB05_SPI1_MOSI) | \
521
PIN_MODE_ALTERNATE(PB06_UART1_TX) | \
522
PIN_MODE_ALTERNATE(PB07_UART1_RX) | \
523
PIN_MODE_ALTERNATE(PB08_I2C1_SCL) | \
524
PIN_MODE_ALTERNATE(PB09_I2C1_SDA) | \
525
PIN_MODE_OUTPUT(PB10_IMU_HEATER) | \
526
PIN_MODE_INPUT(PB11_ETH_RMII_TX_EN) | \
527
PIN_MODE_ALTERNATE(PB12_CAN2_RX) | \
528
PIN_MODE_ALTERNATE(PB13_CAN2_TX) | \
529
PIN_MODE_ALTERNATE(PB14_SDIO_D0) | \
530
PIN_MODE_ALTERNATE(PB15_SDIO_D1))
515
#define VAL_GPIOB_MODER (PIN_MODE_ANALOG(PB00_ADC3) | \
…
531
532
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(PB00_ADC3) | \
533
PIN_OTYPE_PUSHPULL(PB01_ADC5) | \
534
PIN_OTYPE_PUSHPULL(PB02_SPI3_MOSI) | \
535
PIN_OTYPE_PUSHPULL(PB03_SPI6_SCK) | \
536
PIN_OTYPE_PUSHPULL(PB04_SDIO_D3) | \
537
PIN_OTYPE_PUSHPULL(PB05_SPI1_MOSI) | \
538
PIN_OTYPE_PUSHPULL(PB06_UART1_TX) | \
539
PIN_OTYPE_PUSHPULL(PB07_UART1_RX) | \
540
PIN_OTYPE_OPENDRAIN(PB08_I2C1_SCL) | \
541
PIN_OTYPE_OPENDRAIN(PB09_I2C1_SDA) | \
542
PIN_OTYPE_PUSHPULL(PB10_IMU_HEATER) | \
543
PIN_OTYPE_OPENDRAIN(PB11_ETH_RMII_TX_EN) | \
544
PIN_OTYPE_PUSHPULL(PB12_CAN2_RX) | \
545
PIN_OTYPE_PUSHPULL(PB13_CAN2_TX) | \
546
PIN_OTYPE_PUSHPULL(PB14_SDIO_D0) | \
547
PIN_OTYPE_PUSHPULL(PB15_SDIO_D1))
532
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(PB00_ADC3) | \
…
548
549
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PB00_ADC3) | \
550
PIN_OSPEED_SPEED_VERYLOW(PB01_ADC5) | \
551
PIN_OSPEED_SPEED_HIGH(PB02_SPI3_MOSI) | \
552
PIN_OSPEED_SPEED_HIGH(PB03_SPI6_SCK) | \
553
PIN_OSPEED_SPEED_HIGH(PB04_SDIO_D3) | \
554
PIN_OSPEED_SPEED_HIGH(PB05_SPI1_MOSI) | \
555
PIN_OSPEED_SPEED_HIGH(PB06_UART1_TX) | \
556
PIN_OSPEED_SPEED_HIGH(PB07_UART1_RX) | \
557
PIN_OSPEED_SPEED_HIGH(PB08_I2C1_SCL) | \
558
PIN_OSPEED_SPEED_HIGH(PB09_I2C1_SDA) | \
559
PIN_OSPEED_SPEED_HIGH(PB10_IMU_HEATER) | \
560
PIN_OSPEED_SPEED_VERYLOW(PB11_ETH_RMII_TX_EN) | \
561
PIN_OSPEED_SPEED_HIGH(PB12_CAN2_RX) | \
562
PIN_OSPEED_SPEED_HIGH(PB13_CAN2_TX) | \
563
PIN_OSPEED_SPEED_HIGH(PB14_SDIO_D0) | \
564
PIN_OSPEED_SPEED_HIGH(PB15_SDIO_D1))
549
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PB00_ADC3) | \
…
565
566
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(PB00_ADC3) | \
567
PIN_PUPDR_FLOATING(PB01_ADC5) | \
568
PIN_PUPDR_FLOATING(PB02_SPI3_MOSI) | \
569
PIN_PUPDR_FLOATING(PB03_SPI6_SCK) | \
570
PIN_PUPDR_PULLUP(PB04_SDIO_D3) | \
571
PIN_PUPDR_FLOATING(PB05_SPI1_MOSI) | \
572
PIN_PUPDR_FLOATING(PB06_UART1_TX) | \
573
PIN_PUPDR_FLOATING(PB07_UART1_RX) | \
574
PIN_PUPDR_PULLUP(PB08_I2C1_SCL) | \
575
PIN_PUPDR_PULLUP(PB09_I2C1_SDA) | \
576
PIN_PUPDR_FLOATING(PB10_IMU_HEATER) | \
577
PIN_PUPDR_PULLDOWN(PB11_ETH_RMII_TX_EN) | \
578
PIN_PUPDR_FLOATING(PB12_CAN2_RX) | \
579
PIN_PUPDR_FLOATING(PB13_CAN2_TX) | \
580
PIN_PUPDR_PULLUP(PB14_SDIO_D0) | \
581
PIN_PUPDR_PULLUP(PB15_SDIO_D1))
566
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(PB00_ADC3) | \
…
582
583
#define VAL_GPIOB_ODR (PIN_ODR_LEVEL_LOW(PB00_ADC3) | \
584
PIN_ODR_LEVEL_LOW(PB01_ADC5) | \
585
PIN_ODR_LEVEL_HIGH(PB02_SPI3_MOSI) | \
586
PIN_ODR_LEVEL_HIGH(PB03_SPI6_SCK) | \
587
PIN_ODR_LEVEL_HIGH(PB04_SDIO_D3) | \
588
PIN_ODR_LEVEL_HIGH(PB05_SPI1_MOSI) | \
589
PIN_ODR_LEVEL_HIGH(PB06_UART1_TX) | \
590
PIN_ODR_LEVEL_HIGH(PB07_UART1_RX) | \
591
PIN_ODR_LEVEL_HIGH(PB08_I2C1_SCL) | \
592
PIN_ODR_LEVEL_HIGH(PB09_I2C1_SDA) | \
593
PIN_ODR_LEVEL_LOW(PB10_IMU_HEATER) | \
594
PIN_ODR_LEVEL_HIGH(PB11_ETH_RMII_TX_EN) | \
595
PIN_ODR_LEVEL_HIGH(PB12_CAN2_RX) | \
596
PIN_ODR_LEVEL_HIGH(PB13_CAN2_TX) | \
597
PIN_ODR_LEVEL_HIGH(PB14_SDIO_D0) | \
598
PIN_ODR_LEVEL_HIGH(PB15_SDIO_D1))
583
#define VAL_GPIOB_ODR (PIN_ODR_LEVEL_LOW(PB00_ADC3) | \
…
599
600
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(PB00_ADC3, 0) | \
601
PIN_AFIO_AF(PB01_ADC5, 0) | \
602
PIN_AFIO_AF(PB02_SPI3_MOSI, 7) | \
603
PIN_AFIO_AF(PB03_SPI6_SCK, 8) | \
604
PIN_AFIO_AF(PB04_SDIO_D3, 9) | \
605
PIN_AFIO_AF(PB05_SPI1_MOSI, 5) | \
606
PIN_AFIO_AF(PB06_UART1_TX, 7) | \
607
PIN_AFIO_AF(PB07_UART1_RX, 7))
600
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(PB00_ADC3, 0) | \
…
608
609
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(PB08_I2C1_SCL, 4) | \
610
PIN_AFIO_AF(PB09_I2C1_SDA, 4) | \
611
PIN_AFIO_AF(PB10_IMU_HEATER, 0) | \
612
PIN_AFIO_AF(PB11_ETH_RMII_TX_EN, 0) | \
613
PIN_AFIO_AF(PB12_CAN2_RX, 9) | \
614
PIN_AFIO_AF(PB13_CAN2_TX, 9) | \
615
PIN_AFIO_AF(PB14_SDIO_D0, 9) | \
616
PIN_AFIO_AF(PB15_SDIO_D1, 9))
609
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(PB08_I2C1_SCL, 4) | \
…
617
618
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(PC00_NFC_GPIO) | \
619
PIN_MODE_INPUT(PC01_ETH_MDC) | \
620
PIN_MODE_ANALOG(PC02_ADC6) | \
621
PIN_MODE_ANALOG(PC03_ADC7) | \
622
PIN_MODE_INPUT(PC04_ETH_RMII_RXD0) | \
623
PIN_MODE_INPUT(PC05_ETH_RMII_RXD1) | \
624
PIN_MODE_ALTERNATE(PC06_UART6_TX) | \
625
PIN_MODE_ALTERNATE(PC07_UART6_RX) | \
626
PIN_MODE_INPUT(PC08_UART5_RTS) | \
627
PIN_MODE_INPUT(PC09_UART5_CTS) | \
628
PIN_MODE_ALTERNATE(PC10_SPI3_SCK) | \
629
PIN_MODE_ALTERNATE(PC11_SPI3_MISO) | \
630
PIN_MODE_ALTERNATE(PC12_UART5_TX) | \
631
PIN_MODE_OUTPUT(PC13_VDD_3V3_SD_CARD_EN) | \
632
PIN_MODE_INPUT(PC14) | \
633
PIN_MODE_INPUT(PC15))
618
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(PC00_NFC_GPIO) | \
…
634
635
#define VAL_GPIOC_OTYPER (PIN_OTYPE_OPENDRAIN(PC00_NFC_GPIO) | \
636
PIN_OTYPE_OPENDRAIN(PC01_ETH_MDC) | \
637
PIN_OTYPE_PUSHPULL(PC02_ADC6) | \
638
PIN_OTYPE_PUSHPULL(PC03_ADC7) | \
639
PIN_OTYPE_OPENDRAIN(PC04_ETH_RMII_RXD0) | \
640
PIN_OTYPE_OPENDRAIN(PC05_ETH_RMII_RXD1) | \
641
PIN_OTYPE_PUSHPULL(PC06_UART6_TX) | \
642
PIN_OTYPE_PUSHPULL(PC07_UART6_RX) | \
643
PIN_OTYPE_OPENDRAIN(PC08_UART5_RTS) | \
644
PIN_OTYPE_OPENDRAIN(PC09_UART5_CTS) | \
645
PIN_OTYPE_PUSHPULL(PC10_SPI3_SCK) | \
646
PIN_OTYPE_PUSHPULL(PC11_SPI3_MISO) | \
647
PIN_OTYPE_PUSHPULL(PC12_UART5_TX) | \
648
PIN_OTYPE_PUSHPULL(PC13_VDD_3V3_SD_CARD_EN) | \
649
PIN_OTYPE_PUSHPULL(PC14) | \
650
PIN_OTYPE_PUSHPULL(PC15))
635
#define VAL_GPIOC_OTYPER (PIN_OTYPE_OPENDRAIN(PC00_NFC_GPIO) | \
…
651
652
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PC00_NFC_GPIO) | \
653
PIN_OSPEED_SPEED_VERYLOW(PC01_ETH_MDC) | \
654
PIN_OSPEED_SPEED_VERYLOW(PC02_ADC6) | \
655
PIN_OSPEED_SPEED_VERYLOW(PC03_ADC7) | \
656
PIN_OSPEED_SPEED_VERYLOW(PC04_ETH_RMII_RXD0) | \
657
PIN_OSPEED_SPEED_VERYLOW(PC05_ETH_RMII_RXD1) | \
658
PIN_OSPEED_SPEED_HIGH(PC06_UART6_TX) | \
659
PIN_OSPEED_SPEED_HIGH(PC07_UART6_RX) | \
660
PIN_OSPEED_SPEED_VERYLOW(PC08_UART5_RTS) | \
661
PIN_OSPEED_SPEED_VERYLOW(PC09_UART5_CTS) | \
662
PIN_OSPEED_SPEED_HIGH(PC10_SPI3_SCK) | \
663
PIN_OSPEED_SPEED_HIGH(PC11_SPI3_MISO) | \
664
PIN_OSPEED_SPEED_HIGH(PC12_UART5_TX) | \
665
PIN_OSPEED_SPEED_VERYLOW(PC13_VDD_3V3_SD_CARD_EN) | \
666
PIN_OSPEED_SPEED_VERYLOW(PC14) | \
667
PIN_OSPEED_SPEED_VERYLOW(PC15))
652
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PC00_NFC_GPIO) | \
…
668
669
#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLDOWN(PC00_NFC_GPIO) | \
670
PIN_PUPDR_PULLDOWN(PC01_ETH_MDC) | \
671
PIN_PUPDR_FLOATING(PC02_ADC6) | \
672
PIN_PUPDR_FLOATING(PC03_ADC7) | \
673
PIN_PUPDR_PULLDOWN(PC04_ETH_RMII_RXD0) | \
674
PIN_PUPDR_PULLDOWN(PC05_ETH_RMII_RXD1) | \
675
PIN_PUPDR_FLOATING(PC06_UART6_TX) | \
676
PIN_PUPDR_FLOATING(PC07_UART6_RX) | \
677
PIN_PUPDR_PULLDOWN(PC08_UART5_RTS) | \
678
PIN_PUPDR_PULLDOWN(PC09_UART5_CTS) | \
679
PIN_PUPDR_FLOATING(PC10_SPI3_SCK) | \
680
PIN_PUPDR_FLOATING(PC11_SPI3_MISO) | \
681
PIN_PUPDR_FLOATING(PC12_UART5_TX) | \
682
PIN_PUPDR_FLOATING(PC13_VDD_3V3_SD_CARD_EN) | \
683
PIN_PUPDR_PULLDOWN(PC14) | \
684
PIN_PUPDR_PULLDOWN(PC15))
669
#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLDOWN(PC00_NFC_GPIO) | \
…
685
686
#define VAL_GPIOC_ODR (PIN_ODR_LEVEL_HIGH(PC00_NFC_GPIO) | \
687
PIN_ODR_LEVEL_HIGH(PC01_ETH_MDC) | \
688
PIN_ODR_LEVEL_LOW(PC02_ADC6) | \
689
PIN_ODR_LEVEL_LOW(PC03_ADC7) | \
690
PIN_ODR_LEVEL_HIGH(PC04_ETH_RMII_RXD0) | \
691
PIN_ODR_LEVEL_HIGH(PC05_ETH_RMII_RXD1) | \
692
PIN_ODR_LEVEL_HIGH(PC06_UART6_TX) | \
693
PIN_ODR_LEVEL_HIGH(PC07_UART6_RX) | \
694
PIN_ODR_LEVEL_HIGH(PC08_UART5_RTS) | \
695
PIN_ODR_LEVEL_HIGH(PC09_UART5_CTS) | \
696
PIN_ODR_LEVEL_HIGH(PC10_SPI3_SCK) | \
697
PIN_ODR_LEVEL_HIGH(PC11_SPI3_MISO) | \
698
PIN_ODR_LEVEL_HIGH(PC12_UART5_TX) | \
699
PIN_ODR_LEVEL_HIGH(PC13_VDD_3V3_SD_CARD_EN) | \
700
PIN_ODR_LEVEL_LOW(PC14) | \
701
PIN_ODR_LEVEL_LOW(PC15))
686
#define VAL_GPIOC_ODR (PIN_ODR_LEVEL_HIGH(PC00_NFC_GPIO) | \
…
702
703
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(PC00_NFC_GPIO, 0) | \
704
PIN_AFIO_AF(PC01_ETH_MDC, 0) | \
705
PIN_AFIO_AF(PC02_ADC6, 0) | \
706
PIN_AFIO_AF(PC03_ADC7, 0) | \
707
PIN_AFIO_AF(PC04_ETH_RMII_RXD0, 0) | \
708
PIN_AFIO_AF(PC05_ETH_RMII_RXD1, 0) | \
709
PIN_AFIO_AF(PC06_UART6_TX, 7) | \
710
PIN_AFIO_AF(PC07_UART6_RX, 7))
703
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(PC00_NFC_GPIO, 0) | \
…
711
712
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(PC08_UART5_RTS, 0) | \
713
PIN_AFIO_AF(PC09_UART5_CTS, 0) | \
714
PIN_AFIO_AF(PC10_SPI3_SCK, 6) | \
715
PIN_AFIO_AF(PC11_SPI3_MISO, 6) | \
716
PIN_AFIO_AF(PC12_UART5_TX, 8) | \
717
PIN_AFIO_AF(PC13_VDD_3V3_SD_CARD_EN, 0) | \
718
PIN_AFIO_AF(PC14, 0) | \
719
PIN_AFIO_AF(PC15, 0))
712
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(PC08_UART5_RTS, 0) | \
…
720
721
#define VAL_GPIOD_MODER (PIN_MODE_ALTERNATE(PD00_CAN1_RX) | \
722
PIN_MODE_ALTERNATE(PD01_CAN1_TX) | \
723
PIN_MODE_ALTERNATE(PD02_UART5_RX) | \
724
PIN_MODE_INPUT(PD03_UART2_CTS) | \
725
PIN_MODE_INPUT(PD04_UART2_RTS) | \
726
PIN_MODE_ALTERNATE(PD05_UART2_TX) | \
727
PIN_MODE_ALTERNATE(PD06_SDIO_CK) | \
728
PIN_MODE_ALTERNATE(PD07_SDIO_CMD) | \
729
PIN_MODE_ALTERNATE(PD08_UART3_TX) | \
730
PIN_MODE_ALTERNATE(PD09_UART3_RX) | \
731
PIN_MODE_OUTPUT(PD10_LED4) | \
732
PIN_MODE_INPUT(PD11) | \
733
PIN_MODE_INPUT(PD12) | \
734
PIN_MODE_ALTERNATE(PD13_SERVO5) | \
735
PIN_MODE_ALTERNATE(PD14_SERVO6) | \
736
PIN_MODE_INPUT(PD15))
721
#define VAL_GPIOD_MODER (PIN_MODE_ALTERNATE(PD00_CAN1_RX) | \
…
737
738
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(PD00_CAN1_RX) | \
739
PIN_OTYPE_PUSHPULL(PD01_CAN1_TX) | \
740
PIN_OTYPE_PUSHPULL(PD02_UART5_RX) | \
741
PIN_OTYPE_OPENDRAIN(PD03_UART2_CTS) | \
742
PIN_OTYPE_OPENDRAIN(PD04_UART2_RTS) | \
743
PIN_OTYPE_PUSHPULL(PD05_UART2_TX) | \
744
PIN_OTYPE_PUSHPULL(PD06_SDIO_CK) | \
745
PIN_OTYPE_PUSHPULL(PD07_SDIO_CMD) | \
746
PIN_OTYPE_PUSHPULL(PD08_UART3_TX) | \
747
PIN_OTYPE_PUSHPULL(PD09_UART3_RX) | \
748
PIN_OTYPE_PUSHPULL(PD10_LED4) | \
749
PIN_OTYPE_PUSHPULL(PD11) | \
750
PIN_OTYPE_PUSHPULL(PD12) | \
751
PIN_OTYPE_PUSHPULL(PD13_SERVO5) | \
752
PIN_OTYPE_PUSHPULL(PD14_SERVO6) | \
753
PIN_OTYPE_PUSHPULL(PD15))
738
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(PD00_CAN1_RX) | \
…
754
755
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PD00_CAN1_RX) | \
756
PIN_OSPEED_SPEED_HIGH(PD01_CAN1_TX) | \
757
PIN_OSPEED_SPEED_HIGH(PD02_UART5_RX) | \
758
PIN_OSPEED_SPEED_VERYLOW(PD03_UART2_CTS) | \
759
PIN_OSPEED_SPEED_VERYLOW(PD04_UART2_RTS) | \
760
PIN_OSPEED_SPEED_HIGH(PD05_UART2_TX) | \
761
PIN_OSPEED_SPEED_HIGH(PD06_SDIO_CK) | \
762
PIN_OSPEED_SPEED_HIGH(PD07_SDIO_CMD) | \
763
PIN_OSPEED_SPEED_HIGH(PD08_UART3_TX) | \
764
PIN_OSPEED_SPEED_HIGH(PD09_UART3_RX) | \
765
PIN_OSPEED_SPEED_VERYLOW(PD10_LED4) | \
766
PIN_OSPEED_SPEED_VERYLOW(PD11) | \
767
PIN_OSPEED_SPEED_VERYLOW(PD12) | \
768
PIN_OSPEED_SPEED_HIGH(PD13_SERVO5) | \
769
PIN_OSPEED_SPEED_HIGH(PD14_SERVO6) | \
770
PIN_OSPEED_SPEED_VERYLOW(PD15))
755
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PD00_CAN1_RX) | \
…
771
772
#define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(PD00_CAN1_RX) | \
773
PIN_PUPDR_FLOATING(PD01_CAN1_TX) | \
774
PIN_PUPDR_FLOATING(PD02_UART5_RX) | \
775
PIN_PUPDR_PULLDOWN(PD03_UART2_CTS) | \
776
PIN_PUPDR_PULLDOWN(PD04_UART2_RTS) | \
777
PIN_PUPDR_FLOATING(PD05_UART2_TX) | \
778
PIN_PUPDR_PULLUP(PD06_SDIO_CK) | \
779
PIN_PUPDR_PULLUP(PD07_SDIO_CMD) | \
780
PIN_PUPDR_FLOATING(PD08_UART3_TX) | \
781
PIN_PUPDR_FLOATING(PD09_UART3_RX) | \
782
PIN_PUPDR_FLOATING(PD10_LED4) | \
783
PIN_PUPDR_PULLDOWN(PD11) | \
784
PIN_PUPDR_PULLDOWN(PD12) | \
785
PIN_PUPDR_FLOATING(PD13_SERVO5) | \
786
PIN_PUPDR_FLOATING(PD14_SERVO6) | \
787
PIN_PUPDR_PULLDOWN(PD15))
772
#define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(PD00_CAN1_RX) | \
…
788
789
#define VAL_GPIOD_ODR (PIN_ODR_LEVEL_HIGH(PD00_CAN1_RX) | \
790
PIN_ODR_LEVEL_HIGH(PD01_CAN1_TX) | \
791
PIN_ODR_LEVEL_HIGH(PD02_UART5_RX) | \
792
PIN_ODR_LEVEL_HIGH(PD03_UART2_CTS) | \
793
PIN_ODR_LEVEL_HIGH(PD04_UART2_RTS) | \
794
PIN_ODR_LEVEL_HIGH(PD05_UART2_TX) | \
795
PIN_ODR_LEVEL_HIGH(PD06_SDIO_CK) | \
796
PIN_ODR_LEVEL_HIGH(PD07_SDIO_CMD) | \
797
PIN_ODR_LEVEL_HIGH(PD08_UART3_TX) | \
798
PIN_ODR_LEVEL_HIGH(PD09_UART3_RX) | \
799
PIN_ODR_LEVEL_LOW(PD10_LED4) | \
800
PIN_ODR_LEVEL_LOW(PD11) | \
801
PIN_ODR_LEVEL_LOW(PD12) | \
802
PIN_ODR_LEVEL_LOW(PD13_SERVO5) | \
803
PIN_ODR_LEVEL_LOW(PD14_SERVO6) | \
804
PIN_ODR_LEVEL_LOW(PD15))
789
#define VAL_GPIOD_ODR (PIN_ODR_LEVEL_HIGH(PD00_CAN1_RX) | \
…
805
806
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(PD00_CAN1_RX, 9) | \
807
PIN_AFIO_AF(PD01_CAN1_TX, 9) | \
808
PIN_AFIO_AF(PD02_UART5_RX, 8) | \
809
PIN_AFIO_AF(PD03_UART2_CTS, 0) | \
810
PIN_AFIO_AF(PD04_UART2_RTS, 0) | \
811
PIN_AFIO_AF(PD05_UART2_TX, 7) | \
812
PIN_AFIO_AF(PD06_SDIO_CK, 11) | \
813
PIN_AFIO_AF(PD07_SDIO_CMD, 11))
806
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(PD00_CAN1_RX, 9) | \
…
814
815
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(PD08_UART3_TX, 7) | \
816
PIN_AFIO_AF(PD09_UART3_RX, 7) | \
817
PIN_AFIO_AF(PD10_LED4, 0) | \
818
PIN_AFIO_AF(PD11, 0) | \
819
PIN_AFIO_AF(PD12, 0) | \
820
PIN_AFIO_AF(PD13_SERVO5, 2) | \
821
PIN_AFIO_AF(PD14_SERVO6, 2) | \
822
PIN_AFIO_AF(PD15, 0))
815
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(PD08_UART3_TX, 7) | \
…
823
824
#define VAL_GPIOE_MODER (PIN_MODE_ALTERNATE(PE00_UART8_RX) | \
825
PIN_MODE_ALTERNATE(PE01_UART8_TX) | \
826
PIN_MODE_INPUT(PE02) | \
827
PIN_MODE_OUTPUT(PE03_LED1) | \
828
PIN_MODE_OUTPUT(PE04_LED2) | \
829
PIN_MODE_OUTPUT(PE05_LED3) | \
830
PIN_MODE_INPUT(PE06_NARMED) | \
831
PIN_MODE_OUTPUT(PE07_VDD_3V3_SENSORS3_EN) | \
832
PIN_MODE_ALTERNATE(PE08_UART7_TX) | \
833
PIN_MODE_INPUT(PE09) | \
834
PIN_MODE_INPUT(PE10_UART7_CTS) | \
835
PIN_MODE_INPUT(PE11_FMU_CAP1) | \
836
PIN_MODE_ALTERNATE(PE12_SPI4_SCK) | \
837
PIN_MODE_ALTERNATE(PE13_SPI4_MISO) | \
838
PIN_MODE_ALTERNATE(PE14_SPI4_MOSI) | \
839
PIN_MODE_INPUT(PE15_VDD_5V_PERIPH_OC))
824
#define VAL_GPIOE_MODER (PIN_MODE_ALTERNATE(PE00_UART8_RX) | \
…
840
841
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(PE00_UART8_RX) | \
842
PIN_OTYPE_PUSHPULL(PE01_UART8_TX) | \
843
PIN_OTYPE_PUSHPULL(PE02) | \
844
PIN_OTYPE_PUSHPULL(PE03_LED1) | \
845
PIN_OTYPE_PUSHPULL(PE04_LED2) | \
846
PIN_OTYPE_PUSHPULL(PE05_LED3) | \
847
PIN_OTYPE_OPENDRAIN(PE06_NARMED) | \
848
PIN_OTYPE_PUSHPULL(PE07_VDD_3V3_SENSORS3_EN) | \
849
PIN_OTYPE_PUSHPULL(PE08_UART7_TX) | \
850
PIN_OTYPE_PUSHPULL(PE09) | \
851
PIN_OTYPE_OPENDRAIN(PE10_UART7_CTS) | \
852
PIN_OTYPE_OPENDRAIN(PE11_FMU_CAP1) | \
853
PIN_OTYPE_PUSHPULL(PE12_SPI4_SCK) | \
854
PIN_OTYPE_PUSHPULL(PE13_SPI4_MISO) | \
855
PIN_OTYPE_PUSHPULL(PE14_SPI4_MOSI) | \
856
PIN_OTYPE_OPENDRAIN(PE15_VDD_5V_PERIPH_OC))
841
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(PE00_UART8_RX) | \
…
857
858
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PE00_UART8_RX) | \
859
PIN_OSPEED_SPEED_HIGH(PE01_UART8_TX) | \
860
PIN_OSPEED_SPEED_VERYLOW(PE02) | \
861
PIN_OSPEED_SPEED_VERYLOW(PE03_LED1) | \
862
PIN_OSPEED_SPEED_VERYLOW(PE04_LED2) | \
863
PIN_OSPEED_SPEED_VERYLOW(PE05_LED3) | \
864
PIN_OSPEED_SPEED_VERYLOW(PE06_NARMED) | \
865
PIN_OSPEED_SPEED_VERYLOW(PE07_VDD_3V3_SENSORS3_EN) | \
866
PIN_OSPEED_SPEED_HIGH(PE08_UART7_TX) | \
867
PIN_OSPEED_SPEED_VERYLOW(PE09) | \
868
PIN_OSPEED_SPEED_VERYLOW(PE10_UART7_CTS) | \
869
PIN_OSPEED_SPEED_VERYLOW(PE11_FMU_CAP1) | \
870
PIN_OSPEED_SPEED_HIGH(PE12_SPI4_SCK) | \
871
PIN_OSPEED_SPEED_HIGH(PE13_SPI4_MISO) | \
872
PIN_OSPEED_SPEED_HIGH(PE14_SPI4_MOSI) | \
873
PIN_OSPEED_SPEED_VERYLOW(PE15_VDD_5V_PERIPH_OC))
858
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PE00_UART8_RX) | \
…
874
875
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(PE00_UART8_RX) | \
876
PIN_PUPDR_FLOATING(PE01_UART8_TX) | \
877
PIN_PUPDR_PULLDOWN(PE02) | \
878
PIN_PUPDR_FLOATING(PE03_LED1) | \
879
PIN_PUPDR_FLOATING(PE04_LED2) | \
880
PIN_PUPDR_FLOATING(PE05_LED3) | \
881
PIN_PUPDR_PULLDOWN(PE06_NARMED) | \
882
PIN_PUPDR_FLOATING(PE07_VDD_3V3_SENSORS3_EN) | \
883
PIN_PUPDR_FLOATING(PE08_UART7_TX) | \
884
PIN_PUPDR_PULLDOWN(PE09) | \
885
PIN_PUPDR_PULLDOWN(PE10_UART7_CTS) | \
886
PIN_PUPDR_PULLDOWN(PE11_FMU_CAP1) | \
887
PIN_PUPDR_FLOATING(PE12_SPI4_SCK) | \
888
PIN_PUPDR_FLOATING(PE13_SPI4_MISO) | \
889
PIN_PUPDR_FLOATING(PE14_SPI4_MOSI) | \
890
PIN_PUPDR_PULLDOWN(PE15_VDD_5V_PERIPH_OC))
875
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(PE00_UART8_RX) | \
…
891
892
#define VAL_GPIOE_ODR (PIN_ODR_LEVEL_HIGH(PE00_UART8_RX) | \
893
PIN_ODR_LEVEL_HIGH(PE01_UART8_TX) | \
894
PIN_ODR_LEVEL_LOW(PE02) | \
895
PIN_ODR_LEVEL_LOW(PE03_LED1) | \
896
PIN_ODR_LEVEL_LOW(PE04_LED2) | \
897
PIN_ODR_LEVEL_LOW(PE05_LED3) | \
898
PIN_ODR_LEVEL_HIGH(PE06_NARMED) | \
899
PIN_ODR_LEVEL_HIGH(PE07_VDD_3V3_SENSORS3_EN) | \
900
PIN_ODR_LEVEL_HIGH(PE08_UART7_TX) | \
901
PIN_ODR_LEVEL_LOW(PE09) | \
902
PIN_ODR_LEVEL_HIGH(PE10_UART7_CTS) | \
903
PIN_ODR_LEVEL_HIGH(PE11_FMU_CAP1) | \
904
PIN_ODR_LEVEL_HIGH(PE12_SPI4_SCK) | \
905
PIN_ODR_LEVEL_HIGH(PE13_SPI4_MISO) | \
906
PIN_ODR_LEVEL_HIGH(PE14_SPI4_MOSI) | \
907
PIN_ODR_LEVEL_HIGH(PE15_VDD_5V_PERIPH_OC))
892
#define VAL_GPIOE_ODR (PIN_ODR_LEVEL_HIGH(PE00_UART8_RX) | \
…
908
909
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(PE00_UART8_RX, 8) | \
910
PIN_AFIO_AF(PE01_UART8_TX, 8) | \
911
PIN_AFIO_AF(PE02, 0) | \
912
PIN_AFIO_AF(PE03_LED1, 0) | \
913
PIN_AFIO_AF(PE04_LED2, 0) | \
914
PIN_AFIO_AF(PE05_LED3, 0) | \
915
PIN_AFIO_AF(PE06_NARMED, 0) | \
916
PIN_AFIO_AF(PE07_VDD_3V3_SENSORS3_EN, 0))
909
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(PE00_UART8_RX, 8) | \
…
917
918
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(PE08_UART7_TX, 7) | \
919
PIN_AFIO_AF(PE09, 0) | \
920
PIN_AFIO_AF(PE10_UART7_CTS, 0) | \
921
PIN_AFIO_AF(PE11_FMU_CAP1, 0) | \
922
PIN_AFIO_AF(PE12_SPI4_SCK, 5) | \
923
PIN_AFIO_AF(PE13_SPI4_MISO, 5) | \
924
PIN_AFIO_AF(PE14_SPI4_MOSI, 5) | \
925
PIN_AFIO_AF(PE15_VDD_5V_PERIPH_OC, 0))
918
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(PE08_UART7_TX, 7) | \
…
926
927
#define VAL_GPIOF_MODER (PIN_MODE_ALTERNATE(PF00_I2C2_SDA) | \
928
PIN_MODE_ALTERNATE(PF01_I2C2_SCL) | \
929
PIN_MODE_INPUT(PF02) | \
930
PIN_MODE_INPUT(PF03_SPI4_DRDY1) | \
931
PIN_MODE_OUTPUT(PF04_VDD_3V3_SENSORS2_EN) | \
932
PIN_MODE_INPUT(PF05_SAFETY_IN) | \
933
PIN_MODE_ALTERNATE(PF06_UART7_RX) | \
934
PIN_MODE_ALTERNATE(PF07_SPI5_SCK) | \
935
PIN_MODE_INPUT(PF08_UART7_RTS) | \
936
PIN_MODE_ALTERNATE(PF09_ALARM) | \
937
PIN_MODE_INPUT(PF10) | \
938
PIN_MODE_ALTERNATE(PF11_SPI5_MOSI) | \
939
PIN_MODE_ANALOG(PF12_ADC4) | \
940
PIN_MODE_INPUT(PF13_VDD_5V_HIPOWER_OC) | \
941
PIN_MODE_ALTERNATE(PF14_I2C4_SCL) | \
942
PIN_MODE_ALTERNATE(PF15_I2C4_SDA))
927
#define VAL_GPIOF_MODER (PIN_MODE_ALTERNATE(PF00_I2C2_SDA) | \
…
943
944
#define VAL_GPIOF_OTYPER (PIN_OTYPE_OPENDRAIN(PF00_I2C2_SDA) | \
945
PIN_OTYPE_OPENDRAIN(PF01_I2C2_SCL) | \
946
PIN_OTYPE_PUSHPULL(PF02) | \
947
PIN_OTYPE_OPENDRAIN(PF03_SPI4_DRDY1) | \
948
PIN_OTYPE_PUSHPULL(PF04_VDD_3V3_SENSORS2_EN) | \
949
PIN_OTYPE_OPENDRAIN(PF05_SAFETY_IN) | \
950
PIN_OTYPE_PUSHPULL(PF06_UART7_RX) | \
951
PIN_OTYPE_PUSHPULL(PF07_SPI5_SCK) | \
952
PIN_OTYPE_OPENDRAIN(PF08_UART7_RTS) | \
953
PIN_OTYPE_PUSHPULL(PF09_ALARM) | \
954
PIN_OTYPE_PUSHPULL(PF10) | \
955
PIN_OTYPE_PUSHPULL(PF11_SPI5_MOSI) | \
956
PIN_OTYPE_PUSHPULL(PF12_ADC4) | \
957
PIN_OTYPE_OPENDRAIN(PF13_VDD_5V_HIPOWER_OC) | \
958
PIN_OTYPE_OPENDRAIN(PF14_I2C4_SCL) | \
959
PIN_OTYPE_OPENDRAIN(PF15_I2C4_SDA))
944
#define VAL_GPIOF_OTYPER (PIN_OTYPE_OPENDRAIN(PF00_I2C2_SDA) | \
…
960
961
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PF00_I2C2_SDA) | \
962
PIN_OSPEED_SPEED_HIGH(PF01_I2C2_SCL) | \
963
PIN_OSPEED_SPEED_VERYLOW(PF02) | \
964
PIN_OSPEED_SPEED_VERYLOW(PF03_SPI4_DRDY1) | \
965
PIN_OSPEED_SPEED_VERYLOW(PF04_VDD_3V3_SENSORS2_EN) | \
966
PIN_OSPEED_SPEED_VERYLOW(PF05_SAFETY_IN) | \
967
PIN_OSPEED_SPEED_HIGH(PF06_UART7_RX) | \
968
PIN_OSPEED_SPEED_HIGH(PF07_SPI5_SCK) | \
969
PIN_OSPEED_SPEED_VERYLOW(PF08_UART7_RTS) | \
970
PIN_OSPEED_SPEED_HIGH(PF09_ALARM) | \
971
PIN_OSPEED_SPEED_VERYLOW(PF10) | \
972
PIN_OSPEED_SPEED_HIGH(PF11_SPI5_MOSI) | \
973
PIN_OSPEED_SPEED_VERYLOW(PF12_ADC4) | \
974
PIN_OSPEED_SPEED_VERYLOW(PF13_VDD_5V_HIPOWER_OC) | \
975
PIN_OSPEED_SPEED_HIGH(PF14_I2C4_SCL) | \
976
PIN_OSPEED_SPEED_HIGH(PF15_I2C4_SDA))
961
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PF00_I2C2_SDA) | \
…
977
978
#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(PF00_I2C2_SDA) | \
979
PIN_PUPDR_PULLUP(PF01_I2C2_SCL) | \
980
PIN_PUPDR_PULLDOWN(PF02) | \
981
PIN_PUPDR_PULLDOWN(PF03_SPI4_DRDY1) | \
982
PIN_PUPDR_FLOATING(PF04_VDD_3V3_SENSORS2_EN) | \
983
PIN_PUPDR_PULLDOWN(PF05_SAFETY_IN) | \
984
PIN_PUPDR_FLOATING(PF06_UART7_RX) | \
985
PIN_PUPDR_FLOATING(PF07_SPI5_SCK) | \
986
PIN_PUPDR_PULLDOWN(PF08_UART7_RTS) | \
987
PIN_PUPDR_FLOATING(PF09_ALARM) | \
988
PIN_PUPDR_PULLDOWN(PF10) | \
989
PIN_PUPDR_FLOATING(PF11_SPI5_MOSI) | \
990
PIN_PUPDR_FLOATING(PF12_ADC4) | \
991
PIN_PUPDR_PULLDOWN(PF13_VDD_5V_HIPOWER_OC) | \
992
PIN_PUPDR_PULLUP(PF14_I2C4_SCL) | \
993
PIN_PUPDR_PULLUP(PF15_I2C4_SDA))
978
#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(PF00_I2C2_SDA) | \
…
994
995
#define VAL_GPIOF_ODR (PIN_ODR_LEVEL_HIGH(PF00_I2C2_SDA) | \
996
PIN_ODR_LEVEL_HIGH(PF01_I2C2_SCL) | \
997
PIN_ODR_LEVEL_LOW(PF02) | \
998
PIN_ODR_LEVEL_HIGH(PF03_SPI4_DRDY1) | \
999
PIN_ODR_LEVEL_HIGH(PF04_VDD_3V3_SENSORS2_EN) | \
1000
PIN_ODR_LEVEL_LOW(PF05_SAFETY_IN) | \
1001
PIN_ODR_LEVEL_HIGH(PF06_UART7_RX) | \
1002
PIN_ODR_LEVEL_HIGH(PF07_SPI5_SCK) | \
1003
PIN_ODR_LEVEL_HIGH(PF08_UART7_RTS) | \
1004
PIN_ODR_LEVEL_LOW(PF09_ALARM) | \
1005
PIN_ODR_LEVEL_LOW(PF10) | \
1006
PIN_ODR_LEVEL_HIGH(PF11_SPI5_MOSI) | \
1007
PIN_ODR_LEVEL_LOW(PF12_ADC4) | \
1008
PIN_ODR_LEVEL_HIGH(PF13_VDD_5V_HIPOWER_OC) | \
1009
PIN_ODR_LEVEL_HIGH(PF14_I2C4_SCL) | \
1010
PIN_ODR_LEVEL_HIGH(PF15_I2C4_SDA))
995
#define VAL_GPIOF_ODR (PIN_ODR_LEVEL_HIGH(PF00_I2C2_SDA) | \
…
1011
1012
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(PF00_I2C2_SDA, 4) | \
1013
PIN_AFIO_AF(PF01_I2C2_SCL, 4) | \
1014
PIN_AFIO_AF(PF02, 0) | \
1015
PIN_AFIO_AF(PF03_SPI4_DRDY1, 0) | \
1016
PIN_AFIO_AF(PF04_VDD_3V3_SENSORS2_EN, 0) | \
1017
PIN_AFIO_AF(PF05_SAFETY_IN, 0) | \
1018
PIN_AFIO_AF(PF06_UART7_RX, 7) | \
1019
PIN_AFIO_AF(PF07_SPI5_SCK, 5))
1012
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(PF00_I2C2_SDA, 4) | \
…
1020
1021
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(PF08_UART7_RTS, 0) | \
1022
PIN_AFIO_AF(PF09_ALARM, 1) | \
1023
PIN_AFIO_AF(PF10, 0) | \
1024
PIN_AFIO_AF(PF11_SPI5_MOSI, 5) | \
1025
PIN_AFIO_AF(PF12_ADC4, 0) | \
1026
PIN_AFIO_AF(PF13_VDD_5V_HIPOWER_OC, 0) | \
1027
PIN_AFIO_AF(PF14_I2C4_SCL, 4) | \
1028
PIN_AFIO_AF(PF15_I2C4_SDA, 4))
1021
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(PF08_UART7_RTS, 0) | \
…
1029
1030
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(PG00_HW_VER_REV_DRIVE) | \
1031
PIN_MODE_INPUT(PG01_VDD_BRICK_VALID) | \
1032
PIN_MODE_INPUT(PG02_VDD_BRICK2_VALID) | \
1033
PIN_MODE_INPUT(PG03_VDD_BRICK3_VALID) | \
1034
PIN_MODE_OUTPUT(PG04_VDD_5V_PERIPH_EN) | \
1035
PIN_MODE_INPUT(PG05_DRDY1_BMP388) | \
1036
PIN_MODE_INPUT(PG06) | \
1037
PIN_MODE_INPUT(PG07_SPI_SLAVE6) | \
1038
PIN_MODE_OUTPUT(PG08_VDD_3V3_SENSORS4_EN) | \
1039
PIN_MODE_ALTERNATE(PG09_SPI1_MISO) | \
1040
PIN_MODE_OUTPUT(PG10_VDD_5V_HIPOWER_EN) | \
1041
PIN_MODE_ALTERNATE(PG11_SDIO_D2) | \
1042
PIN_MODE_INPUT(PG12_ETH_RMII_TXD1) | \
1043
PIN_MODE_INPUT(PG13_ETH_RMII_TXD0) | \
1044
PIN_MODE_ALTERNATE(PG14_SPI6_MOSI) | \
1045
PIN_MODE_OUTPUT(PG15_ETH_POWER_EN))
1030
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(PG00_HW_VER_REV_DRIVE) | \
…
1046
1047
#define VAL_GPIOG_OTYPER (PIN_OTYPE_OPENDRAIN(PG00_HW_VER_REV_DRIVE) | \
1048
PIN_OTYPE_OPENDRAIN(PG01_VDD_BRICK_VALID) | \
1049
PIN_OTYPE_OPENDRAIN(PG02_VDD_BRICK2_VALID) | \
1050
PIN_OTYPE_OPENDRAIN(PG03_VDD_BRICK3_VALID) | \
1051
PIN_OTYPE_PUSHPULL(PG04_VDD_5V_PERIPH_EN) | \
1052
PIN_OTYPE_OPENDRAIN(PG05_DRDY1_BMP388) | \
1053
PIN_OTYPE_PUSHPULL(PG06) | \
1054
PIN_OTYPE_OPENDRAIN(PG07_SPI_SLAVE6) | \
1055
PIN_OTYPE_PUSHPULL(PG08_VDD_3V3_SENSORS4_EN) | \
1056
PIN_OTYPE_PUSHPULL(PG09_SPI1_MISO) | \
1057
PIN_OTYPE_PUSHPULL(PG10_VDD_5V_HIPOWER_EN) | \
1058
PIN_OTYPE_PUSHPULL(PG11_SDIO_D2) | \
1059
PIN_OTYPE_OPENDRAIN(PG12_ETH_RMII_TXD1) | \
1060
PIN_OTYPE_OPENDRAIN(PG13_ETH_RMII_TXD0) | \
1061
PIN_OTYPE_PUSHPULL(PG14_SPI6_MOSI) | \
1062
PIN_OTYPE_PUSHPULL(PG15_ETH_POWER_EN))
1047
#define VAL_GPIOG_OTYPER (PIN_OTYPE_OPENDRAIN(PG00_HW_VER_REV_DRIVE) | \
…
1063
1064
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PG00_HW_VER_REV_DRIVE) | \
1065
PIN_OSPEED_SPEED_VERYLOW(PG01_VDD_BRICK_VALID) | \
1066
PIN_OSPEED_SPEED_VERYLOW(PG02_VDD_BRICK2_VALID) | \
1067
PIN_OSPEED_SPEED_VERYLOW(PG03_VDD_BRICK3_VALID) | \
1068
PIN_OSPEED_SPEED_VERYLOW(PG04_VDD_5V_PERIPH_EN) | \
1069
PIN_OSPEED_SPEED_VERYLOW(PG05_DRDY1_BMP388) | \
1070
PIN_OSPEED_SPEED_VERYLOW(PG06) | \
1071
PIN_OSPEED_SPEED_VERYLOW(PG07_SPI_SLAVE6) | \
1072
PIN_OSPEED_SPEED_VERYLOW(PG08_VDD_3V3_SENSORS4_EN) | \
1073
PIN_OSPEED_SPEED_HIGH(PG09_SPI1_MISO) | \
1074
PIN_OSPEED_SPEED_VERYLOW(PG10_VDD_5V_HIPOWER_EN) | \
1075
PIN_OSPEED_SPEED_HIGH(PG11_SDIO_D2) | \
1076
PIN_OSPEED_SPEED_VERYLOW(PG12_ETH_RMII_TXD1) | \
1077
PIN_OSPEED_SPEED_VERYLOW(PG13_ETH_RMII_TXD0) | \
1078
PIN_OSPEED_SPEED_HIGH(PG14_SPI6_MOSI) | \
1079
PIN_OSPEED_SPEED_VERYLOW(PG15_ETH_POWER_EN))
1064
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PG00_HW_VER_REV_DRIVE) | \
…
1080
1081
#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLDOWN(PG00_HW_VER_REV_DRIVE) | \
1082
PIN_PUPDR_PULLDOWN(PG01_VDD_BRICK_VALID) | \
1083
PIN_PUPDR_PULLDOWN(PG02_VDD_BRICK2_VALID) | \
1084
PIN_PUPDR_PULLDOWN(PG03_VDD_BRICK3_VALID) | \
1085
PIN_PUPDR_FLOATING(PG04_VDD_5V_PERIPH_EN) | \
1086
PIN_PUPDR_PULLDOWN(PG05_DRDY1_BMP388) | \
1087
PIN_PUPDR_PULLDOWN(PG06) | \
1088
PIN_PUPDR_PULLDOWN(PG07_SPI_SLAVE6) | \
1089
PIN_PUPDR_FLOATING(PG08_VDD_3V3_SENSORS4_EN) | \
1090
PIN_PUPDR_FLOATING(PG09_SPI1_MISO) | \
1091
PIN_PUPDR_FLOATING(PG10_VDD_5V_HIPOWER_EN) | \
1092
PIN_PUPDR_PULLUP(PG11_SDIO_D2) | \
1093
PIN_PUPDR_PULLDOWN(PG12_ETH_RMII_TXD1) | \
1094
PIN_PUPDR_PULLDOWN(PG13_ETH_RMII_TXD0) | \
1095
PIN_PUPDR_FLOATING(PG14_SPI6_MOSI) | \
1096
PIN_PUPDR_FLOATING(PG15_ETH_POWER_EN))
1081
#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLDOWN(PG00_HW_VER_REV_DRIVE) | \
…
1097
1098
#define VAL_GPIOG_ODR (PIN_ODR_LEVEL_HIGH(PG00_HW_VER_REV_DRIVE) | \
1099
PIN_ODR_LEVEL_HIGH(PG01_VDD_BRICK_VALID) | \
1100
PIN_ODR_LEVEL_HIGH(PG02_VDD_BRICK2_VALID) | \
1101
PIN_ODR_LEVEL_HIGH(PG03_VDD_BRICK3_VALID) | \
1102
PIN_ODR_LEVEL_LOW(PG04_VDD_5V_PERIPH_EN) | \
1103
PIN_ODR_LEVEL_HIGH(PG05_DRDY1_BMP388) | \
1104
PIN_ODR_LEVEL_LOW(PG06) | \
1105
PIN_ODR_LEVEL_HIGH(PG07_SPI_SLAVE6) | \
1106
PIN_ODR_LEVEL_HIGH(PG08_VDD_3V3_SENSORS4_EN) | \
1107
PIN_ODR_LEVEL_HIGH(PG09_SPI1_MISO) | \
1108
PIN_ODR_LEVEL_LOW(PG10_VDD_5V_HIPOWER_EN) | \
1109
PIN_ODR_LEVEL_HIGH(PG11_SDIO_D2) | \
1110
PIN_ODR_LEVEL_HIGH(PG12_ETH_RMII_TXD1) | \
1111
PIN_ODR_LEVEL_HIGH(PG13_ETH_RMII_TXD0) | \
1112
PIN_ODR_LEVEL_HIGH(PG14_SPI6_MOSI) | \
1113
PIN_ODR_LEVEL_HIGH(PG15_ETH_POWER_EN))
1098
#define VAL_GPIOG_ODR (PIN_ODR_LEVEL_HIGH(PG00_HW_VER_REV_DRIVE) | \
…
1114
1115
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(PG00_HW_VER_REV_DRIVE, 0) | \
1116
PIN_AFIO_AF(PG01_VDD_BRICK_VALID, 0) | \
1117
PIN_AFIO_AF(PG02_VDD_BRICK2_VALID, 0) | \
1118
PIN_AFIO_AF(PG03_VDD_BRICK3_VALID, 0) | \
1119
PIN_AFIO_AF(PG04_VDD_5V_PERIPH_EN, 0) | \
1120
PIN_AFIO_AF(PG05_DRDY1_BMP388, 0) | \
1121
PIN_AFIO_AF(PG06, 0) | \
1122
PIN_AFIO_AF(PG07_SPI_SLAVE6, 0))
1115
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(PG00_HW_VER_REV_DRIVE, 0) | \
…
1123
1124
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(PG08_VDD_3V3_SENSORS4_EN, 0) | \
1125
PIN_AFIO_AF(PG09_SPI1_MISO, 5) | \
1126
PIN_AFIO_AF(PG10_VDD_5V_HIPOWER_EN, 0) | \
1127
PIN_AFIO_AF(PG11_SDIO_D2, 10) | \
1128
PIN_AFIO_AF(PG12_ETH_RMII_TXD1, 0) | \
1129
PIN_AFIO_AF(PG13_ETH_RMII_TXD0, 0) | \
1130
PIN_AFIO_AF(PG14_SPI6_MOSI, 5) | \
1131
PIN_AFIO_AF(PG15_ETH_POWER_EN, 0))
1124
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(PG08_VDD_3V3_SENSORS4_EN, 0) | \
…
1132
1133
#define VAL_GPIOH_MODER (PIN_MODE_ALTERNATE(PH00_OSC_IN) | \
1134
PIN_MODE_ALTERNATE(PH01_OSC_OUT) | \
1135
PIN_MODE_OUTPUT(PH02_SPEKTRUM_PWR_EN) | \
1136
PIN_MODE_INPUT(PH03_HW_VER_SENS) | \
1137
PIN_MODE_INPUT(PH04_HW_REV_SENS) | \
1138
PIN_MODE_INPUT(PH05_SPI_SLAVE2) | \
1139
PIN_MODE_INPUT(PH06) | \
1140
PIN_MODE_ALTERNATE(PH07_SPI5_MISO) | \
1141
PIN_MODE_ALTERNATE(PH08_I2C3_SDA) | \
1142
PIN_MODE_INPUT(PH09) | \
1143
PIN_MODE_ALTERNATE(PH10_SERVO4) | \
1144
PIN_MODE_ALTERNATE(PH11_SERVO3) | \
1145
PIN_MODE_ALTERNATE(PH12_SERVO2) | \
1146
PIN_MODE_ALTERNATE(PH13_UART4_TX) | \
1147
PIN_MODE_ALTERNATE(PH14_UART4_RX) | \
1148
PIN_MODE_INPUT(PH15_SPI_SLAVE5))
1133
#define VAL_GPIOH_MODER (PIN_MODE_ALTERNATE(PH00_OSC_IN) | \
…
1149
1150
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(PH00_OSC_IN) | \
1151
PIN_OTYPE_PUSHPULL(PH01_OSC_OUT) | \
1152
PIN_OTYPE_PUSHPULL(PH02_SPEKTRUM_PWR_EN) | \
1153
PIN_OTYPE_OPENDRAIN(PH03_HW_VER_SENS) | \
1154
PIN_OTYPE_OPENDRAIN(PH04_HW_REV_SENS) | \
1155
PIN_OTYPE_OPENDRAIN(PH05_SPI_SLAVE2) | \
1156
PIN_OTYPE_PUSHPULL(PH06) | \
1157
PIN_OTYPE_PUSHPULL(PH07_SPI5_MISO) | \
1158
PIN_OTYPE_OPENDRAIN(PH08_I2C3_SDA) | \
1159
PIN_OTYPE_PUSHPULL(PH09) | \
1160
PIN_OTYPE_PUSHPULL(PH10_SERVO4) | \
1161
PIN_OTYPE_PUSHPULL(PH11_SERVO3) | \
1162
PIN_OTYPE_PUSHPULL(PH12_SERVO2) | \
1163
PIN_OTYPE_PUSHPULL(PH13_UART4_TX) | \
1164
PIN_OTYPE_PUSHPULL(PH14_UART4_RX) | \
1165
PIN_OTYPE_OPENDRAIN(PH15_SPI_SLAVE5))
1150
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(PH00_OSC_IN) | \
…
1166
1167
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PH00_OSC_IN) | \
1168
PIN_OSPEED_SPEED_HIGH(PH01_OSC_OUT) | \
1169
PIN_OSPEED_SPEED_VERYLOW(PH02_SPEKTRUM_PWR_EN) | \
1170
PIN_OSPEED_SPEED_VERYLOW(PH03_HW_VER_SENS) | \
1171
PIN_OSPEED_SPEED_VERYLOW(PH04_HW_REV_SENS) | \
1172
PIN_OSPEED_SPEED_VERYLOW(PH05_SPI_SLAVE2) | \
1173
PIN_OSPEED_SPEED_VERYLOW(PH06) | \
1174
PIN_OSPEED_SPEED_HIGH(PH07_SPI5_MISO) | \
1175
PIN_OSPEED_SPEED_HIGH(PH08_I2C3_SDA) | \
1176
PIN_OSPEED_SPEED_VERYLOW(PH09) | \
1177
PIN_OSPEED_SPEED_HIGH(PH10_SERVO4) | \
1178
PIN_OSPEED_SPEED_HIGH(PH11_SERVO3) | \
1179
PIN_OSPEED_SPEED_HIGH(PH12_SERVO2) | \
1180
PIN_OSPEED_SPEED_HIGH(PH13_UART4_TX) | \
1181
PIN_OSPEED_SPEED_HIGH(PH14_UART4_RX) | \
1182
PIN_OSPEED_SPEED_VERYLOW(PH15_SPI_SLAVE5))
1167
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PH00_OSC_IN) | \
…
1183
1184
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(PH00_OSC_IN) | \
1185
PIN_PUPDR_FLOATING(PH01_OSC_OUT) | \
1186
PIN_PUPDR_FLOATING(PH02_SPEKTRUM_PWR_EN) | \
1187
PIN_PUPDR_PULLDOWN(PH03_HW_VER_SENS) | \
1188
PIN_PUPDR_PULLDOWN(PH04_HW_REV_SENS) | \
1189
PIN_PUPDR_PULLDOWN(PH05_SPI_SLAVE2) | \
1190
PIN_PUPDR_PULLDOWN(PH06) | \
1191
PIN_PUPDR_FLOATING(PH07_SPI5_MISO) | \
1192
PIN_PUPDR_PULLUP(PH08_I2C3_SDA) | \
1193
PIN_PUPDR_PULLDOWN(PH09) | \
1194
PIN_PUPDR_FLOATING(PH10_SERVO4) | \
1195
PIN_PUPDR_FLOATING(PH11_SERVO3) | \
1196
PIN_PUPDR_FLOATING(PH12_SERVO2) | \
1197
PIN_PUPDR_FLOATING(PH13_UART4_TX) | \
1198
PIN_PUPDR_FLOATING(PH14_UART4_RX) | \
1199
PIN_PUPDR_PULLDOWN(PH15_SPI_SLAVE5))
1184
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(PH00_OSC_IN) | \
…
1200
1201
#define VAL_GPIOH_ODR (PIN_ODR_LEVEL_HIGH(PH00_OSC_IN) | \
1202
PIN_ODR_LEVEL_HIGH(PH01_OSC_OUT) | \
1203
PIN_ODR_LEVEL_HIGH(PH02_SPEKTRUM_PWR_EN) | \
1204
PIN_ODR_LEVEL_HIGH(PH03_HW_VER_SENS) | \
1205
PIN_ODR_LEVEL_HIGH(PH04_HW_REV_SENS) | \
1206
PIN_ODR_LEVEL_HIGH(PH05_SPI_SLAVE2) | \
1207
PIN_ODR_LEVEL_LOW(PH06) | \
1208
PIN_ODR_LEVEL_HIGH(PH07_SPI5_MISO) | \
1209
PIN_ODR_LEVEL_HIGH(PH08_I2C3_SDA) | \
1210
PIN_ODR_LEVEL_LOW(PH09) | \
1211
PIN_ODR_LEVEL_LOW(PH10_SERVO4) | \
1212
PIN_ODR_LEVEL_LOW(PH11_SERVO3) | \
1213
PIN_ODR_LEVEL_LOW(PH12_SERVO2) | \
1214
PIN_ODR_LEVEL_HIGH(PH13_UART4_TX) | \
1215
PIN_ODR_LEVEL_HIGH(PH14_UART4_RX) | \
1216
PIN_ODR_LEVEL_HIGH(PH15_SPI_SLAVE5))
1201
#define VAL_GPIOH_ODR (PIN_ODR_LEVEL_HIGH(PH00_OSC_IN) | \
…
1217
1218
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(PH00_OSC_IN, 0) | \
1219
PIN_AFIO_AF(PH01_OSC_OUT, 0) | \
1220
PIN_AFIO_AF(PH02_SPEKTRUM_PWR_EN, 0) | \
1221
PIN_AFIO_AF(PH03_HW_VER_SENS, 0) | \
1222
PIN_AFIO_AF(PH04_HW_REV_SENS, 0) | \
1223
PIN_AFIO_AF(PH05_SPI_SLAVE2, 0) | \
1224
PIN_AFIO_AF(PH06, 0) | \
1225
PIN_AFIO_AF(PH07_SPI5_MISO, 5))
1218
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(PH00_OSC_IN, 0) | \
…
1226
1227
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(PH08_I2C3_SDA, 4) | \
1228
PIN_AFIO_AF(PH09, 0) | \
1229
PIN_AFIO_AF(PH10_SERVO4, 2) | \
1230
PIN_AFIO_AF(PH11_SERVO3, 2) | \
1231
PIN_AFIO_AF(PH12_SERVO2, 2) | \
1232
PIN_AFIO_AF(PH13_UART4_TX, 8) | \
1233
PIN_AFIO_AF(PH14_UART4_RX, 8) | \
1234
PIN_AFIO_AF(PH15_SPI_SLAVE5, 0))
1227
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(PH08_I2C3_SDA, 4) | \
…
1235
1236
#define VAL_GPIOI_MODER (PIN_MODE_ALTERNATE(PI00_SERVO1) | \
1237
PIN_MODE_ALTERNATE(PI01_SPI2_SCK) | \
1238
PIN_MODE_ALTERNATE(PI02_SPI2_MISO) | \
1239
PIN_MODE_ALTERNATE(PI03_SPI2_MOSI) | \
1240
PIN_MODE_INPUT(PI04_SPI_SLAVE3) | \
1241
PIN_MODE_ALTERNATE(PI05_PWM_INPUT1) | \
1242
PIN_MODE_INPUT(PI06_SPI3_DRDY1) | \
1243
PIN_MODE_INPUT(PI07_SPI3_DRDY2) | \
1244
PIN_MODE_INPUT(PI08_SPI_SLAVE4) | \
1245
PIN_MODE_INPUT(PI09_SPI_SLAVE1) | \
1246
PIN_MODE_INPUT(PI10_SPI_SLAVE7) | \
1247
PIN_MODE_OUTPUT(PI11_VDD_3V3_SENSORS1_EN) | \
1248
PIN_MODE_INPUT(PI12) | \
1249
PIN_MODE_INPUT(PI13) | \
1250
PIN_MODE_INPUT(PI14) | \
1251
PIN_MODE_INPUT(PI15))
1236
#define VAL_GPIOI_MODER (PIN_MODE_ALTERNATE(PI00_SERVO1) | \
…
1252
1253
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(PI00_SERVO1) | \
1254
PIN_OTYPE_PUSHPULL(PI01_SPI2_SCK) | \
1255
PIN_OTYPE_PUSHPULL(PI02_SPI2_MISO) | \
1256
PIN_OTYPE_PUSHPULL(PI03_SPI2_MOSI) | \
1257
PIN_OTYPE_OPENDRAIN(PI04_SPI_SLAVE3) | \
1258
PIN_OTYPE_PUSHPULL(PI05_PWM_INPUT1) | \
1259
PIN_OTYPE_OPENDRAIN(PI06_SPI3_DRDY1) | \
1260
PIN_OTYPE_OPENDRAIN(PI07_SPI3_DRDY2) | \
1261
PIN_OTYPE_OPENDRAIN(PI08_SPI_SLAVE4) | \
1262
PIN_OTYPE_OPENDRAIN(PI09_SPI_SLAVE1) | \
1263
PIN_OTYPE_OPENDRAIN(PI10_SPI_SLAVE7) | \
1264
PIN_OTYPE_PUSHPULL(PI11_VDD_3V3_SENSORS1_EN) | \
1265
PIN_OTYPE_PUSHPULL(PI12) | \
1266
PIN_OTYPE_PUSHPULL(PI13) | \
1267
PIN_OTYPE_PUSHPULL(PI14) | \
1268
PIN_OTYPE_PUSHPULL(PI15))
1253
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(PI00_SERVO1) | \
…
1269
1270
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PI00_SERVO1) | \
1271
PIN_OSPEED_SPEED_HIGH(PI01_SPI2_SCK) | \
1272
PIN_OSPEED_SPEED_HIGH(PI02_SPI2_MISO) | \
1273
PIN_OSPEED_SPEED_HIGH(PI03_SPI2_MOSI) | \
1274
PIN_OSPEED_SPEED_VERYLOW(PI04_SPI_SLAVE3) | \
1275
PIN_OSPEED_SPEED_HIGH(PI05_PWM_INPUT1) | \
1276
PIN_OSPEED_SPEED_VERYLOW(PI06_SPI3_DRDY1) | \
1277
PIN_OSPEED_SPEED_VERYLOW(PI07_SPI3_DRDY2) | \
1278
PIN_OSPEED_SPEED_VERYLOW(PI08_SPI_SLAVE4) | \
1279
PIN_OSPEED_SPEED_VERYLOW(PI09_SPI_SLAVE1) | \
1280
PIN_OSPEED_SPEED_VERYLOW(PI10_SPI_SLAVE7) | \
1281
PIN_OSPEED_SPEED_VERYLOW(PI11_VDD_3V3_SENSORS1_EN) | \
1282
PIN_OSPEED_SPEED_VERYLOW(PI12) | \
1283
PIN_OSPEED_SPEED_VERYLOW(PI13) | \
1284
PIN_OSPEED_SPEED_VERYLOW(PI14) | \
1285
PIN_OSPEED_SPEED_VERYLOW(PI15))
1270
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_SPEED_HIGH(PI00_SERVO1) | \
…
1286
1287
#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(PI00_SERVO1) | \
1288
PIN_PUPDR_FLOATING(PI01_SPI2_SCK) | \
1289
PIN_PUPDR_FLOATING(PI02_SPI2_MISO) | \
1290
PIN_PUPDR_FLOATING(PI03_SPI2_MOSI) | \
1291
PIN_PUPDR_PULLDOWN(PI04_SPI_SLAVE3) | \
1292
PIN_PUPDR_FLOATING(PI05_PWM_INPUT1) | \
1293
PIN_PUPDR_PULLDOWN(PI06_SPI3_DRDY1) | \
1294
PIN_PUPDR_PULLDOWN(PI07_SPI3_DRDY2) | \
1295
PIN_PUPDR_PULLDOWN(PI08_SPI_SLAVE4) | \
1296
PIN_PUPDR_PULLDOWN(PI09_SPI_SLAVE1) | \
1297
PIN_PUPDR_PULLDOWN(PI10_SPI_SLAVE7) | \
1298
PIN_PUPDR_FLOATING(PI11_VDD_3V3_SENSORS1_EN) | \
1299
PIN_PUPDR_PULLDOWN(PI12) | \
1300
PIN_PUPDR_PULLDOWN(PI13) | \
1301
PIN_PUPDR_PULLDOWN(PI14) | \
1302
PIN_PUPDR_PULLDOWN(PI15))
1287
#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(PI00_SERVO1) | \
…
1303
1304
#define VAL_GPIOI_ODR (PIN_ODR_LEVEL_LOW(PI00_SERVO1) | \
1305
PIN_ODR_LEVEL_HIGH(PI01_SPI2_SCK) | \
1306
PIN_ODR_LEVEL_HIGH(PI02_SPI2_MISO) | \
1307
PIN_ODR_LEVEL_HIGH(PI03_SPI2_MOSI) | \
1308
PIN_ODR_LEVEL_HIGH(PI04_SPI_SLAVE3) | \
1309
PIN_ODR_LEVEL_HIGH(PI05_PWM_INPUT1) | \
1310
PIN_ODR_LEVEL_HIGH(PI06_SPI3_DRDY1) | \
1311
PIN_ODR_LEVEL_HIGH(PI07_SPI3_DRDY2) | \
1312
PIN_ODR_LEVEL_HIGH(PI08_SPI_SLAVE4) | \
1313
PIN_ODR_LEVEL_HIGH(PI09_SPI_SLAVE1) | \
1314
PIN_ODR_LEVEL_HIGH(PI10_SPI_SLAVE7) | \
1315
PIN_ODR_LEVEL_HIGH(PI11_VDD_3V3_SENSORS1_EN) | \
1316
PIN_ODR_LEVEL_LOW(PI12) | \
1317
PIN_ODR_LEVEL_LOW(PI13) | \
1318
PIN_ODR_LEVEL_LOW(PI14) | \
1319
PIN_ODR_LEVEL_LOW(PI15))
1304
#define VAL_GPIOI_ODR (PIN_ODR_LEVEL_LOW(PI00_SERVO1) | \
…
1320
1321
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(PI00_SERVO1, 2) | \
1322
PIN_AFIO_AF(PI01_SPI2_SCK, 5) | \
1323
PIN_AFIO_AF(PI02_SPI2_MISO, 5) | \
1324
PIN_AFIO_AF(PI03_SPI2_MOSI, 5) | \
1325
PIN_AFIO_AF(PI04_SPI_SLAVE3, 0) | \
1326
PIN_AFIO_AF(PI05_PWM_INPUT1, 3) | \
1327
PIN_AFIO_AF(PI06_SPI3_DRDY1, 0) | \
1328
PIN_AFIO_AF(PI07_SPI3_DRDY2, 0))
1321
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(PI00_SERVO1, 2) | \
…
1329
1330
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(PI08_SPI_SLAVE4, 0) | \
1331
PIN_AFIO_AF(PI09_SPI_SLAVE1, 0) | \
1332
PIN_AFIO_AF(PI10_SPI_SLAVE7, 0) | \
1333
PIN_AFIO_AF(PI11_VDD_3V3_SENSORS1_EN, 0) | \
1334
PIN_AFIO_AF(PI12, 0) | \
1335
PIN_AFIO_AF(PI13, 0) | \
1336
PIN_AFIO_AF(PI14, 0) | \
1337
PIN_AFIO_AF(PI15, 0))
1330
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(PI08_SPI_SLAVE4, 0) | \
…
1338
1339
#define VAL_GPIOJ_MODER (PIN_MODE_INPUT(PJ00) | \
1340
PIN_MODE_INPUT(PJ01) | \
1341
PIN_MODE_INPUT(PJ02) | \
1342
PIN_MODE_INPUT(PJ03) | \
1343
PIN_MODE_INPUT(PJ04) | \
1344
PIN_MODE_INPUT(PJ05) | \
1345
PIN_MODE_INPUT(PJ06) | \
1346
PIN_MODE_INPUT(PJ07) | \
1347
PIN_MODE_INPUT(PJ08) | \
1348
PIN_MODE_INPUT(PJ09) | \
1349
PIN_MODE_INPUT(PJ10) | \
1350
PIN_MODE_INPUT(PJ11) | \
1351
PIN_MODE_INPUT(PJ12) | \
1352
PIN_MODE_INPUT(PJ13) | \
1353
PIN_MODE_INPUT(PJ14) | \
1354
PIN_MODE_INPUT(PJ15))
1339
#define VAL_GPIOJ_MODER (PIN_MODE_INPUT(PJ00) | \
…
1355
1356
#define VAL_GPIOJ_OTYPER (PIN_OTYPE_PUSHPULL(PJ00) | \
1357
PIN_OTYPE_PUSHPULL(PJ01) | \
1358
PIN_OTYPE_PUSHPULL(PJ02) | \
1359
PIN_OTYPE_PUSHPULL(PJ03) | \
1360
PIN_OTYPE_PUSHPULL(PJ04) | \
1361
PIN_OTYPE_PUSHPULL(PJ05) | \
1362
PIN_OTYPE_PUSHPULL(PJ06) | \
1363
PIN_OTYPE_PUSHPULL(PJ07) | \
1364
PIN_OTYPE_PUSHPULL(PJ08) | \
1365
PIN_OTYPE_PUSHPULL(PJ09) | \
1366
PIN_OTYPE_PUSHPULL(PJ10) | \
1367
PIN_OTYPE_PUSHPULL(PJ11) | \
1368
PIN_OTYPE_PUSHPULL(PJ12) | \
1369
PIN_OTYPE_PUSHPULL(PJ13) | \
1370
PIN_OTYPE_PUSHPULL(PJ14) | \
1371
PIN_OTYPE_PUSHPULL(PJ15))
1356
#define VAL_GPIOJ_OTYPER (PIN_OTYPE_PUSHPULL(PJ00) | \
…
1372
1373
#define VAL_GPIOJ_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PJ00) | \
1374
PIN_OSPEED_SPEED_VERYLOW(PJ01) | \
1375
PIN_OSPEED_SPEED_VERYLOW(PJ02) | \
1376
PIN_OSPEED_SPEED_VERYLOW(PJ03) | \
1377
PIN_OSPEED_SPEED_VERYLOW(PJ04) | \
1378
PIN_OSPEED_SPEED_VERYLOW(PJ05) | \
1379
PIN_OSPEED_SPEED_VERYLOW(PJ06) | \
1380
PIN_OSPEED_SPEED_VERYLOW(PJ07) | \
1381
PIN_OSPEED_SPEED_VERYLOW(PJ08) | \
1382
PIN_OSPEED_SPEED_VERYLOW(PJ09) | \
1383
PIN_OSPEED_SPEED_VERYLOW(PJ10) | \
1384
PIN_OSPEED_SPEED_VERYLOW(PJ11) | \
1385
PIN_OSPEED_SPEED_VERYLOW(PJ12) | \
1386
PIN_OSPEED_SPEED_VERYLOW(PJ13) | \
1387
PIN_OSPEED_SPEED_VERYLOW(PJ14) | \
1388
PIN_OSPEED_SPEED_VERYLOW(PJ15))
1373
#define VAL_GPIOJ_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PJ00) | \
…
1389
1390
#define VAL_GPIOJ_PUPDR (PIN_PUPDR_PULLDOWN(PJ00) | \
1391
PIN_PUPDR_PULLDOWN(PJ01) | \
1392
PIN_PUPDR_PULLDOWN(PJ02) | \
1393
PIN_PUPDR_PULLDOWN(PJ03) | \
1394
PIN_PUPDR_PULLDOWN(PJ04) | \
1395
PIN_PUPDR_PULLDOWN(PJ05) | \
1396
PIN_PUPDR_PULLDOWN(PJ06) | \
1397
PIN_PUPDR_PULLDOWN(PJ07) | \
1398
PIN_PUPDR_PULLDOWN(PJ08) | \
1399
PIN_PUPDR_PULLDOWN(PJ09) | \
1400
PIN_PUPDR_PULLDOWN(PJ10) | \
1401
PIN_PUPDR_PULLDOWN(PJ11) | \
1402
PIN_PUPDR_PULLDOWN(PJ12) | \
1403
PIN_PUPDR_PULLDOWN(PJ13) | \
1404
PIN_PUPDR_PULLDOWN(PJ14) | \
1405
PIN_PUPDR_PULLDOWN(PJ15))
1390
#define VAL_GPIOJ_PUPDR (PIN_PUPDR_PULLDOWN(PJ00) | \
…
1406
1407
#define VAL_GPIOJ_ODR (PIN_ODR_LEVEL_LOW(PJ00) | \
1408
PIN_ODR_LEVEL_LOW(PJ01) | \
1409
PIN_ODR_LEVEL_LOW(PJ02) | \
1410
PIN_ODR_LEVEL_LOW(PJ03) | \
1411
PIN_ODR_LEVEL_LOW(PJ04) | \
1412
PIN_ODR_LEVEL_LOW(PJ05) | \
1413
PIN_ODR_LEVEL_LOW(PJ06) | \
1414
PIN_ODR_LEVEL_LOW(PJ07) | \
1415
PIN_ODR_LEVEL_LOW(PJ08) | \
1416
PIN_ODR_LEVEL_LOW(PJ09) | \
1417
PIN_ODR_LEVEL_LOW(PJ10) | \
1418
PIN_ODR_LEVEL_LOW(PJ11) | \
1419
PIN_ODR_LEVEL_LOW(PJ12) | \
1420
PIN_ODR_LEVEL_LOW(PJ13) | \
1421
PIN_ODR_LEVEL_LOW(PJ14) | \
1422
PIN_ODR_LEVEL_LOW(PJ15))
1407
#define VAL_GPIOJ_ODR (PIN_ODR_LEVEL_LOW(PJ00) | \
…
1423
1424
#define VAL_GPIOJ_AFRL (PIN_AFIO_AF(PJ00, 0) | \
1425
PIN_AFIO_AF(PJ01, 0) | \
1426
PIN_AFIO_AF(PJ02, 0) | \
1427
PIN_AFIO_AF(PJ03, 0) | \
1428
PIN_AFIO_AF(PJ04, 0) | \
1429
PIN_AFIO_AF(PJ05, 0) | \
1430
PIN_AFIO_AF(PJ06, 0) | \
1431
PIN_AFIO_AF(PJ07, 0))
1424
#define VAL_GPIOJ_AFRL (PIN_AFIO_AF(PJ00, 0) | \
…
1432
1433
#define VAL_GPIOJ_AFRH (PIN_AFIO_AF(PJ08, 0) | \
1434
PIN_AFIO_AF(PJ09, 0) | \
1435
PIN_AFIO_AF(PJ10, 0) | \
1436
PIN_AFIO_AF(PJ11, 0) | \
1437
PIN_AFIO_AF(PJ12, 0) | \
1438
PIN_AFIO_AF(PJ13, 0) | \
1439
PIN_AFIO_AF(PJ14, 0) | \
1440
PIN_AFIO_AF(PJ15, 0))
1433
#define VAL_GPIOJ_AFRH (PIN_AFIO_AF(PJ08, 0) | \
…
1441
1442
#define VAL_GPIOK_MODER (PIN_MODE_INPUT(PK00) | \
1443
PIN_MODE_INPUT(PK01) | \
1444
PIN_MODE_INPUT(PK02) | \
1445
PIN_MODE_INPUT(PK03) | \
1446
PIN_MODE_INPUT(PK04) | \
1447
PIN_MODE_INPUT(PK05) | \
1448
PIN_MODE_INPUT(PK06) | \
1449
PIN_MODE_INPUT(PK07) | \
1450
PIN_MODE_INPUT(PK08) | \
1451
PIN_MODE_INPUT(PK09) | \
1452
PIN_MODE_INPUT(PK10) | \
1453
PIN_MODE_INPUT(PK11) | \
1454
PIN_MODE_INPUT(PK12) | \
1455
PIN_MODE_INPUT(PK13) | \
1456
PIN_MODE_INPUT(PK14) | \
1457
PIN_MODE_INPUT(PK15))
1442
#define VAL_GPIOK_MODER (PIN_MODE_INPUT(PK00) | \
…
1458
1459
#define VAL_GPIOK_OTYPER (PIN_OTYPE_PUSHPULL(PK00) | \
1460
PIN_OTYPE_PUSHPULL(PK01) | \
1461
PIN_OTYPE_PUSHPULL(PK02) | \
1462
PIN_OTYPE_PUSHPULL(PK03) | \
1463
PIN_OTYPE_PUSHPULL(PK04) | \
1464
PIN_OTYPE_PUSHPULL(PK05) | \
1465
PIN_OTYPE_PUSHPULL(PK06) | \
1466
PIN_OTYPE_PUSHPULL(PK07) | \
1467
PIN_OTYPE_PUSHPULL(PK08) | \
1468
PIN_OTYPE_PUSHPULL(PK09) | \
1469
PIN_OTYPE_PUSHPULL(PK10) | \
1470
PIN_OTYPE_PUSHPULL(PK11) | \
1471
PIN_OTYPE_PUSHPULL(PK12) | \
1472
PIN_OTYPE_PUSHPULL(PK13) | \
1473
PIN_OTYPE_PUSHPULL(PK14) | \
1474
PIN_OTYPE_PUSHPULL(PK15))
1459
#define VAL_GPIOK_OTYPER (PIN_OTYPE_PUSHPULL(PK00) | \
…
1475
1476
#define VAL_GPIOK_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PK00) | \
1477
PIN_OSPEED_SPEED_VERYLOW(PK01) | \
1478
PIN_OSPEED_SPEED_VERYLOW(PK02) | \
1479
PIN_OSPEED_SPEED_VERYLOW(PK03) | \
1480
PIN_OSPEED_SPEED_VERYLOW(PK04) | \
1481
PIN_OSPEED_SPEED_VERYLOW(PK05) | \
1482
PIN_OSPEED_SPEED_VERYLOW(PK06) | \
1483
PIN_OSPEED_SPEED_VERYLOW(PK07) | \
1484
PIN_OSPEED_SPEED_VERYLOW(PK08) | \
1485
PIN_OSPEED_SPEED_VERYLOW(PK09) | \
1486
PIN_OSPEED_SPEED_VERYLOW(PK10) | \
1487
PIN_OSPEED_SPEED_VERYLOW(PK11) | \
1488
PIN_OSPEED_SPEED_VERYLOW(PK12) | \
1489
PIN_OSPEED_SPEED_VERYLOW(PK13) | \
1490
PIN_OSPEED_SPEED_VERYLOW(PK14) | \
1491
PIN_OSPEED_SPEED_VERYLOW(PK15))
1476
#define VAL_GPIOK_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PK00) | \
…
1492
1493
#define VAL_GPIOK_PUPDR (PIN_PUPDR_PULLDOWN(PK00) | \
1494
PIN_PUPDR_PULLDOWN(PK01) | \
1495
PIN_PUPDR_PULLDOWN(PK02) | \
1496
PIN_PUPDR_PULLDOWN(PK03) | \
1497
PIN_PUPDR_PULLDOWN(PK04) | \
1498
PIN_PUPDR_PULLDOWN(PK05) | \
1499
PIN_PUPDR_PULLDOWN(PK06) | \
1500
PIN_PUPDR_PULLDOWN(PK07) | \
1501
PIN_PUPDR_PULLDOWN(PK08) | \
1502
PIN_PUPDR_PULLDOWN(PK09) | \
1503
PIN_PUPDR_PULLDOWN(PK10) | \
1504
PIN_PUPDR_PULLDOWN(PK11) | \
1505
PIN_PUPDR_PULLDOWN(PK12) | \
1506
PIN_PUPDR_PULLDOWN(PK13) | \
1507
PIN_PUPDR_PULLDOWN(PK14) | \
1508
PIN_PUPDR_PULLDOWN(PK15))
1493
#define VAL_GPIOK_PUPDR (PIN_PUPDR_PULLDOWN(PK00) | \
…
1509
1510
#define VAL_GPIOK_ODR (PIN_ODR_LEVEL_LOW(PK00) | \
1511
PIN_ODR_LEVEL_LOW(PK01) | \
1512
PIN_ODR_LEVEL_LOW(PK02) | \
1513
PIN_ODR_LEVEL_LOW(PK03) | \
1514
PIN_ODR_LEVEL_LOW(PK04) | \
1515
PIN_ODR_LEVEL_LOW(PK05) | \
1516
PIN_ODR_LEVEL_LOW(PK06) | \
1517
PIN_ODR_LEVEL_LOW(PK07) | \
1518
PIN_ODR_LEVEL_LOW(PK08) | \
1519
PIN_ODR_LEVEL_LOW(PK09) | \
1520
PIN_ODR_LEVEL_LOW(PK10) | \
1521
PIN_ODR_LEVEL_LOW(PK11) | \
1522
PIN_ODR_LEVEL_LOW(PK12) | \
1523
PIN_ODR_LEVEL_LOW(PK13) | \
1524
PIN_ODR_LEVEL_LOW(PK14) | \
1525
PIN_ODR_LEVEL_LOW(PK15))
1510
#define VAL_GPIOK_ODR (PIN_ODR_LEVEL_LOW(PK00) | \
…
1526
1527
#define VAL_GPIOK_AFRL (PIN_AFIO_AF(PK00, 0) | \
1528
PIN_AFIO_AF(PK01, 0) | \
1529
PIN_AFIO_AF(PK02, 0) | \
1530
PIN_AFIO_AF(PK03, 0) | \
1531
PIN_AFIO_AF(PK04, 0) | \
1532
PIN_AFIO_AF(PK05, 0) | \
1533
PIN_AFIO_AF(PK06, 0) | \
1534
PIN_AFIO_AF(PK07, 0))
1527
#define VAL_GPIOK_AFRL (PIN_AFIO_AF(PK00, 0) | \
…
1535
1536
#define VAL_GPIOK_AFRH (PIN_AFIO_AF(PK08, 0) | \
1537
PIN_AFIO_AF(PK09, 0) | \
1538
PIN_AFIO_AF(PK10, 0) | \
1539
PIN_AFIO_AF(PK11, 0) | \
1540
PIN_AFIO_AF(PK12, 0) | \
1541
PIN_AFIO_AF(PK13, 0) | \
1542
PIN_AFIO_AF(PK14, 0) | \
1543
PIN_AFIO_AF(PK15, 0))
1536
#define VAL_GPIOK_AFRH (PIN_AFIO_AF(PK08, 0) | \
…
1544
1545
#define AF_PA03_UART2 7U
1546
#define AF_LINE_UART2 7U
1547
#define AF_PA05_SPI1_SCK 5U
1548
#define AF_LINE_SPI1_SCK 5U
1549
#define AF_PA06_SPI6_MISO 8U
1550
#define AF_LINE_SPI6_MISO 8U
1551
#define AF_PA08_I2C3_SCL 4U
1552
#define AF_LINE_I2C3_SCL 4U
1553
#define AF_PA11_USB_DM 10U
1554
#define AF_LINE_USB_DM 10U
1555
#define AF_PA12_USB_DP 10U
1556
#define AF_LINE_USB_DP 10U
1557
#define AF_PA13_SWDIO 0U
1558
#define AF_LINE_SWDIO 0U
1559
#define AF_PA14_SWCLK 0U
1560
#define AF_LINE_SWCLK 0U
1561
#define AF_PB02_SPI3_MOSI 7U
1562
#define AF_LINE_SPI3_MOSI 7U
1563
#define AF_PB03_SPI6_SCK 8U
1564
#define AF_LINE_SPI6_SCK 8U
1565
#define AF_PB04_SDIO_D3 9U
1566
#define AF_LINE_SDIO_D3 9U
1567
#define AF_PB05_SPI1_MOSI 5U
1568
#define AF_LINE_SPI1_MOSI 5U
1569
#define AF_PB06_UART1_TX 7U
1570
#define AF_LINE_UART1_TX 7U
1571
#define AF_PB07_UART1_RX 7U
1572
#define AF_LINE_UART1_RX 7U
1573
#define AF_PB08_I2C1_SCL 4U
1574
#define AF_LINE_I2C1_SCL 4U
1575
#define AF_PB09_I2C1_SDA 4U
1576
#define AF_LINE_I2C1_SDA 4U
1577
#define AF_PB12_CAN2_RX 9U
1578
#define AF_LINE_CAN2_RX 9U
1579
#define AF_PB13_CAN2_TX 9U
1580
#define AF_LINE_CAN2_TX 9U
1581
#define AF_PB14_SDIO_D0 9U
1582
#define AF_LINE_SDIO_D0 9U
1583
#define AF_PB15_SDIO_D1 9U
1584
#define AF_LINE_SDIO_D1 9U
1585
#define AF_PC06_UART6_TX 7U
1586
#define AF_LINE_UART6_TX 7U
1587
#define AF_PC07_UART6_RX 7U
1588
#define AF_LINE_UART6_RX 7U
1589
#define AF_PC10_SPI3_SCK 6U
1590
#define AF_LINE_SPI3_SCK 6U
1591
#define AF_PC11_SPI3_MISO 6U
1592
#define AF_LINE_SPI3_MISO 6U
1593
#define AF_PC12_UART5_TX 8U
1594
#define AF_LINE_UART5_TX 8U
1595
#define AF_PD00_CAN1_RX 9U
1596
#define AF_LINE_CAN1_RX 9U
1597
#define AF_PD01_CAN1_TX 9U
1598
#define AF_LINE_CAN1_TX 9U
1599
#define AF_PD02_UART5_RX 8U
1600
#define AF_LINE_UART5_RX 8U
1601
#define AF_PD05_UART2_TX 7U
1602
#define AF_LINE_UART2_TX 7U
1603
#define AF_PD06_SDIO_CK 11U
1604
#define AF_LINE_SDIO_CK 11U
1605
#define AF_PD07_SDIO_CMD 11U
1606
#define AF_LINE_SDIO_CMD 11U
1607
#define AF_PD08_UART3_TX 7U
1608
#define AF_LINE_UART3_TX 7U
1609
#define AF_PD09_UART3_RX 7U
1610
#define AF_LINE_UART3_RX 7U
1611
#define AF_PD13_SERVO5 2U
1612
#define AF_LINE_SERVO5 2U
1613
#define AF_PD14_SERVO6 2U
1614
#define AF_LINE_SERVO6 2U
1615
#define AF_PE00_UART8_RX 8U
1616
#define AF_LINE_UART8_RX 8U
1617
#define AF_PE01_UART8_TX 8U
1618
#define AF_LINE_UART8_TX 8U
1619
#define AF_PE08_UART7_TX 7U
1620
#define AF_LINE_UART7_TX 7U
1621
#define AF_PE12_SPI4_SCK 5U
1622
#define AF_LINE_SPI4_SCK 5U
1623
#define AF_PE13_SPI4_MISO 5U
1624
#define AF_LINE_SPI4_MISO 5U
1625
#define AF_PE14_SPI4_MOSI 5U
1626
#define AF_LINE_SPI4_MOSI 5U
1627
#define AF_PF00_I2C2_SDA 4U
1628
#define AF_LINE_I2C2_SDA 4U
1629
#define AF_PF01_I2C2_SCL 4U
1630
#define AF_LINE_I2C2_SCL 4U
1631
#define AF_PF06_UART7_RX 7U
1632
#define AF_LINE_UART7_RX 7U
1633
#define AF_PF07_SPI5_SCK 5U
1634
#define AF_LINE_SPI5_SCK 5U
1635
#define AF_PF09_ALARM 1U
1636
#define AF_LINE_ALARM 1U
1637
#define AF_PF11_SPI5_MOSI 5U
1638
#define AF_LINE_SPI5_MOSI 5U
1639
#define AF_PF14_I2C4_SCL 4U
1640
#define AF_LINE_I2C4_SCL 4U
1641
#define AF_PF15_I2C4_SDA 4U
1642
#define AF_LINE_I2C4_SDA 4U
1643
#define AF_PG09_SPI1_MISO 5U
1644
#define AF_LINE_SPI1_MISO 5U
1645
#define AF_PG11_SDIO_D2 10U
1646
#define AF_LINE_SDIO_D2 10U
1647
#define AF_PG14_SPI6_MOSI 5U
1648
#define AF_LINE_SPI6_MOSI 5U
1649
#define AF_PH00_OSC_IN 0U
1650
#define AF_LINE_OSC_IN 0U
1651
#define AF_PH01_OSC_OUT 0U
1652
#define AF_LINE_OSC_OUT 0U
1653
#define AF_PH07_SPI5_MISO 5U
1654
#define AF_LINE_SPI5_MISO 5U
1655
#define AF_PH08_I2C3_SDA 4U
1656
#define AF_LINE_I2C3_SDA 4U
1657
#define AF_PH10_SERVO4 2U
1658
#define AF_LINE_SERVO4 2U
1659
#define AF_PH11_SERVO3 2U
1660
#define AF_LINE_SERVO3 2U
1661
#define AF_PH12_SERVO2 2U
1662
#define AF_LINE_SERVO2 2U
1663
#define AF_PH13_UART4_TX 8U
1664
#define AF_LINE_UART4_TX 8U
1665
#define AF_PH14_UART4_RX 8U
1666
#define AF_LINE_UART4_RX 8U
1667
#define AF_PI00_SERVO1 2U
1668
#define AF_LINE_SERVO1 2U
1669
#define AF_PI01_SPI2_SCK 5U
1670
#define AF_LINE_SPI2_SCK 5U
1671
#define AF_PI02_SPI2_MISO 5U
1672
#define AF_LINE_SPI2_MISO 5U
1673
#define AF_PI03_SPI2_MOSI 5U
1674
#define AF_LINE_SPI2_MOSI 5U
1675
#define AF_PI05_PWM_INPUT1 3U
1676
#define AF_LINE_PWM_INPUT1 3U
1677
1678
1679
#define ADC1_ADC 1
1680
#define ADC1_ADC_FN INP
1681
#define ADC1_ADC_INP 16
1682
#define UART2_USART 2
1683
#define UART2_USART_FN RX
1684
#define UART2_USART_AF 7
1685
#define ADC2_ADC 1
1686
#define ADC2_ADC_FN INP
1687
#define ADC2_ADC_INP 18
1688
#define ADC3_ADC 1
1689
#define ADC3_ADC_FN INP
1690
#define ADC3_ADC_INP 9
1691
#define ADC5_ADC 1
1692
#define ADC5_ADC_FN INP
1693
#define ADC5_ADC_INP 5
1694
#define ADC6_ADC 3
1695
#define ADC6_ADC_FN INP
1696
#define ADC6_ADC_INP 0
1697
#define ADC7_ADC 3
1698
#define ADC7_ADC_FN INP
1699
#define ADC7_ADC_INP 1
1700
#define SERVO5_TIM 4
1701
#define SERVO5_TIM_FN CH
1702
#define SERVO5_TIM_CH 2
1703
#define SERVO5_TIM_AF 2
1704
#define SERVO6_TIM 4
1705
#define SERVO6_TIM_FN CH
1706
#define SERVO6_TIM_CH 3
1707
#define SERVO6_TIM_AF 2
1708
#define ALARM_TIM 17
1709
#define ALARM_TIM_FN CH
1710
#define ALARM_TIM_CH 1
1711
#define ALARM_TIM_AF 1
1712
#define ADC4_ADC 1
1713
#define ADC4_ADC_FN INP
1714
#define ADC4_ADC_INP 6
1715
#define SERVO4_TIM 5
1716
#define SERVO4_TIM_FN CH
1717
#define SERVO4_TIM_CH 1
1718
#define SERVO4_TIM_AF 2
1719
#define SERVO3_TIM 5
1720
#define SERVO3_TIM_FN CH
1721
#define SERVO3_TIM_CH 2
1722
#define SERVO3_TIM_AF 2
1723
#define SERVO2_TIM 5
1724
#define SERVO2_TIM_FN CH
1725
#define SERVO2_TIM_CH 3
1726
#define SERVO2_TIM_AF 2
1727
#define SERVO1_TIM 5
1728
#define SERVO1_TIM_FN CH
1729
#define SERVO1_TIM_CH 4
1730
#define SERVO1_TIM_AF 2
1731
#define PWM_INPUT1_TIM 8
1732
#define PWM_INPUT1_TIM_FN CH
1733
#define PWM_INPUT1_TIM_CH 1
1734
#define PWM_INPUT1_TIM_AF 3
1735
1736
#define BOARD_GROUP_DECLFOREACH(line, group) \
1737
static const ioline_t group ## _ARRAY[] = {group}; \
1738
for (ioline_t i=0, line = group ## _ARRAY[i]; (i < group ## _SIZE) && (line = group ## _ARRAY[i]); i++)
1736
#define BOARD_GROUP_DECLFOREACH(line, group) \
…
1739
1740
#define BOARD_GROUP_FOREACH(line, group) \
1741
for (ioline_t i=0, line = group ## _ARRAY[i]; (i < group ## _SIZE) && (line = group ## _ARRAY[i]); i++)
1740
#define BOARD_GROUP_FOREACH(line, group) \
…
1742
1743
1744
#define BOARD_GROUP_DECLFOR(array, index, group) \
1745
static const ioline_t group ## _ARRAY[] = {group}; \
1746
for (ioline_t index=0, *array = (ioline_t *) group ## _ARRAY; index < group ## _SIZE; index++)
1744
#define BOARD_GROUP_DECLFOR(array, index, group) \
…
1747
1748
#define BOARD_GROUP_FOR(array, index, group) \
1749
for (ioline_t index=0, *array = (ioline_t *) group ## _ARRAY; index < group ## _SIZE; index++)
1748
#define BOARD_GROUP_FOR(array, index, group) \
…
1750
1751
#define ENERGY_SAVE_INPUTS \
1752
LINE_LED4, \
1753
LINE_SERVO5, \
1754
LINE_SERVO6, \
1755
LINE_LED1, \
1756
LINE_LED2, \
1757
LINE_LED3, \
1758
LINE_SPI_SLAVE6, \
1759
LINE_SPI_SLAVE2, \
1760
LINE_SERVO4, \
1761
LINE_SERVO3, \
1762
LINE_SERVO2, \
1763
LINE_SPI_SLAVE5, \
1764
LINE_SERVO1, \
1765
LINE_SPI_SLAVE3, \
1766
LINE_SPI_SLAVE4, \
1767
LINE_SPI_SLAVE1, \
1768
LINE_SPI_SLAVE7
1751
#define ENERGY_SAVE_INPUTS \
…
1769
#define ENERGY_SAVE_INPUTS_SIZE 17
1770
1771
#define ENERGY_SAVE_LOWS \
1772
LINE_VDD_3V3_SENSORS3_EN, \
1773
LINE_VDD_3V3_SENSORS2_EN, \
1774
LINE_ALARM, \
1775
LINE_VDD_3V3_SENSORS4_EN, \
1776
LINE_ETH_POWER_EN, \
1777
LINE_VDD_3V3_SENSORS1_EN
1771
#define ENERGY_SAVE_LOWS \
…
1778
#define ENERGY_SAVE_LOWS_SIZE 6
1779
1780
#if !defined(_FROM_ASM_)
1781
#ifdef __cplusplus
1782
extern
"C"
{
1783
#endif
1784
void
boardInit
(
void
);
1785
#ifdef __cplusplus
1786
}
1787
#endif
1788
#endif
/* _FROM_ASM_ */
1789
boardInit
void boardInit(void)
Board-specific initialization code.
Definition
board.c:317
sw
airborne
boards
px4fmu
chibios
v6x
board.h
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1.9.8
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