Register and address definitions for MPU-9250. More...

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Macros
#define	MPU9250_ADDR 0xD0

#define	MPU9250_ADDR_ALT 0xD2

#define	MPU9250_MAG_ADDR 0x18

#define	MPU9250_SPI_READ 0x80

#define	MPU9250_REG_AUX_VDDIO 0x01

#define	MPU9250_REG_USER_CTRL 0x6A

#define	MPU9250_REG_PWR_MGMT_1 0x6B

#define	MPU9250_REG_PWR_MGMT_2 0x6C

#define	MPU9250_REG_FIFO_EN 0x23

#define	MPU9250_REG_FIFO_COUNT_H 0x72

#define	MPU9250_REG_FIFO_COUNT_L 0x73

#define	MPU9250_REG_FIFO_R_W 0x74

#define	MPU9250_REG_SMPLRT_DIV 0x19

#define	MPU9250_REG_CONFIG 0x1A

#define	MPU9250_REG_GYRO_CONFIG 0x1B

#define	MPU9250_REG_ACCEL_CONFIG 0x1C

#define	MPU9250_REG_ACCEL_CONFIG_2 0x1D

#define	MPU9250_REG_I2C_MST_CTRL 0x24

#define	MPU9250_REG_I2C_MST_STATUS 0x36

#define	MPU9250_REG_I2C_MST_DELAY 0x67

#define	MPU9250_REG_I2C_SLV0_ADDR 0X25

#define	MPU9250_REG_I2C_SLV0_REG 0X26

#define	MPU9250_REG_I2C_SLV0_CTRL 0X27

#define	MPU9250_REG_I2C_SLV0_DO 0X63

#define	MPU9250_REG_I2C_SLV1_ADDR 0X28

#define	MPU9250_REG_I2C_SLV1_REG 0X29

#define	MPU9250_REG_I2C_SLV1_CTRL 0X2A

#define	MPU9250_REG_I2C_SLV1_DO 0X64

#define	MPU9250_REG_I2C_SLV2_ADDR 0X2B

#define	MPU9250_REG_I2C_SLV2_REG 0X2C

#define	MPU9250_REG_I2C_SLV2_CTRL 0X2D

#define	MPU9250_REG_I2C_SLV2_DO 0X65

#define	MPU9250_REG_I2C_SLV3_ADDR 0X2E

#define	MPU9250_REG_I2C_SLV3_REG 0X2F

#define	MPU9250_REG_I2C_SLV3_CTRL 0X30

#define	MPU9250_REG_I2C_SLV3_DO 0X66

#define	MPU9250_REG_I2C_SLV4_ADDR 0X31

#define	MPU9250_REG_I2C_SLV4_REG 0X32

#define	MPU9250_REG_I2C_SLV4_DO 0X33

#define	MPU9250_REG_I2C_SLV4_CTRL 0X34

#define	MPU9250_REG_I2C_SLV4_DI 0X35

#define	MPU9250_REG_INT_PIN_CFG 0x37

#define	MPU9250_REG_INT_ENABLE 0x38

#define	MPU9250_REG_INT_STATUS 0x3A

#define	MPU9250_REG_ACCEL_XOUT_H 0x3B

#define	MPU9250_REG_ACCEL_XOUT_L 0x3C

#define	MPU9250_REG_ACCEL_YOUT_H 0x3D

#define	MPU9250_REG_ACCEL_YOUT_L 0x3E

#define	MPU9250_REG_ACCEL_ZOUT_H 0x3F

#define	MPU9250_REG_ACCEL_ZOUT_L 0x40

#define	MPU9250_REG_TEMP_OUT_H 0x41

#define	MPU9250_REG_TEMP_OUT_L 0x42

#define	MPU9250_REG_GYRO_XOUT_H 0x43

#define	MPU9250_REG_GYRO_XOUT_L 0x44

#define	MPU9250_REG_GYRO_YOUT_H 0x45

#define	MPU9250_REG_GYRO_YOUT_L 0x46

#define	MPU9250_REG_GYRO_ZOUT_H 0x47

#define	MPU9250_REG_GYRO_ZOUT_L 0x48

#define	MPU9250_EXT_SENS_DATA 0x49

#define	MPU9250_EXT_SENS_DATA_SIZE 24

#define	MPU9250_REG_WHO_AM_I 0x75

#define	MPU9250_WHOAMI_REPLY 0x71

#define	MPU9250_I2C_BYPASS_EN 1

#define	MPU9250_SIG_COND_RESET 0

#define	MPU9250_I2C_MST_RESET 1

#define	MPU9250_FIFO_RESET 2

#define	MPU9250_I2C_IF_DIS 4

#define	MPU9250_I2C_MST_EN 5

#define	MPU9250_FIFO_EN 6

#define	MPU9250_I2C_SLV4_DONE 6

Enumerations
enum	Mpu9250DLPFGyro { MPU9250_DLPF_GYRO_250HZ = 0x0 , MPU9250_DLPF_GYRO_184HZ = 0x1 , MPU9250_DLPF_GYRO_92HZ = 0x2 , MPU9250_DLPF_GYRO_41HZ = 0x3 , MPU9250_DLPF_GYRO_20HZ = 0x4 , MPU9250_DLPF_GYRO_10HZ = 0x5 , MPU9250_DLPF_GYRO_05HZ = 0x6 }
	Digital Low Pass Filter Options. More...

enum	Mpu9250DLPFAccel { MPU9250_DLPF_ACCEL_460HZ = 0x0 , MPU9250_DLPF_ACCEL_184HZ = 0x1 , MPU9250_DLPF_ACCEL_92HZ = 0x2 , MPU9250_DLPF_ACCEL_41HZ = 0x3 , MPU9250_DLPF_ACCEL_20HZ = 0x4 , MPU9250_DLPF_ACCEL_10HZ = 0x5 , MPU9250_DLPF_ACCEL_05HZ = 0x6 }

enum	Mpu9250GyroRanges { MPU9250_GYRO_RANGE_250 = 0x00 , MPU9250_GYRO_RANGE_500 = 0x01 , MPU9250_GYRO_RANGE_1000 = 0x02 , MPU9250_GYRO_RANGE_2000 = 0x03 }
	Selectable gyro range. More...

enum	Mpu9250AccelRanges { MPU9250_ACCEL_RANGE_2G = 0x00 , MPU9250_ACCEL_RANGE_4G = 0x01 , MPU9250_ACCEL_RANGE_8G = 0x02 , MPU9250_ACCEL_RANGE_16G = 0x03 }
	Selectable accel range. More...

enum	Mpu9250MstClk { MPU9250_MST_CLK_500KHZ = 0x9 , MPU9250_MST_CLK_471KHZ = 0xA , MPU9250_MST_CLK_444KHZ = 0xB , MPU9250_MST_CLK_421KHZ = 0xC , MPU9250_MST_CLK_400KHZ = 0xD , MPU9250_MST_CLK_381KHZ = 0xE , MPU9250_MST_CLK_364KHZ = 0xF , MPU9250_MST_CLK_348KHZ = 0x0 , MPU9250_MST_CLK_333KHZ = 0x1 , MPU9250_MST_CLK_320KHZ = 0x2 , MPU9250_MST_CLK_308KHZ = 0x3 , MPU9250_MST_CLK_296KHZ = 0x4 , MPU9250_MST_CLK_286KHZ = 0x5 , MPU9250_MST_CLK_276KHZ = 0x6 , MPU9250_MST_CLK_267KHZ = 0x7 , MPU9250_MST_CLK_258KHZ = 0x8 }
	I2C Master clock. More...

Detailed Description

Register and address definitions for MPU-9250.

Definition in file mpu9250_regs.h.

Macro Definition Documentation

◆ MPU9250_ADDR

#define MPU9250_ADDR 0xD0

Definition at line 32 of file mpu9250_regs.h.

◆ MPU9250_ADDR_ALT

#define MPU9250_ADDR_ALT 0xD2

Definition at line 33 of file mpu9250_regs.h.

◆ MPU9250_EXT_SENS_DATA

#define MPU9250_EXT_SENS_DATA 0x49

Definition at line 116 of file mpu9250_regs.h.

◆ MPU9250_EXT_SENS_DATA_SIZE

#define MPU9250_EXT_SENS_DATA_SIZE 24

Definition at line 117 of file mpu9250_regs.h.

◆ MPU9250_FIFO_EN

#define MPU9250_FIFO_EN 6

Definition at line 132 of file mpu9250_regs.h.

◆ MPU9250_FIFO_RESET

#define MPU9250_FIFO_RESET 2

Definition at line 129 of file mpu9250_regs.h.

◆ MPU9250_I2C_BYPASS_EN

#define MPU9250_I2C_BYPASS_EN 1

Definition at line 124 of file mpu9250_regs.h.

◆ MPU9250_I2C_IF_DIS

#define MPU9250_I2C_IF_DIS 4

Definition at line 130 of file mpu9250_regs.h.

◆ MPU9250_I2C_MST_EN

#define MPU9250_I2C_MST_EN 5

Definition at line 131 of file mpu9250_regs.h.

◆ MPU9250_I2C_MST_RESET

#define MPU9250_I2C_MST_RESET 1

Definition at line 128 of file mpu9250_regs.h.

◆ MPU9250_I2C_SLV4_DONE

#define MPU9250_I2C_SLV4_DONE 6

Definition at line 135 of file mpu9250_regs.h.

◆ MPU9250_MAG_ADDR

#define MPU9250_MAG_ADDR 0x18

Definition at line 35 of file mpu9250_regs.h.

◆ MPU9250_REG_ACCEL_CONFIG

#define MPU9250_REG_ACCEL_CONFIG 0x1C

Definition at line 55 of file mpu9250_regs.h.

◆ MPU9250_REG_ACCEL_CONFIG_2

#define MPU9250_REG_ACCEL_CONFIG_2 0x1D

Definition at line 56 of file mpu9250_regs.h.

◆ MPU9250_REG_ACCEL_XOUT_H

#define MPU9250_REG_ACCEL_XOUT_H 0x3B

Definition at line 96 of file mpu9250_regs.h.

◆ MPU9250_REG_ACCEL_XOUT_L

#define MPU9250_REG_ACCEL_XOUT_L 0x3C

Definition at line 97 of file mpu9250_regs.h.

◆ MPU9250_REG_ACCEL_YOUT_H

#define MPU9250_REG_ACCEL_YOUT_H 0x3D

Definition at line 98 of file mpu9250_regs.h.

◆ MPU9250_REG_ACCEL_YOUT_L

#define MPU9250_REG_ACCEL_YOUT_L 0x3E

Definition at line 99 of file mpu9250_regs.h.

◆ MPU9250_REG_ACCEL_ZOUT_H

#define MPU9250_REG_ACCEL_ZOUT_H 0x3F

Definition at line 100 of file mpu9250_regs.h.

◆ MPU9250_REG_ACCEL_ZOUT_L

#define MPU9250_REG_ACCEL_ZOUT_L 0x40

Definition at line 101 of file mpu9250_regs.h.

◆ MPU9250_REG_AUX_VDDIO

#define MPU9250_REG_AUX_VDDIO 0x01

Definition at line 40 of file mpu9250_regs.h.

◆ MPU9250_REG_CONFIG

#define MPU9250_REG_CONFIG 0x1A

Definition at line 53 of file mpu9250_regs.h.

◆ MPU9250_REG_FIFO_COUNT_H

#define MPU9250_REG_FIFO_COUNT_H 0x72

Definition at line 47 of file mpu9250_regs.h.

◆ MPU9250_REG_FIFO_COUNT_L

#define MPU9250_REG_FIFO_COUNT_L 0x73

Definition at line 48 of file mpu9250_regs.h.

◆ MPU9250_REG_FIFO_EN

#define MPU9250_REG_FIFO_EN 0x23

Definition at line 46 of file mpu9250_regs.h.

◆ MPU9250_REG_FIFO_R_W

#define MPU9250_REG_FIFO_R_W 0x74

Definition at line 49 of file mpu9250_regs.h.

◆ MPU9250_REG_GYRO_CONFIG

#define MPU9250_REG_GYRO_CONFIG 0x1B

Definition at line 54 of file mpu9250_regs.h.

◆ MPU9250_REG_GYRO_XOUT_H

#define MPU9250_REG_GYRO_XOUT_H 0x43

Definition at line 108 of file mpu9250_regs.h.

◆ MPU9250_REG_GYRO_XOUT_L

#define MPU9250_REG_GYRO_XOUT_L 0x44

Definition at line 109 of file mpu9250_regs.h.

◆ MPU9250_REG_GYRO_YOUT_H

#define MPU9250_REG_GYRO_YOUT_H 0x45

Definition at line 110 of file mpu9250_regs.h.

◆ MPU9250_REG_GYRO_YOUT_L

#define MPU9250_REG_GYRO_YOUT_L 0x46

Definition at line 111 of file mpu9250_regs.h.

◆ MPU9250_REG_GYRO_ZOUT_H

#define MPU9250_REG_GYRO_ZOUT_H 0x47

Definition at line 112 of file mpu9250_regs.h.

◆ MPU9250_REG_GYRO_ZOUT_L

#define MPU9250_REG_GYRO_ZOUT_L 0x48

Definition at line 113 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_MST_CTRL

#define MPU9250_REG_I2C_MST_CTRL 0x24

Definition at line 60 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_MST_DELAY

#define MPU9250_REG_I2C_MST_DELAY 0x67

Definition at line 62 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_MST_STATUS

#define MPU9250_REG_I2C_MST_STATUS 0x36

Definition at line 61 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV0_ADDR

#define MPU9250_REG_I2C_SLV0_ADDR 0X25

Definition at line 64 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV0_CTRL

#define MPU9250_REG_I2C_SLV0_CTRL 0X27

Definition at line 66 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV0_DO

#define MPU9250_REG_I2C_SLV0_DO 0X63

Definition at line 67 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV0_REG

#define MPU9250_REG_I2C_SLV0_REG 0X26

Definition at line 65 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV1_ADDR

#define MPU9250_REG_I2C_SLV1_ADDR 0X28

Definition at line 69 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV1_CTRL

#define MPU9250_REG_I2C_SLV1_CTRL 0X2A

Definition at line 71 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV1_DO

#define MPU9250_REG_I2C_SLV1_DO 0X64

Definition at line 72 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV1_REG

#define MPU9250_REG_I2C_SLV1_REG 0X29

Definition at line 70 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV2_ADDR

#define MPU9250_REG_I2C_SLV2_ADDR 0X2B

Definition at line 74 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV2_CTRL

#define MPU9250_REG_I2C_SLV2_CTRL 0X2D

Definition at line 76 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV2_DO

#define MPU9250_REG_I2C_SLV2_DO 0X65

Definition at line 77 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV2_REG

#define MPU9250_REG_I2C_SLV2_REG 0X2C

Definition at line 75 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV3_ADDR

#define MPU9250_REG_I2C_SLV3_ADDR 0X2E

Definition at line 79 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV3_CTRL

#define MPU9250_REG_I2C_SLV3_CTRL 0X30

Definition at line 81 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV3_DO

#define MPU9250_REG_I2C_SLV3_DO 0X66

Definition at line 82 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV3_REG

#define MPU9250_REG_I2C_SLV3_REG 0X2F

Definition at line 80 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV4_ADDR

#define MPU9250_REG_I2C_SLV4_ADDR 0X31

Definition at line 84 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV4_CTRL

#define MPU9250_REG_I2C_SLV4_CTRL 0X34

Definition at line 87 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV4_DI

#define MPU9250_REG_I2C_SLV4_DI 0X35

Definition at line 88 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV4_DO

#define MPU9250_REG_I2C_SLV4_DO 0X33

Definition at line 86 of file mpu9250_regs.h.

◆ MPU9250_REG_I2C_SLV4_REG

#define MPU9250_REG_I2C_SLV4_REG 0X32

Definition at line 85 of file mpu9250_regs.h.

◆ MPU9250_REG_INT_ENABLE

#define MPU9250_REG_INT_ENABLE 0x38

Definition at line 92 of file mpu9250_regs.h.

◆ MPU9250_REG_INT_PIN_CFG

#define MPU9250_REG_INT_PIN_CFG 0x37

Definition at line 91 of file mpu9250_regs.h.

◆ MPU9250_REG_INT_STATUS

#define MPU9250_REG_INT_STATUS 0x3A

Definition at line 93 of file mpu9250_regs.h.

◆ MPU9250_REG_PWR_MGMT_1

#define MPU9250_REG_PWR_MGMT_1 0x6B

Definition at line 42 of file mpu9250_regs.h.

◆ MPU9250_REG_PWR_MGMT_2

#define MPU9250_REG_PWR_MGMT_2 0x6C

Definition at line 43 of file mpu9250_regs.h.

◆ MPU9250_REG_SMPLRT_DIV

#define MPU9250_REG_SMPLRT_DIV 0x19

Definition at line 52 of file mpu9250_regs.h.

◆ MPU9250_REG_TEMP_OUT_H

#define MPU9250_REG_TEMP_OUT_H 0x41

Definition at line 104 of file mpu9250_regs.h.

◆ MPU9250_REG_TEMP_OUT_L

#define MPU9250_REG_TEMP_OUT_L 0x42

Definition at line 105 of file mpu9250_regs.h.

◆ MPU9250_REG_USER_CTRL

#define MPU9250_REG_USER_CTRL 0x6A

Definition at line 41 of file mpu9250_regs.h.

◆ MPU9250_REG_WHO_AM_I

#define MPU9250_REG_WHO_AM_I 0x75

Definition at line 120 of file mpu9250_regs.h.

◆ MPU9250_SIG_COND_RESET

#define MPU9250_SIG_COND_RESET 0

Definition at line 127 of file mpu9250_regs.h.

◆ MPU9250_SPI_READ

#define MPU9250_SPI_READ 0x80

Definition at line 37 of file mpu9250_regs.h.

◆ MPU9250_WHOAMI_REPLY

#define MPU9250_WHOAMI_REPLY 0x71

Definition at line 121 of file mpu9250_regs.h.

Enumeration Type Documentation

◆ Mpu9250AccelRanges

enum Mpu9250AccelRanges

Selectable accel range.

Enumerator
MPU9250_ACCEL_RANGE_2G
MPU9250_ACCEL_RANGE_4G
MPU9250_ACCEL_RANGE_8G
MPU9250_ACCEL_RANGE_16G

Definition at line 172 of file mpu9250_regs.h.

◆ Mpu9250DLPFAccel

enum Mpu9250DLPFAccel

Enumerator
MPU9250_DLPF_ACCEL_460HZ
MPU9250_DLPF_ACCEL_184HZ
MPU9250_DLPF_ACCEL_92HZ
MPU9250_DLPF_ACCEL_41HZ
MPU9250_DLPF_ACCEL_20HZ
MPU9250_DLPF_ACCEL_10HZ
MPU9250_DLPF_ACCEL_05HZ

Definition at line 149 of file mpu9250_regs.h.

◆ Mpu9250DLPFGyro

enum Mpu9250DLPFGyro

Digital Low Pass Filter Options.

Enumerator
MPU9250_DLPF_GYRO_250HZ
MPU9250_DLPF_GYRO_184HZ
MPU9250_DLPF_GYRO_92HZ
MPU9250_DLPF_GYRO_41HZ
MPU9250_DLPF_GYRO_20HZ
MPU9250_DLPF_GYRO_10HZ
MPU9250_DLPF_GYRO_05HZ

Definition at line 139 of file mpu9250_regs.h.

◆ Mpu9250GyroRanges

enum Mpu9250GyroRanges

Selectable gyro range.

Enumerator
MPU9250_GYRO_RANGE_250
MPU9250_GYRO_RANGE_500
MPU9250_GYRO_RANGE_1000
MPU9250_GYRO_RANGE_2000

Definition at line 162 of file mpu9250_regs.h.

◆ Mpu9250MstClk

enum Mpu9250MstClk

I2C Master clock.

Enumerator
MPU9250_MST_CLK_500KHZ
MPU9250_MST_CLK_471KHZ
MPU9250_MST_CLK_444KHZ
MPU9250_MST_CLK_421KHZ
MPU9250_MST_CLK_400KHZ
MPU9250_MST_CLK_381KHZ
MPU9250_MST_CLK_364KHZ
MPU9250_MST_CLK_348KHZ
MPU9250_MST_CLK_333KHZ
MPU9250_MST_CLK_320KHZ
MPU9250_MST_CLK_308KHZ
MPU9250_MST_CLK_296KHZ
MPU9250_MST_CLK_286KHZ
MPU9250_MST_CLK_276KHZ
MPU9250_MST_CLK_267KHZ
MPU9250_MST_CLK_258KHZ

Definition at line 182 of file mpu9250_regs.h.

Macros

Enumerations