36 #define __STDC_FORMAT_MACROS
74 #define REG_TO_SIGNED(_reg) ((int16_t)(_reg))
75 #define SIGNED_TO_REG(_signed) ((uint16_t)(_signed))
77 #define REG_TO_FLOAT(_reg) ((float)REG_TO_SIGNED(_reg) / 10000.0f)
78 #define FLOAT_TO_REG(_float) SIGNED_TO_REG((int16_t)((_float) * 10000.0f))
80 #define PX4IO_PROTOCOL_VERSION 4
83 #define PX4IO_PROTOCOL_MAX_CONTROL_COUNT 8
86 #define PX4IO_PAGE_CONFIG 0
87 #define PX4IO_P_CONFIG_PROTOCOL_VERSION 0
88 #define PX4IO_P_CONFIG_HARDWARE_VERSION 1
89 #define PX4IO_P_CONFIG_BOOTLOADER_VERSION 2
90 #define PX4IO_P_CONFIG_MAX_TRANSFER 3
91 #define PX4IO_P_CONFIG_CONTROL_COUNT 4
92 #define PX4IO_P_CONFIG_ACTUATOR_COUNT 5
93 #define PX4IO_P_CONFIG_RC_INPUT_COUNT 6
94 #define PX4IO_P_CONFIG_ADC_INPUT_COUNT 7
95 #define PX4IO_P_CONFIG_RELAY_COUNT 8
96 #define PX4IO_P_CONFIG_CONTROL_GROUP_COUNT 8
99 #define PX4IO_PAGE_STATUS 1
100 #define PX4IO_P_STATUS_FREEMEM 0
101 #define PX4IO_P_STATUS_CPULOAD 1
103 #define PX4IO_P_STATUS_FLAGS 2
104 #define PX4IO_P_STATUS_FLAGS_OUTPUTS_ARMED (1 << 0)
105 #define PX4IO_P_STATUS_FLAGS_OVERRIDE (1 << 1)
106 #define PX4IO_P_STATUS_FLAGS_RC_OK (1 << 2)
107 #define PX4IO_P_STATUS_FLAGS_RC_PPM (1 << 3)
108 #define PX4IO_P_STATUS_FLAGS_RC_DSM (1 << 4)
109 #define PX4IO_P_STATUS_FLAGS_RC_SBUS (1 << 5)
110 #define PX4IO_P_STATUS_FLAGS_FMU_OK (1 << 6)
111 #define PX4IO_P_STATUS_FLAGS_RAW_PWM (1 << 7)
112 #define PX4IO_P_STATUS_FLAGS_MIXER_OK (1 << 8)
113 #define PX4IO_P_STATUS_FLAGS_ARM_SYNC (1 << 9)
114 #define PX4IO_P_STATUS_FLAGS_INIT_OK (1 << 10)
115 #define PX4IO_P_STATUS_FLAGS_FAILSAFE (1 << 11)
116 #define PX4IO_P_STATUS_FLAGS_SAFETY_OFF (1 << 12)
117 #define PX4IO_P_STATUS_FLAGS_FMU_INITIALIZED (1 << 13)
118 #define PX4IO_P_STATUS_FLAGS_RC_ST24 (1 << 14)
119 #define PX4IO_P_STATUS_FLAGS_RC_SUMD (1 << 15)
121 #define PX4IO_P_STATUS_ALARMS 3
122 #define PX4IO_P_STATUS_ALARMS_VBATT_LOW (1 << 0)
123 #define PX4IO_P_STATUS_ALARMS_TEMPERATURE (1 << 1)
124 #define PX4IO_P_STATUS_ALARMS_SERVO_CURRENT (1 << 2)
125 #define PX4IO_P_STATUS_ALARMS_ACC_CURRENT (1 << 3)
126 #define PX4IO_P_STATUS_ALARMS_FMU_LOST (1 << 4)
127 #define PX4IO_P_STATUS_ALARMS_RC_LOST (1 << 5)
128 #define PX4IO_P_STATUS_ALARMS_PWM_ERROR (1 << 6)
129 #define PX4IO_P_STATUS_ALARMS_VSERVO_FAULT (1 << 7)
131 #define PX4IO_P_STATUS_VBATT 4
132 #define PX4IO_P_STATUS_IBATT 5
133 #define PX4IO_P_STATUS_VSERVO 6
134 #define PX4IO_P_STATUS_VRSSI 7
135 #define PX4IO_P_STATUS_PRSSI 8
137 #define PX4IO_P_STATUS_MIXER 9
138 #define PX4IO_P_STATUS_MIXER_LOWER_LIMIT (1 << 0)
139 #define PX4IO_P_STATUS_MIXER_UPPER_LIMIT (1 << 1)
140 #define PX4IO_P_STATUS_MIXER_YAW_LIMIT (1 << 2)
143 #define PX4IO_PAGE_ACTUATORS 2
146 #define PX4IO_PAGE_SERVOS 3
149 #define PX4IO_PAGE_RAW_RC_INPUT 4
150 #define PX4IO_P_RAW_RC_COUNT 0
151 #define PX4IO_P_RAW_RC_FLAGS 1
152 #define PX4IO_P_RAW_RC_FLAGS_FRAME_DROP (1 << 0)
153 #define PX4IO_P_RAW_RC_FLAGS_FAILSAFE (1 << 1)
154 #define PX4IO_P_RAW_RC_FLAGS_RC_DSM11 (1 << 2)
155 #define PX4IO_P_RAW_RC_FLAGS_MAPPING_OK (1 << 3)
156 #define PX4IO_P_RAW_RC_FLAGS_RC_OK (1 << 4)
158 #define PX4IO_P_RAW_RC_NRSSI 2
159 #define PX4IO_P_RAW_RC_DATA 3
160 #define PX4IO_P_RAW_FRAME_COUNT 4
161 #define PX4IO_P_RAW_LOST_FRAME_COUNT 5
162 #define PX4IO_P_RAW_RC_BASE 6
165 #define PX4IO_PAGE_RC_INPUT 5
166 #define PX4IO_P_RC_VALID 0
167 #define PX4IO_P_RC_BASE 1
170 #define PX4IO_PAGE_RAW_ADC_INPUT 6
173 #define PX4IO_PAGE_PWM_INFO 7
174 #define PX4IO_RATE_MAP_BASE 0
177 #define PX4IO_PAGE_SETUP 50
178 #define PX4IO_P_SETUP_FEATURES 0
179 #define PX4IO_P_SETUP_FEATURES_SBUS1_OUT (1 << 0)
180 #define PX4IO_P_SETUP_FEATURES_SBUS2_OUT (1 << 1)
181 #define PX4IO_P_SETUP_FEATURES_PWM_RSSI (1 << 2)
182 #define PX4IO_P_SETUP_FEATURES_ADC_RSSI (1 << 3)
184 #define PX4IO_P_SETUP_ARMING 1
185 #define PX4IO_P_SETUP_ARMING_IO_ARM_OK (1 << 0)
186 #define PX4IO_P_SETUP_ARMING_FMU_ARMED (1 << 1)
187 #define PX4IO_P_SETUP_ARMING_MANUAL_OVERRIDE_OK (1 << 2)
188 #define PX4IO_P_SETUP_ARMING_FAILSAFE_CUSTOM (1 << 3)
189 #define PX4IO_P_SETUP_ARMING_INAIR_RESTART_OK (1 << 4)
190 #define PX4IO_P_SETUP_ARMING_ALWAYS_PWM_ENABLE (1 << 5)
191 #define PX4IO_P_SETUP_ARMING_RC_HANDLING_DISABLED (1 << 6)
192 #define PX4IO_P_SETUP_ARMING_LOCKDOWN (1 << 7)
193 #define PX4IO_P_SETUP_ARMING_FORCE_FAILSAFE (1 << 8)
194 #define PX4IO_P_SETUP_ARMING_TERMINATION_FAILSAFE (1 << 9)
195 #define PX4IO_P_SETUP_ARMING_OVERRIDE_IMMEDIATE (1 << 10)
197 #define PX4IO_P_SETUP_PWM_RATES 2
198 #define PX4IO_P_SETUP_PWM_DEFAULTRATE 3
199 #define PX4IO_P_SETUP_PWM_ALTRATE 4
201 #if defined(CONFIG_ARCH_BOARD_PX4IO_V1) || defined(CONFIG_ARCH_BOARD_PX4FMU_V1)
202 #define PX4IO_P_SETUP_RELAYS 5
203 #define PX4IO_P_SETUP_RELAYS_POWER1 (1<<0)
204 #define PX4IO_P_SETUP_RELAYS_POWER2 (1<<1)
205 #define PX4IO_P_SETUP_RELAYS_ACC1 (1<<2)
206 #define PX4IO_P_SETUP_RELAYS_ACC2 (1<<3)
208 #define PX4IO_P_SETUP_RELAYS_PAD 5
211 #define PX4IO_P_SETUP_VBATT_SCALE 6
212 #define PX4IO_P_SETUP_VSERVO_SCALE 6
213 #define PX4IO_P_SETUP_DSM 7
222 #define PX4IO_P_SETUP_SET_DEBUG 9
224 #define PX4IO_P_SETUP_REBOOT_BL 10
225 #define PX4IO_REBOOT_BL_MAGIC 14662
227 #define PX4IO_P_SETUP_CRC 11
229 #define PX4IO_P_SETUP_FORCE_SAFETY_OFF 12
232 #define PX4IO_P_SETUP_RC_THR_FAILSAFE_US 13
234 #define PX4IO_P_SETUP_FORCE_SAFETY_ON 14
235 #define PX4IO_FORCE_SAFETY_MAGIC 22027
237 #define PX4IO_P_SETUP_PWM_REVERSE 15
238 #define PX4IO_P_SETUP_TRIM_ROLL 16
239 #define PX4IO_P_SETUP_TRIM_PITCH 17
240 #define PX4IO_P_SETUP_TRIM_YAW 18
243 #define PX4IO_PAGE_CONTROLS 51
244 #define PX4IO_P_CONTROLS_GROUP_0 (PX4IO_PROTOCOL_MAX_CONTROL_COUNT * 0)
245 #define PX4IO_P_CONTROLS_GROUP_1 (PX4IO_PROTOCOL_MAX_CONTROL_COUNT * 1)
246 #define PX4IO_P_CONTROLS_GROUP_2 (PX4IO_PROTOCOL_MAX_CONTROL_COUNT * 2)
247 #define PX4IO_P_CONTROLS_GROUP_3 (PX4IO_PROTOCOL_MAX_CONTROL_COUNT * 3)
249 #define PX4IO_P_CONTROLS_GROUP_VALID 64
250 #define PX4IO_P_CONTROLS_GROUP_VALID_GROUP0 (1 << 0)
251 #define PX4IO_P_CONTROLS_GROUP_VALID_GROUP1 (1 << 1)
252 #define PX4IO_P_CONTROLS_GROUP_VALID_GROUP2 (1 << 2)
253 #define PX4IO_P_CONTROLS_GROUP_VALID_GROUP3 (1 << 3)
256 #define PX4IO_PAGE_MIXERLOAD 52
259 #define PX4IO_PAGE_RC_CONFIG 53
260 #define PX4IO_P_RC_CONFIG_MIN 0
261 #define PX4IO_P_RC_CONFIG_CENTER 1
262 #define PX4IO_P_RC_CONFIG_MAX 2
263 #define PX4IO_P_RC_CONFIG_DEADZONE 3
264 #define PX4IO_P_RC_CONFIG_ASSIGNMENT 4
265 #define PX4IO_P_RC_CONFIG_ASSIGNMENT_MODESWITCH 100
266 #define PX4IO_P_RC_CONFIG_OPTIONS 5
267 #define PX4IO_P_RC_CONFIG_OPTIONS_ENABLED (1 << 0)
268 #define PX4IO_P_RC_CONFIG_OPTIONS_REVERSE (1 << 1)
269 #define PX4IO_P_RC_CONFIG_STRIDE 6
272 #define PX4IO_PAGE_DIRECT_PWM 54
275 #define PX4IO_PAGE_FAILSAFE_PWM 55
278 #define PX4IO_PAGE_SENSORS 56
279 #define PX4IO_P_SENSORS_ALTITUDE 0
282 #define PX4IO_PAGE_TEST 127
283 #define PX4IO_P_TEST_LED 0
286 #define PX4IO_PAGE_CONTROL_MIN_PWM 106
289 #define PX4IO_PAGE_CONTROL_MAX_PWM 107
292 #define PX4IO_PAGE_DISARMED_PWM 108
300 #pragma pack(push, 1)
303 #define F2I_MIXER_MAGIC 0x6d74
306 #define F2I_MIXER_ACTION_RESET 0
307 #define F2I_MIXER_ACTION_APPEND 1
317 #define PKT_MAX_REGS 32 // by agreement w/FMU
319 #pragma pack(push, 1)
329 #define PKT_CODE_READ 0x00
330 #define PKT_CODE_WRITE 0x40
331 #define PKT_CODE_SUCCESS 0x00
332 #define PKT_CODE_CORRUPT 0x40
333 #define PKT_CODE_ERROR 0x80
335 #define PKT_CODE_MASK 0xc0
336 #define PKT_COUNT_MASK 0x3f
338 #define PKT_COUNT(_p) ((_p).count_code & PKT_COUNT_MASK)
339 #define PKT_CODE(_p) ((_p).count_code & PKT_CODE_MASK)
340 #define PKT_SIZE(_p) ((size_t)((uint8_t *)&((_p).regs[PKT_COUNT(_p)]) - ((uint8_t *)&(_p))))
343 0x00, 0x07, 0x0E, 0x09, 0x1C, 0x1B, 0x12, 0x15,
344 0x38, 0x3F, 0x36, 0x31, 0x24, 0x23, 0x2A, 0x2D,
345 0x70, 0x77, 0x7E, 0x79, 0x6C, 0x6B, 0x62, 0x65,
346 0x48, 0x4F, 0x46, 0x41, 0x54, 0x53, 0x5A, 0x5D,
347 0xE0, 0xE7, 0xEE, 0xE9, 0xFC, 0xFB, 0xF2, 0xF5,
348 0xD8, 0xDF, 0xD6, 0xD1, 0xC4, 0xC3, 0xCA, 0xCD,
349 0x90, 0x97, 0x9E, 0x99, 0x8C, 0x8B, 0x82, 0x85,
350 0xA8, 0xAF, 0xA6, 0xA1, 0xB4, 0xB3, 0xBA, 0xBD,
351 0xC7, 0xC0, 0xC9, 0xCE, 0xDB, 0xDC, 0xD5, 0xD2,
352 0xFF, 0xF8, 0xF1, 0xF6, 0xE3, 0xE4, 0xED, 0xEA,
353 0xB7, 0xB0, 0xB9, 0xBE, 0xAB, 0xAC, 0xA5, 0xA2,
354 0x8F, 0x88, 0x81, 0x86, 0x93, 0x94, 0x9D, 0x9A,
355 0x27, 0x20, 0x29, 0x2E, 0x3B, 0x3C, 0x35, 0x32,
356 0x1F, 0x18, 0x11, 0x16, 0x03, 0x04, 0x0D, 0x0A,
357 0x57, 0x50, 0x59, 0x5E, 0x4B, 0x4C, 0x45, 0x42,
358 0x6F, 0x68, 0x61, 0x66, 0x73, 0x74, 0x7D, 0x7A,
359 0x89, 0x8E, 0x87, 0x80, 0x95, 0x92, 0x9B, 0x9C,
360 0xB1, 0xB6, 0xBF, 0xB8, 0xAD, 0xAA, 0xA3, 0xA4,
361 0xF9, 0xFE, 0xF7, 0xF0, 0xE5, 0xE2, 0xEB, 0xEC,
362 0xC1, 0xC6, 0xCF, 0xC8, 0xDD, 0xDA, 0xD3, 0xD4,
363 0x69, 0x6E, 0x67, 0x60, 0x75, 0x72, 0x7B, 0x7C,
364 0x51, 0x56, 0x5F, 0x58, 0x4D, 0x4A, 0x43, 0x44,
365 0x19, 0x1E, 0x17, 0x10, 0x05, 0x02, 0x0B, 0x0C,
366 0x21, 0x26, 0x2F, 0x28, 0x3D, 0x3A, 0x33, 0x34,
367 0x4E, 0x49, 0x40, 0x47, 0x52, 0x55, 0x5C, 0x5B,
368 0x76, 0x71, 0x78, 0x7F, 0x6A, 0x6D, 0x64, 0x63,
369 0x3E, 0x39, 0x30, 0x37, 0x22, 0x25, 0x2C, 0x2B,
370 0x06, 0x01, 0x08, 0x0F, 0x1A, 0x1D, 0x14, 0x13,
371 0xAE, 0xA9, 0xA0, 0xA7, 0xB2, 0xB5, 0xBC, 0xBB,
372 0x96, 0x91, 0x98, 0x9F, 0x8A, 0x8D, 0x84, 0x83,
373 0xDE, 0xD9, 0xD0, 0xD7, 0xC2, 0xC5, 0xCC, 0xCB,
374 0xE6, 0xE1, 0xE8, 0xEF, 0xFA, 0xFD, 0xF4, 0xF3
As-needed mixer data upload.
static const uint8_t crc8_tab[256]
static uint8_t crc_packet(struct IOPacket *pkt)
uint16_t regs[PKT_MAX_REGS]
#define PKT_MAX_REGS
Serial protocol encapsulation.