Paparazzi UAS
v7.0_unstable
Paparazzi is a free software Unmanned Aircraft System.
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board.h
Go to the documentation of this file.
1
/*
2
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
3
4
Licensed under the Apache License, Version 2.0 (the "License");
5
you may not use this file except in compliance with the License.
6
You may obtain a copy of the License at
7
8
http://www.apache.org/licenses/LICENSE-2.0
9
10
Unless required by applicable law or agreed to in writing, software
11
distributed under the License is distributed on an "AS IS" BASIS,
12
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13
See the License for the specific language governing permissions and
14
limitations under the License.
15
*/
16
17
#pragma once
18
19
/*
20
* Board identifier.
21
*/
22
#define BOARD_TAWAKI_V2
23
#define BOARD_NAME "Tawaki V2Autopilot"
24
25
/*
26
* Board oscillators-related settings.
27
*/
28
#if !defined(STM32_LSECLK)
29
#define STM32_LSECLK 0
30
#endif
31
32
#define STM32_LSEDRV (3U << 3U)
33
34
#if !defined(STM32_HSECLK)
35
#define STM32_HSECLK 8000000U
36
#define STM32_HSE_BYPASS TRUE
37
#endif
38
39
/*
40
* Board voltages.
41
* Required for performance limits calculation.
42
*/
43
#define STM32_VDD 300U
44
45
/*
46
* MCU type as defined in the ST header.
47
*/
48
#define STM32H743xx
49
#define STM32H753xx
50
51
52
/*
53
* PWM TIM defines
54
* enable TIM1 by default
55
*/
56
#ifndef USE_PWM_TIM1
57
#define USE_PWM_TIM1 1
58
#endif
59
60
61
/*
62
* IO pins assignments.
63
*/
64
#define AUX_A1 0U
65
#define AUX_A2 1U
66
#define AUX_A3 2U
67
#define AUX_A4 3U
68
#define PA04 4U
69
#define SPI6_INTERNAL_CLK 5U
70
#define SRVB1 6U
71
#define SRVB2 7U
72
#define PA08 8U
73
#define USB_VBUS 9U
74
#define DSHOT_RX 10U
75
#define OTG_FS_DM 11U
76
#define OTG_FS_DP 12U
77
#define SWDIO 13U
78
#define SWCLK 14U
79
#define UART7_TX 15U
80
81
#define SRVB3 0U
82
#define SRVB4 1U
83
#define PB02 2U
84
#define UART7_RX 3U
85
#define SPI6_INTERNAL_MISO 4U
86
#define SPI6_INTERNAL_MOSI 5U
87
#define AUX_B1 6U
88
#define AUX_B2 7U
89
#define AUX_B3 8U
90
#define AUX_B4 9U
91
#define I2C2_SCL 10U
92
#define I2C2_SDA 11U
93
#define SPI2_EXTERNAL_CS 12U
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#define PB13 13U
95
#define SPI2_EXTERNAL_MISO 14U
96
#define SPI2_EXTERNAL_MOSI 15U
97
98
#define VBAT_MEAS 0U
99
#define PC01 1U
100
#define PC02 2U
101
#define PC03 3U
102
#define PC04 4U
103
#define PC05 5U
104
#define RC2 6U
105
#define LED1 7U
106
#define SDMMC1_D0 8U
107
#define SDMMC1_D1 9U
108
#define SDMMC1_D2 10U
109
#define SDMMC1_D3 11U
110
#define SDMMC1_CK 12U
111
#define APSW 13U
112
#define PC14 14U
113
#define PC15 15U
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115
#define CAN_RX 0U
116
#define CAN_TX 1U
117
#define SDMMC1_CMD 2U
118
#define SPI2_EXTERNAL_CLK 3U
119
#define LED2 4U
120
#define UART2_TX 5U
121
#define UART2_RX 6U
122
#define PD07 7U
123
#define UART3_TX 8U
124
#define UART3_RX 9U
125
#define LED4 10U
126
#define PD11 11U
127
#define I2C4_SCL 12U
128
#define I2C4_SDA 13U
129
#define PD14 14U
130
#define LED3 15U
131
132
#define RC1 0U
133
#define PE01 1U
134
#define PE02 2U
135
#define SPI6_INTERNAL_CS 3U
136
#define PE04 4U
137
#define PE05 5U
138
#define PE06 6U
139
#define PE07 7U
140
#define PE08 8U
141
#define SRVA1 9U
142
#define PE10 10U
143
#define SRVA2 11U
144
#define PE12 12U
145
#define SRVA3 13U
146
#define SRVA4 14U
147
#define PE15 15U
148
149
#define PF00 0U
150
#define PF01 1U
151
#define PF02 2U
152
#define PF03 3U
153
#define PF04 4U
154
#define PF05 5U
155
#define PF06 6U
156
#define PF07 7U
157
#define PF08 8U
158
#define PF09 9U
159
#define PF10 10U
160
#define PF11 11U
161
#define PF12 12U
162
#define PF13 13U
163
#define PF14 14U
164
#define PF15 15U
165
166
#define PG00 0U
167
#define PG01 1U
168
#define PG02 2U
169
#define PG03 3U
170
#define PG04 4U
171
#define PG05 5U
172
#define PG06 6U
173
#define PG07 7U
174
#define PG08 8U
175
#define PG09 9U
176
#define PG10 10U
177
#define PG11 11U
178
#define PG12 12U
179
#define PG13 13U
180
#define PG14 14U
181
#define PG15 15U
182
183
#define OSC_IN 0U
184
#define PH01 1U
185
#define PH02 2U
186
#define PH03 3U
187
#define PH04 4U
188
#define PH05 5U
189
#define PH06 6U
190
#define PH07 7U
191
#define PH08 8U
192
#define PH09 9U
193
#define PH10 10U
194
#define PH11 11U
195
#define PH12 12U
196
#define PH13 13U
197
#define PH14 14U
198
#define PH15 15U
199
200
#define PI00 0U
201
#define PI01 1U
202
#define PI02 2U
203
#define PI03 3U
204
#define PI04 4U
205
#define PI05 5U
206
#define PI06 6U
207
#define PI07 7U
208
#define PI08 8U
209
#define PI09 9U
210
#define PI10 10U
211
#define PI11 11U
212
#define PI12 12U
213
#define PI13 13U
214
#define PI14 14U
215
#define PI15 15U
216
217
#define PJ00 0U
218
#define PJ01 1U
219
#define PJ02 2U
220
#define PJ03 3U
221
#define PJ04 4U
222
#define PJ05 5U
223
#define PJ06 6U
224
#define PJ07 7U
225
#define PJ08 8U
226
#define PJ09 9U
227
#define PJ10 10U
228
#define PJ11 11U
229
#define PJ12 12U
230
#define PJ13 13U
231
#define PJ14 14U
232
#define PJ15 15U
233
234
#define PK00 0U
235
#define PK01 1U
236
#define PK02 2U
237
#define PK03 3U
238
#define PK04 4U
239
#define PK05 5U
240
#define PK06 6U
241
#define PK07 7U
242
#define PK08 8U
243
#define PK09 9U
244
#define PK10 10U
245
#define PK11 11U
246
#define PK12 12U
247
#define PK13 13U
248
#define PK14 14U
249
#define PK15 15U
250
251
/*
252
* IO lines assignments.
253
*/
254
#define LINE_AUX_A1 PAL_LINE(GPIOA, 0U)
255
#define LINE_AUX_A2 PAL_LINE(GPIOA, 1U)
256
#define LINE_AUX_A3 PAL_LINE(GPIOA, 2U)
257
#define LINE_AUX_A4 PAL_LINE(GPIOA, 3U)
258
#define LINE_SPI6_INTERNAL_CLK PAL_LINE(GPIOA, 5U)
259
#define LINE_SRVB1 PAL_LINE(GPIOA, 6U)
260
#define LINE_SRVB2 PAL_LINE(GPIOA, 7U)
261
#define LINE_USB_VBUS PAL_LINE(GPIOA, 9U)
262
#define LINE_DSHOT_RX PAL_LINE(GPIOA, 10U)
263
#define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U)
264
#define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U)
265
#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
266
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
267
#define LINE_UART7_TX PAL_LINE(GPIOA, 15U)
268
269
#define LINE_SRVB3 PAL_LINE(GPIOB, 0U)
270
#define LINE_SRVB4 PAL_LINE(GPIOB, 1U)
271
#define LINE_UART7_RX PAL_LINE(GPIOB, 3U)
272
#define LINE_SPI6_INTERNAL_MISO PAL_LINE(GPIOB, 4U)
273
#define LINE_SPI6_INTERNAL_MOSI PAL_LINE(GPIOB, 5U)
274
#define LINE_AUX_B1 PAL_LINE(GPIOB, 6U)
275
#define LINE_AUX_B2 PAL_LINE(GPIOB, 7U)
276
#define LINE_AUX_B3 PAL_LINE(GPIOB, 8U)
277
#define LINE_AUX_B4 PAL_LINE(GPIOB, 9U)
278
#define LINE_I2C2_SCL PAL_LINE(GPIOB, 10U)
279
#define LINE_I2C2_SDA PAL_LINE(GPIOB, 11U)
280
#define LINE_SPI2_EXTERNAL_CS PAL_LINE(GPIOB, 12U)
281
#define LINE_SPI2_EXTERNAL_MISO PAL_LINE(GPIOB, 14U)
282
#define LINE_SPI2_EXTERNAL_MOSI PAL_LINE(GPIOB, 15U)
283
284
#define LINE_VBAT_MEAS PAL_LINE(GPIOC, 0U)
285
#define LINE_RC2 PAL_LINE(GPIOC, 6U)
286
#define LINE_LED1 PAL_LINE(GPIOC, 7U)
287
#define LINE_SDMMC1_D0 PAL_LINE(GPIOC, 8U)
288
#define LINE_SDMMC1_D1 PAL_LINE(GPIOC, 9U)
289
#define LINE_SDMMC1_D2 PAL_LINE(GPIOC, 10U)
290
#define LINE_SDMMC1_D3 PAL_LINE(GPIOC, 11U)
291
#define LINE_SDMMC1_CK PAL_LINE(GPIOC, 12U)
292
#define LINE_APSW PAL_LINE(GPIOC, 13U)
293
294
#define LINE_CAN_RX PAL_LINE(GPIOD, 0U)
295
#define LINE_CAN_TX PAL_LINE(GPIOD, 1U)
296
#define LINE_SDMMC1_CMD PAL_LINE(GPIOD, 2U)
297
#define LINE_SPI2_EXTERNAL_CLK PAL_LINE(GPIOD, 3U)
298
#define LINE_LED2 PAL_LINE(GPIOD, 4U)
299
#define LINE_UART2_TX PAL_LINE(GPIOD, 5U)
300
#define LINE_UART2_RX PAL_LINE(GPIOD, 6U)
301
#define LINE_UART3_TX PAL_LINE(GPIOD, 8U)
302
#define LINE_UART3_RX PAL_LINE(GPIOD, 9U)
303
#define LINE_LED4 PAL_LINE(GPIOD, 10U)
304
#define LINE_I2C4_SCL PAL_LINE(GPIOD, 12U)
305
#define LINE_I2C4_SDA PAL_LINE(GPIOD, 13U)
306
#define LINE_LED3 PAL_LINE(GPIOD, 15U)
307
308
#define LINE_RC1 PAL_LINE(GPIOE, 0U)
309
#define LINE_SPI6_INTERNAL_CS PAL_LINE(GPIOE, 3U)
310
#define LINE_SRVA1 PAL_LINE(GPIOE, 9U)
311
#define LINE_SRVA2 PAL_LINE(GPIOE, 11U)
312
#define LINE_SRVA3 PAL_LINE(GPIOE, 13U)
313
#define LINE_SRVA4 PAL_LINE(GPIOE, 14U)
314
315
#define LINE_OSC_IN PAL_LINE(GPIOH, 0U)
316
317
318
/*
319
* I/O ports initial setup, this configuration is established soon after reset
320
* in the initialization code.
321
* Please refer to the STM32 Reference Manual for details.
322
*/
323
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
324
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
325
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
326
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
327
#define PIN_ODR_LEVEL_LOW(n) (0U << (n))
328
#define PIN_ODR_LEVEL_HIGH(n) (1U << (n))
329
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
330
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
331
#define PIN_OSPEED_SPEED_VERYLOW(n) (0U << ((n) * 2U))
332
#define PIN_OSPEED_SPEED_LOW(n) (1U << ((n) * 2U))
333
#define PIN_OSPEED_SPEED_MEDIUM(n) (2U << ((n) * 2U))
334
#define PIN_OSPEED_SPEED_HIGH(n) (3U << ((n) * 2U))
335
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
336
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
337
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
338
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
339
340
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(AUX_A1) | \
341
PIN_MODE_INPUT(AUX_A2) | \
342
PIN_MODE_INPUT(AUX_A3) | \
343
PIN_MODE_INPUT(AUX_A4) | \
344
PIN_MODE_INPUT(PA04) | \
345
PIN_MODE_ALTERNATE(SPI6_INTERNAL_CLK) | \
346
PIN_MODE_ALTERNATE(SRVB1) | \
347
PIN_MODE_ALTERNATE(SRVB2) | \
348
PIN_MODE_INPUT(PA08) | \
349
PIN_MODE_INPUT(USB_VBUS) | \
350
PIN_MODE_ALTERNATE(DSHOT_RX) | \
351
PIN_MODE_ALTERNATE(OTG_FS_DM) | \
352
PIN_MODE_ALTERNATE(OTG_FS_DP) | \
353
PIN_MODE_ALTERNATE(SWDIO) | \
354
PIN_MODE_ALTERNATE(SWCLK) | \
355
PIN_MODE_ALTERNATE(UART7_TX))
340
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(AUX_A1) | \
…
356
357
#define VAL_GPIOA_OTYPER (PIN_OTYPE_OPENDRAIN(AUX_A1) | \
358
PIN_OTYPE_OPENDRAIN(AUX_A2) | \
359
PIN_OTYPE_OPENDRAIN(AUX_A3) | \
360
PIN_OTYPE_OPENDRAIN(AUX_A4) | \
361
PIN_OTYPE_PUSHPULL(PA04) | \
362
PIN_OTYPE_PUSHPULL(SPI6_INTERNAL_CLK) | \
363
PIN_OTYPE_PUSHPULL(SRVB1) | \
364
PIN_OTYPE_PUSHPULL(SRVB2) | \
365
PIN_OTYPE_PUSHPULL(PA08) | \
366
PIN_OTYPE_OPENDRAIN(USB_VBUS) | \
367
PIN_OTYPE_PUSHPULL(DSHOT_RX) | \
368
PIN_OTYPE_PUSHPULL(OTG_FS_DM) | \
369
PIN_OTYPE_PUSHPULL(OTG_FS_DP) | \
370
PIN_OTYPE_PUSHPULL(SWDIO) | \
371
PIN_OTYPE_PUSHPULL(SWCLK) | \
372
PIN_OTYPE_PUSHPULL(UART7_TX))
357
#define VAL_GPIOA_OTYPER (PIN_OTYPE_OPENDRAIN(AUX_A1) | \
…
373
374
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(AUX_A1) | \
375
PIN_OSPEED_SPEED_VERYLOW(AUX_A2) | \
376
PIN_OSPEED_SPEED_VERYLOW(AUX_A3) | \
377
PIN_OSPEED_SPEED_VERYLOW(AUX_A4) | \
378
PIN_OSPEED_SPEED_VERYLOW(PA04) | \
379
PIN_OSPEED_SPEED_HIGH(SPI6_INTERNAL_CLK) | \
380
PIN_OSPEED_SPEED_HIGH(SRVB1) | \
381
PIN_OSPEED_SPEED_HIGH(SRVB2) | \
382
PIN_OSPEED_SPEED_VERYLOW(PA08) | \
383
PIN_OSPEED_SPEED_VERYLOW(USB_VBUS) | \
384
PIN_OSPEED_SPEED_HIGH(DSHOT_RX) | \
385
PIN_OSPEED_SPEED_HIGH(OTG_FS_DM) | \
386
PIN_OSPEED_SPEED_HIGH(OTG_FS_DP) | \
387
PIN_OSPEED_SPEED_HIGH(SWDIO) | \
388
PIN_OSPEED_SPEED_HIGH(SWCLK) | \
389
PIN_OSPEED_SPEED_HIGH(UART7_TX))
374
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(AUX_A1) | \
…
390
391
#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLDOWN(AUX_A1) | \
392
PIN_PUPDR_PULLDOWN(AUX_A2) | \
393
PIN_PUPDR_PULLDOWN(AUX_A3) | \
394
PIN_PUPDR_PULLDOWN(AUX_A4) | \
395
PIN_PUPDR_PULLDOWN(PA04) | \
396
PIN_PUPDR_FLOATING(SPI6_INTERNAL_CLK) | \
397
PIN_PUPDR_PULLUP(SRVB1) | \
398
PIN_PUPDR_PULLUP(SRVB2) | \
399
PIN_PUPDR_PULLDOWN(PA08) | \
400
PIN_PUPDR_PULLDOWN(USB_VBUS) | \
401
PIN_PUPDR_FLOATING(DSHOT_RX) | \
402
PIN_PUPDR_FLOATING(OTG_FS_DM) | \
403
PIN_PUPDR_FLOATING(OTG_FS_DP) | \
404
PIN_PUPDR_PULLUP(SWDIO) | \
405
PIN_PUPDR_PULLUP(SWCLK) | \
406
PIN_PUPDR_FLOATING(UART7_TX))
391
#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLDOWN(AUX_A1) | \
…
407
408
#define VAL_GPIOA_ODR (PIN_ODR_LEVEL_HIGH(AUX_A1) | \
409
PIN_ODR_LEVEL_HIGH(AUX_A2) | \
410
PIN_ODR_LEVEL_HIGH(AUX_A3) | \
411
PIN_ODR_LEVEL_HIGH(AUX_A4) | \
412
PIN_ODR_LEVEL_LOW(PA04) | \
413
PIN_ODR_LEVEL_HIGH(SPI6_INTERNAL_CLK) | \
414
PIN_ODR_LEVEL_LOW(SRVB1) | \
415
PIN_ODR_LEVEL_LOW(SRVB2) | \
416
PIN_ODR_LEVEL_LOW(PA08) | \
417
PIN_ODR_LEVEL_LOW(USB_VBUS) | \
418
PIN_ODR_LEVEL_HIGH(DSHOT_RX) | \
419
PIN_ODR_LEVEL_HIGH(OTG_FS_DM) | \
420
PIN_ODR_LEVEL_HIGH(OTG_FS_DP) | \
421
PIN_ODR_LEVEL_HIGH(SWDIO) | \
422
PIN_ODR_LEVEL_HIGH(SWCLK) | \
423
PIN_ODR_LEVEL_HIGH(UART7_TX))
408
#define VAL_GPIOA_ODR (PIN_ODR_LEVEL_HIGH(AUX_A1) | \
…
424
425
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(AUX_A1, 0) | \
426
PIN_AFIO_AF(AUX_A2, 0) | \
427
PIN_AFIO_AF(AUX_A3, 0) | \
428
PIN_AFIO_AF(AUX_A4, 0) | \
429
PIN_AFIO_AF(PA04, 0) | \
430
PIN_AFIO_AF(SPI6_INTERNAL_CLK, 8) | \
431
PIN_AFIO_AF(SRVB1, 2) | \
432
PIN_AFIO_AF(SRVB2, 2))
425
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(AUX_A1, 0) | \
…
433
434
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(PA08, 0) | \
435
PIN_AFIO_AF(USB_VBUS, 0) | \
436
PIN_AFIO_AF(DSHOT_RX, 7) | \
437
PIN_AFIO_AF(OTG_FS_DM, 10) | \
438
PIN_AFIO_AF(OTG_FS_DP, 10) | \
439
PIN_AFIO_AF(SWDIO, 0) | \
440
PIN_AFIO_AF(SWCLK, 0) | \
441
PIN_AFIO_AF(UART7_TX, 11))
434
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(PA08, 0) | \
…
442
443
#define VAL_GPIOB_MODER (PIN_MODE_ALTERNATE(SRVB3) | \
444
PIN_MODE_ALTERNATE(SRVB4) | \
445
PIN_MODE_INPUT(PB02) | \
446
PIN_MODE_ALTERNATE(UART7_RX) | \
447
PIN_MODE_ALTERNATE(SPI6_INTERNAL_MISO) | \
448
PIN_MODE_ALTERNATE(SPI6_INTERNAL_MOSI) | \
449
PIN_MODE_INPUT(AUX_B1) | \
450
PIN_MODE_INPUT(AUX_B2) | \
451
PIN_MODE_INPUT(AUX_B3) | \
452
PIN_MODE_INPUT(AUX_B4) | \
453
PIN_MODE_ALTERNATE(I2C2_SCL) | \
454
PIN_MODE_ALTERNATE(I2C2_SDA) | \
455
PIN_MODE_OUTPUT(SPI2_EXTERNAL_CS) | \
456
PIN_MODE_INPUT(PB13) | \
457
PIN_MODE_ALTERNATE(SPI2_EXTERNAL_MISO) | \
458
PIN_MODE_ALTERNATE(SPI2_EXTERNAL_MOSI))
443
#define VAL_GPIOB_MODER (PIN_MODE_ALTERNATE(SRVB3) | \
…
459
460
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(SRVB3) | \
461
PIN_OTYPE_PUSHPULL(SRVB4) | \
462
PIN_OTYPE_PUSHPULL(PB02) | \
463
PIN_OTYPE_PUSHPULL(UART7_RX) | \
464
PIN_OTYPE_PUSHPULL(SPI6_INTERNAL_MISO) | \
465
PIN_OTYPE_PUSHPULL(SPI6_INTERNAL_MOSI) | \
466
PIN_OTYPE_OPENDRAIN(AUX_B1) | \
467
PIN_OTYPE_OPENDRAIN(AUX_B2) | \
468
PIN_OTYPE_OPENDRAIN(AUX_B3) | \
469
PIN_OTYPE_OPENDRAIN(AUX_B4) | \
470
PIN_OTYPE_OPENDRAIN(I2C2_SCL) | \
471
PIN_OTYPE_OPENDRAIN(I2C2_SDA) | \
472
PIN_OTYPE_PUSHPULL(SPI2_EXTERNAL_CS) | \
473
PIN_OTYPE_PUSHPULL(PB13) | \
474
PIN_OTYPE_PUSHPULL(SPI2_EXTERNAL_MISO) | \
475
PIN_OTYPE_PUSHPULL(SPI2_EXTERNAL_MOSI))
460
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(SRVB3) | \
…
476
477
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_SPEED_HIGH(SRVB3) | \
478
PIN_OSPEED_SPEED_HIGH(SRVB4) | \
479
PIN_OSPEED_SPEED_VERYLOW(PB02) | \
480
PIN_OSPEED_SPEED_HIGH(UART7_RX) | \
481
PIN_OSPEED_SPEED_HIGH(SPI6_INTERNAL_MISO) | \
482
PIN_OSPEED_SPEED_HIGH(SPI6_INTERNAL_MOSI) | \
483
PIN_OSPEED_SPEED_VERYLOW(AUX_B1) | \
484
PIN_OSPEED_SPEED_VERYLOW(AUX_B2) | \
485
PIN_OSPEED_SPEED_VERYLOW(AUX_B3) | \
486
PIN_OSPEED_SPEED_VERYLOW(AUX_B4) | \
487
PIN_OSPEED_SPEED_HIGH(I2C2_SCL) | \
488
PIN_OSPEED_SPEED_HIGH(I2C2_SDA) | \
489
PIN_OSPEED_SPEED_HIGH(SPI2_EXTERNAL_CS) | \
490
PIN_OSPEED_SPEED_VERYLOW(PB13) | \
491
PIN_OSPEED_SPEED_HIGH(SPI2_EXTERNAL_MISO) | \
492
PIN_OSPEED_SPEED_HIGH(SPI2_EXTERNAL_MOSI))
477
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_SPEED_HIGH(SRVB3) | \
…
493
494
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(SRVB3) | \
495
PIN_PUPDR_PULLUP(SRVB4) | \
496
PIN_PUPDR_PULLDOWN(PB02) | \
497
PIN_PUPDR_FLOATING(UART7_RX) | \
498
PIN_PUPDR_FLOATING(SPI6_INTERNAL_MISO) | \
499
PIN_PUPDR_FLOATING(SPI6_INTERNAL_MOSI) | \
500
PIN_PUPDR_PULLDOWN(AUX_B1) | \
501
PIN_PUPDR_PULLDOWN(AUX_B2) | \
502
PIN_PUPDR_PULLDOWN(AUX_B3) | \
503
PIN_PUPDR_PULLDOWN(AUX_B4) | \
504
PIN_PUPDR_PULLUP(I2C2_SCL) | \
505
PIN_PUPDR_PULLUP(I2C2_SDA) | \
506
PIN_PUPDR_FLOATING(SPI2_EXTERNAL_CS) | \
507
PIN_PUPDR_PULLDOWN(PB13) | \
508
PIN_PUPDR_FLOATING(SPI2_EXTERNAL_MISO) | \
509
PIN_PUPDR_FLOATING(SPI2_EXTERNAL_MOSI))
494
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(SRVB3) | \
…
510
511
#define VAL_GPIOB_ODR (PIN_ODR_LEVEL_LOW(SRVB3) | \
512
PIN_ODR_LEVEL_LOW(SRVB4) | \
513
PIN_ODR_LEVEL_LOW(PB02) | \
514
PIN_ODR_LEVEL_HIGH(UART7_RX) | \
515
PIN_ODR_LEVEL_HIGH(SPI6_INTERNAL_MISO) | \
516
PIN_ODR_LEVEL_HIGH(SPI6_INTERNAL_MOSI) | \
517
PIN_ODR_LEVEL_HIGH(AUX_B1) | \
518
PIN_ODR_LEVEL_HIGH(AUX_B2) | \
519
PIN_ODR_LEVEL_HIGH(AUX_B3) | \
520
PIN_ODR_LEVEL_HIGH(AUX_B4) | \
521
PIN_ODR_LEVEL_HIGH(I2C2_SCL) | \
522
PIN_ODR_LEVEL_HIGH(I2C2_SDA) | \
523
PIN_ODR_LEVEL_HIGH(SPI2_EXTERNAL_CS) | \
524
PIN_ODR_LEVEL_LOW(PB13) | \
525
PIN_ODR_LEVEL_HIGH(SPI2_EXTERNAL_MISO) | \
526
PIN_ODR_LEVEL_HIGH(SPI2_EXTERNAL_MOSI))
511
#define VAL_GPIOB_ODR (PIN_ODR_LEVEL_LOW(SRVB3) | \
…
527
528
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(SRVB3, 2) | \
529
PIN_AFIO_AF(SRVB4, 2) | \
530
PIN_AFIO_AF(PB02, 0) | \
531
PIN_AFIO_AF(UART7_RX, 11) | \
532
PIN_AFIO_AF(SPI6_INTERNAL_MISO, 8) | \
533
PIN_AFIO_AF(SPI6_INTERNAL_MOSI, 8) | \
534
PIN_AFIO_AF(AUX_B1, 0) | \
535
PIN_AFIO_AF(AUX_B2, 0))
528
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(SRVB3, 2) | \
…
536
537
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(AUX_B3, 0) | \
538
PIN_AFIO_AF(AUX_B4, 0) | \
539
PIN_AFIO_AF(I2C2_SCL, 4) | \
540
PIN_AFIO_AF(I2C2_SDA, 4) | \
541
PIN_AFIO_AF(SPI2_EXTERNAL_CS, 0) | \
542
PIN_AFIO_AF(PB13, 0) | \
543
PIN_AFIO_AF(SPI2_EXTERNAL_MISO, 5) | \
544
PIN_AFIO_AF(SPI2_EXTERNAL_MOSI, 5))
537
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(AUX_B3, 0) | \
…
545
546
#define VAL_GPIOC_MODER (PIN_MODE_ANALOG(VBAT_MEAS) | \
547
PIN_MODE_INPUT(PC01) | \
548
PIN_MODE_INPUT(PC02) | \
549
PIN_MODE_INPUT(PC03) | \
550
PIN_MODE_INPUT(PC04) | \
551
PIN_MODE_INPUT(PC05) | \
552
PIN_MODE_INPUT(RC2) | \
553
PIN_MODE_OUTPUT(LED1) | \
554
PIN_MODE_ALTERNATE(SDMMC1_D0) | \
555
PIN_MODE_ALTERNATE(SDMMC1_D1) | \
556
PIN_MODE_ALTERNATE(SDMMC1_D2) | \
557
PIN_MODE_ALTERNATE(SDMMC1_D3) | \
558
PIN_MODE_ALTERNATE(SDMMC1_CK) | \
559
PIN_MODE_OUTPUT(APSW) | \
560
PIN_MODE_INPUT(PC14) | \
561
PIN_MODE_INPUT(PC15))
546
#define VAL_GPIOC_MODER (PIN_MODE_ANALOG(VBAT_MEAS) | \
…
562
563
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(VBAT_MEAS) | \
564
PIN_OTYPE_PUSHPULL(PC01) | \
565
PIN_OTYPE_PUSHPULL(PC02) | \
566
PIN_OTYPE_PUSHPULL(PC03) | \
567
PIN_OTYPE_PUSHPULL(PC04) | \
568
PIN_OTYPE_PUSHPULL(PC05) | \
569
PIN_OTYPE_OPENDRAIN(RC2) | \
570
PIN_OTYPE_PUSHPULL(LED1) | \
571
PIN_OTYPE_PUSHPULL(SDMMC1_D0) | \
572
PIN_OTYPE_PUSHPULL(SDMMC1_D1) | \
573
PIN_OTYPE_PUSHPULL(SDMMC1_D2) | \
574
PIN_OTYPE_PUSHPULL(SDMMC1_D3) | \
575
PIN_OTYPE_PUSHPULL(SDMMC1_CK) | \
576
PIN_OTYPE_PUSHPULL(APSW) | \
577
PIN_OTYPE_PUSHPULL(PC14) | \
578
PIN_OTYPE_PUSHPULL(PC15))
563
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(VBAT_MEAS) | \
…
579
580
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(VBAT_MEAS) | \
581
PIN_OSPEED_SPEED_VERYLOW(PC01) | \
582
PIN_OSPEED_SPEED_VERYLOW(PC02) | \
583
PIN_OSPEED_SPEED_VERYLOW(PC03) | \
584
PIN_OSPEED_SPEED_VERYLOW(PC04) | \
585
PIN_OSPEED_SPEED_VERYLOW(PC05) | \
586
PIN_OSPEED_SPEED_VERYLOW(RC2) | \
587
PIN_OSPEED_SPEED_VERYLOW(LED1) | \
588
PIN_OSPEED_SPEED_HIGH(SDMMC1_D0) | \
589
PIN_OSPEED_SPEED_HIGH(SDMMC1_D1) | \
590
PIN_OSPEED_SPEED_HIGH(SDMMC1_D2) | \
591
PIN_OSPEED_SPEED_HIGH(SDMMC1_D3) | \
592
PIN_OSPEED_SPEED_HIGH(SDMMC1_CK) | \
593
PIN_OSPEED_SPEED_VERYLOW(APSW) | \
594
PIN_OSPEED_SPEED_VERYLOW(PC14) | \
595
PIN_OSPEED_SPEED_VERYLOW(PC15))
580
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(VBAT_MEAS) | \
…
596
597
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(VBAT_MEAS) | \
598
PIN_PUPDR_PULLDOWN(PC01) | \
599
PIN_PUPDR_PULLDOWN(PC02) | \
600
PIN_PUPDR_PULLDOWN(PC03) | \
601
PIN_PUPDR_PULLDOWN(PC04) | \
602
PIN_PUPDR_PULLDOWN(PC05) | \
603
PIN_PUPDR_PULLDOWN(RC2) | \
604
PIN_PUPDR_FLOATING(LED1) | \
605
PIN_PUPDR_PULLUP(SDMMC1_D0) | \
606
PIN_PUPDR_PULLUP(SDMMC1_D1) | \
607
PIN_PUPDR_PULLUP(SDMMC1_D2) | \
608
PIN_PUPDR_PULLUP(SDMMC1_D3) | \
609
PIN_PUPDR_PULLUP(SDMMC1_CK) | \
610
PIN_PUPDR_FLOATING(APSW) | \
611
PIN_PUPDR_PULLDOWN(PC14) | \
612
PIN_PUPDR_PULLDOWN(PC15))
597
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(VBAT_MEAS) | \
…
613
614
#define VAL_GPIOC_ODR (PIN_ODR_LEVEL_LOW(VBAT_MEAS) | \
615
PIN_ODR_LEVEL_LOW(PC01) | \
616
PIN_ODR_LEVEL_LOW(PC02) | \
617
PIN_ODR_LEVEL_LOW(PC03) | \
618
PIN_ODR_LEVEL_LOW(PC04) | \
619
PIN_ODR_LEVEL_LOW(PC05) | \
620
PIN_ODR_LEVEL_HIGH(RC2) | \
621
PIN_ODR_LEVEL_LOW(LED1) | \
622
PIN_ODR_LEVEL_HIGH(SDMMC1_D0) | \
623
PIN_ODR_LEVEL_HIGH(SDMMC1_D1) | \
624
PIN_ODR_LEVEL_HIGH(SDMMC1_D2) | \
625
PIN_ODR_LEVEL_HIGH(SDMMC1_D3) | \
626
PIN_ODR_LEVEL_HIGH(SDMMC1_CK) | \
627
PIN_ODR_LEVEL_HIGH(APSW) | \
628
PIN_ODR_LEVEL_LOW(PC14) | \
629
PIN_ODR_LEVEL_LOW(PC15))
614
#define VAL_GPIOC_ODR (PIN_ODR_LEVEL_LOW(VBAT_MEAS) | \
…
630
631
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(VBAT_MEAS, 0) | \
632
PIN_AFIO_AF(PC01, 0) | \
633
PIN_AFIO_AF(PC02, 0) | \
634
PIN_AFIO_AF(PC03, 0) | \
635
PIN_AFIO_AF(PC04, 0) | \
636
PIN_AFIO_AF(PC05, 0) | \
637
PIN_AFIO_AF(RC2, 0) | \
638
PIN_AFIO_AF(LED1, 0))
631
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(VBAT_MEAS, 0) | \
…
639
640
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(SDMMC1_D0, 12) | \
641
PIN_AFIO_AF(SDMMC1_D1, 12) | \
642
PIN_AFIO_AF(SDMMC1_D2, 12) | \
643
PIN_AFIO_AF(SDMMC1_D3, 12) | \
644
PIN_AFIO_AF(SDMMC1_CK, 12) | \
645
PIN_AFIO_AF(APSW, 0) | \
646
PIN_AFIO_AF(PC14, 0) | \
647
PIN_AFIO_AF(PC15, 0))
640
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(SDMMC1_D0, 12) | \
…
648
649
#define VAL_GPIOD_MODER (PIN_MODE_ALTERNATE(CAN_RX) | \
650
PIN_MODE_ALTERNATE(CAN_TX) | \
651
PIN_MODE_ALTERNATE(SDMMC1_CMD) | \
652
PIN_MODE_ALTERNATE(SPI2_EXTERNAL_CLK) | \
653
PIN_MODE_OUTPUT(LED2) | \
654
PIN_MODE_ALTERNATE(UART2_TX) | \
655
PIN_MODE_ALTERNATE(UART2_RX) | \
656
PIN_MODE_INPUT(PD07) | \
657
PIN_MODE_ALTERNATE(UART3_TX) | \
658
PIN_MODE_ALTERNATE(UART3_RX) | \
659
PIN_MODE_OUTPUT(LED4) | \
660
PIN_MODE_INPUT(PD11) | \
661
PIN_MODE_ALTERNATE(I2C4_SCL) | \
662
PIN_MODE_ALTERNATE(I2C4_SDA) | \
663
PIN_MODE_INPUT(PD14) | \
664
PIN_MODE_OUTPUT(LED3))
649
#define VAL_GPIOD_MODER (PIN_MODE_ALTERNATE(CAN_RX) | \
…
665
666
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(CAN_RX) | \
667
PIN_OTYPE_PUSHPULL(CAN_TX) | \
668
PIN_OTYPE_PUSHPULL(SDMMC1_CMD) | \
669
PIN_OTYPE_PUSHPULL(SPI2_EXTERNAL_CLK) | \
670
PIN_OTYPE_PUSHPULL(LED2) | \
671
PIN_OTYPE_PUSHPULL(UART2_TX) | \
672
PIN_OTYPE_PUSHPULL(UART2_RX) | \
673
PIN_OTYPE_PUSHPULL(PD07) | \
674
PIN_OTYPE_PUSHPULL(UART3_TX) | \
675
PIN_OTYPE_PUSHPULL(UART3_RX) | \
676
PIN_OTYPE_PUSHPULL(LED4) | \
677
PIN_OTYPE_PUSHPULL(PD11) | \
678
PIN_OTYPE_OPENDRAIN(I2C4_SCL) | \
679
PIN_OTYPE_OPENDRAIN(I2C4_SDA) | \
680
PIN_OTYPE_PUSHPULL(PD14) | \
681
PIN_OTYPE_PUSHPULL(LED3))
666
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(CAN_RX) | \
…
682
683
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_SPEED_HIGH(CAN_RX) | \
684
PIN_OSPEED_SPEED_HIGH(CAN_TX) | \
685
PIN_OSPEED_SPEED_HIGH(SDMMC1_CMD) | \
686
PIN_OSPEED_SPEED_HIGH(SPI2_EXTERNAL_CLK) | \
687
PIN_OSPEED_SPEED_VERYLOW(LED2) | \
688
PIN_OSPEED_SPEED_HIGH(UART2_TX) | \
689
PIN_OSPEED_SPEED_HIGH(UART2_RX) | \
690
PIN_OSPEED_SPEED_VERYLOW(PD07) | \
691
PIN_OSPEED_SPEED_HIGH(UART3_TX) | \
692
PIN_OSPEED_SPEED_HIGH(UART3_RX) | \
693
PIN_OSPEED_SPEED_VERYLOW(LED4) | \
694
PIN_OSPEED_SPEED_VERYLOW(PD11) | \
695
PIN_OSPEED_SPEED_HIGH(I2C4_SCL) | \
696
PIN_OSPEED_SPEED_HIGH(I2C4_SDA) | \
697
PIN_OSPEED_SPEED_VERYLOW(PD14) | \
698
PIN_OSPEED_SPEED_VERYLOW(LED3))
683
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_SPEED_HIGH(CAN_RX) | \
…
699
700
#define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(CAN_RX) | \
701
PIN_PUPDR_FLOATING(CAN_TX) | \
702
PIN_PUPDR_PULLUP(SDMMC1_CMD) | \
703
PIN_PUPDR_FLOATING(SPI2_EXTERNAL_CLK) | \
704
PIN_PUPDR_FLOATING(LED2) | \
705
PIN_PUPDR_FLOATING(UART2_TX) | \
706
PIN_PUPDR_FLOATING(UART2_RX) | \
707
PIN_PUPDR_PULLDOWN(PD07) | \
708
PIN_PUPDR_FLOATING(UART3_TX) | \
709
PIN_PUPDR_FLOATING(UART3_RX) | \
710
PIN_PUPDR_FLOATING(LED4) | \
711
PIN_PUPDR_PULLDOWN(PD11) | \
712
PIN_PUPDR_PULLUP(I2C4_SCL) | \
713
PIN_PUPDR_PULLUP(I2C4_SDA) | \
714
PIN_PUPDR_PULLDOWN(PD14) | \
715
PIN_PUPDR_FLOATING(LED3))
700
#define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(CAN_RX) | \
…
716
717
#define VAL_GPIOD_ODR (PIN_ODR_LEVEL_HIGH(CAN_RX) | \
718
PIN_ODR_LEVEL_HIGH(CAN_TX) | \
719
PIN_ODR_LEVEL_HIGH(SDMMC1_CMD) | \
720
PIN_ODR_LEVEL_HIGH(SPI2_EXTERNAL_CLK) | \
721
PIN_ODR_LEVEL_LOW(LED2) | \
722
PIN_ODR_LEVEL_HIGH(UART2_TX) | \
723
PIN_ODR_LEVEL_HIGH(UART2_RX) | \
724
PIN_ODR_LEVEL_LOW(PD07) | \
725
PIN_ODR_LEVEL_HIGH(UART3_TX) | \
726
PIN_ODR_LEVEL_HIGH(UART3_RX) | \
727
PIN_ODR_LEVEL_LOW(LED4) | \
728
PIN_ODR_LEVEL_LOW(PD11) | \
729
PIN_ODR_LEVEL_HIGH(I2C4_SCL) | \
730
PIN_ODR_LEVEL_HIGH(I2C4_SDA) | \
731
PIN_ODR_LEVEL_LOW(PD14) | \
732
PIN_ODR_LEVEL_LOW(LED3))
717
#define VAL_GPIOD_ODR (PIN_ODR_LEVEL_HIGH(CAN_RX) | \
…
733
734
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(CAN_RX, 9) | \
735
PIN_AFIO_AF(CAN_TX, 9) | \
736
PIN_AFIO_AF(SDMMC1_CMD, 12) | \
737
PIN_AFIO_AF(SPI2_EXTERNAL_CLK, 5) | \
738
PIN_AFIO_AF(LED2, 0) | \
739
PIN_AFIO_AF(UART2_TX, 7) | \
740
PIN_AFIO_AF(UART2_RX, 7) | \
741
PIN_AFIO_AF(PD07, 0))
734
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(CAN_RX, 9) | \
…
742
743
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(UART3_TX, 7) | \
744
PIN_AFIO_AF(UART3_RX, 7) | \
745
PIN_AFIO_AF(LED4, 0) | \
746
PIN_AFIO_AF(PD11, 0) | \
747
PIN_AFIO_AF(I2C4_SCL, 4) | \
748
PIN_AFIO_AF(I2C4_SDA, 4) | \
749
PIN_AFIO_AF(PD14, 0) | \
750
PIN_AFIO_AF(LED3, 0))
743
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(UART3_TX, 7) | \
…
751
752
#define VAL_GPIOE_MODER (PIN_MODE_ALTERNATE(RC1) | \
753
PIN_MODE_INPUT(PE01) | \
754
PIN_MODE_INPUT(PE02) | \
755
PIN_MODE_OUTPUT(SPI6_INTERNAL_CS) | \
756
PIN_MODE_INPUT(PE04) | \
757
PIN_MODE_INPUT(PE05) | \
758
PIN_MODE_INPUT(PE06) | \
759
PIN_MODE_INPUT(PE07) | \
760
PIN_MODE_INPUT(PE08) | \
761
PIN_MODE_ALTERNATE(SRVA1) | \
762
PIN_MODE_INPUT(PE10) | \
763
PIN_MODE_ALTERNATE(SRVA2) | \
764
PIN_MODE_INPUT(PE12) | \
765
PIN_MODE_ALTERNATE(SRVA3) | \
766
PIN_MODE_ALTERNATE(SRVA4) | \
767
PIN_MODE_INPUT(PE15))
752
#define VAL_GPIOE_MODER (PIN_MODE_ALTERNATE(RC1) | \
…
768
769
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(RC1) | \
770
PIN_OTYPE_PUSHPULL(PE01) | \
771
PIN_OTYPE_PUSHPULL(PE02) | \
772
PIN_OTYPE_PUSHPULL(SPI6_INTERNAL_CS) | \
773
PIN_OTYPE_PUSHPULL(PE04) | \
774
PIN_OTYPE_PUSHPULL(PE05) | \
775
PIN_OTYPE_PUSHPULL(PE06) | \
776
PIN_OTYPE_PUSHPULL(PE07) | \
777
PIN_OTYPE_PUSHPULL(PE08) | \
778
PIN_OTYPE_PUSHPULL(SRVA1) | \
779
PIN_OTYPE_PUSHPULL(PE10) | \
780
PIN_OTYPE_PUSHPULL(SRVA2) | \
781
PIN_OTYPE_PUSHPULL(PE12) | \
782
PIN_OTYPE_PUSHPULL(SRVA3) | \
783
PIN_OTYPE_PUSHPULL(SRVA4) | \
784
PIN_OTYPE_PUSHPULL(PE15))
769
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(RC1) | \
…
785
786
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_SPEED_HIGH(RC1) | \
787
PIN_OSPEED_SPEED_VERYLOW(PE01) | \
788
PIN_OSPEED_SPEED_VERYLOW(PE02) | \
789
PIN_OSPEED_SPEED_HIGH(SPI6_INTERNAL_CS) | \
790
PIN_OSPEED_SPEED_VERYLOW(PE04) | \
791
PIN_OSPEED_SPEED_VERYLOW(PE05) | \
792
PIN_OSPEED_SPEED_VERYLOW(PE06) | \
793
PIN_OSPEED_SPEED_VERYLOW(PE07) | \
794
PIN_OSPEED_SPEED_VERYLOW(PE08) | \
795
PIN_OSPEED_SPEED_HIGH(SRVA1) | \
796
PIN_OSPEED_SPEED_VERYLOW(PE10) | \
797
PIN_OSPEED_SPEED_HIGH(SRVA2) | \
798
PIN_OSPEED_SPEED_VERYLOW(PE12) | \
799
PIN_OSPEED_SPEED_HIGH(SRVA3) | \
800
PIN_OSPEED_SPEED_HIGH(SRVA4) | \
801
PIN_OSPEED_SPEED_VERYLOW(PE15))
786
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_SPEED_HIGH(RC1) | \
…
802
803
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(RC1) | \
804
PIN_PUPDR_PULLDOWN(PE01) | \
805
PIN_PUPDR_PULLDOWN(PE02) | \
806
PIN_PUPDR_FLOATING(SPI6_INTERNAL_CS) | \
807
PIN_PUPDR_PULLDOWN(PE04) | \
808
PIN_PUPDR_PULLDOWN(PE05) | \
809
PIN_PUPDR_PULLDOWN(PE06) | \
810
PIN_PUPDR_PULLDOWN(PE07) | \
811
PIN_PUPDR_PULLDOWN(PE08) | \
812
PIN_PUPDR_FLOATING(SRVA1) | \
813
PIN_PUPDR_PULLDOWN(PE10) | \
814
PIN_PUPDR_FLOATING(SRVA2) | \
815
PIN_PUPDR_PULLDOWN(PE12) | \
816
PIN_PUPDR_FLOATING(SRVA3) | \
817
PIN_PUPDR_FLOATING(SRVA4) | \
818
PIN_PUPDR_PULLDOWN(PE15))
803
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(RC1) | \
…
819
820
#define VAL_GPIOE_ODR (PIN_ODR_LEVEL_HIGH(RC1) | \
821
PIN_ODR_LEVEL_LOW(PE01) | \
822
PIN_ODR_LEVEL_LOW(PE02) | \
823
PIN_ODR_LEVEL_HIGH(SPI6_INTERNAL_CS) | \
824
PIN_ODR_LEVEL_LOW(PE04) | \
825
PIN_ODR_LEVEL_LOW(PE05) | \
826
PIN_ODR_LEVEL_LOW(PE06) | \
827
PIN_ODR_LEVEL_LOW(PE07) | \
828
PIN_ODR_LEVEL_LOW(PE08) | \
829
PIN_ODR_LEVEL_LOW(SRVA1) | \
830
PIN_ODR_LEVEL_LOW(PE10) | \
831
PIN_ODR_LEVEL_LOW(SRVA2) | \
832
PIN_ODR_LEVEL_LOW(PE12) | \
833
PIN_ODR_LEVEL_LOW(SRVA3) | \
834
PIN_ODR_LEVEL_LOW(SRVA4) | \
835
PIN_ODR_LEVEL_LOW(PE15))
820
#define VAL_GPIOE_ODR (PIN_ODR_LEVEL_HIGH(RC1) | \
…
836
837
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(RC1, 8) | \
838
PIN_AFIO_AF(PE01, 0) | \
839
PIN_AFIO_AF(PE02, 0) | \
840
PIN_AFIO_AF(SPI6_INTERNAL_CS, 0) | \
841
PIN_AFIO_AF(PE04, 0) | \
842
PIN_AFIO_AF(PE05, 0) | \
843
PIN_AFIO_AF(PE06, 0) | \
844
PIN_AFIO_AF(PE07, 0))
837
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(RC1, 8) | \
…
845
846
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(PE08, 0) | \
847
PIN_AFIO_AF(SRVA1, 1) | \
848
PIN_AFIO_AF(PE10, 0) | \
849
PIN_AFIO_AF(SRVA2, 1) | \
850
PIN_AFIO_AF(PE12, 0) | \
851
PIN_AFIO_AF(SRVA3, 1) | \
852
PIN_AFIO_AF(SRVA4, 1) | \
853
PIN_AFIO_AF(PE15, 0))
846
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(PE08, 0) | \
…
854
855
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(PF00) | \
856
PIN_MODE_INPUT(PF01) | \
857
PIN_MODE_INPUT(PF02) | \
858
PIN_MODE_INPUT(PF03) | \
859
PIN_MODE_INPUT(PF04) | \
860
PIN_MODE_INPUT(PF05) | \
861
PIN_MODE_INPUT(PF06) | \
862
PIN_MODE_INPUT(PF07) | \
863
PIN_MODE_INPUT(PF08) | \
864
PIN_MODE_INPUT(PF09) | \
865
PIN_MODE_INPUT(PF10) | \
866
PIN_MODE_INPUT(PF11) | \
867
PIN_MODE_INPUT(PF12) | \
868
PIN_MODE_INPUT(PF13) | \
869
PIN_MODE_INPUT(PF14) | \
870
PIN_MODE_INPUT(PF15))
855
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(PF00) | \
…
871
872
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(PF00) | \
873
PIN_OTYPE_PUSHPULL(PF01) | \
874
PIN_OTYPE_PUSHPULL(PF02) | \
875
PIN_OTYPE_PUSHPULL(PF03) | \
876
PIN_OTYPE_PUSHPULL(PF04) | \
877
PIN_OTYPE_PUSHPULL(PF05) | \
878
PIN_OTYPE_PUSHPULL(PF06) | \
879
PIN_OTYPE_PUSHPULL(PF07) | \
880
PIN_OTYPE_PUSHPULL(PF08) | \
881
PIN_OTYPE_PUSHPULL(PF09) | \
882
PIN_OTYPE_PUSHPULL(PF10) | \
883
PIN_OTYPE_PUSHPULL(PF11) | \
884
PIN_OTYPE_PUSHPULL(PF12) | \
885
PIN_OTYPE_PUSHPULL(PF13) | \
886
PIN_OTYPE_PUSHPULL(PF14) | \
887
PIN_OTYPE_PUSHPULL(PF15))
872
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(PF00) | \
…
888
889
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PF00) | \
890
PIN_OSPEED_SPEED_VERYLOW(PF01) | \
891
PIN_OSPEED_SPEED_VERYLOW(PF02) | \
892
PIN_OSPEED_SPEED_VERYLOW(PF03) | \
893
PIN_OSPEED_SPEED_VERYLOW(PF04) | \
894
PIN_OSPEED_SPEED_VERYLOW(PF05) | \
895
PIN_OSPEED_SPEED_VERYLOW(PF06) | \
896
PIN_OSPEED_SPEED_VERYLOW(PF07) | \
897
PIN_OSPEED_SPEED_VERYLOW(PF08) | \
898
PIN_OSPEED_SPEED_VERYLOW(PF09) | \
899
PIN_OSPEED_SPEED_VERYLOW(PF10) | \
900
PIN_OSPEED_SPEED_VERYLOW(PF11) | \
901
PIN_OSPEED_SPEED_VERYLOW(PF12) | \
902
PIN_OSPEED_SPEED_VERYLOW(PF13) | \
903
PIN_OSPEED_SPEED_VERYLOW(PF14) | \
904
PIN_OSPEED_SPEED_VERYLOW(PF15))
889
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PF00) | \
…
905
906
#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLDOWN(PF00) | \
907
PIN_PUPDR_PULLDOWN(PF01) | \
908
PIN_PUPDR_PULLDOWN(PF02) | \
909
PIN_PUPDR_PULLDOWN(PF03) | \
910
PIN_PUPDR_PULLDOWN(PF04) | \
911
PIN_PUPDR_PULLDOWN(PF05) | \
912
PIN_PUPDR_PULLDOWN(PF06) | \
913
PIN_PUPDR_PULLDOWN(PF07) | \
914
PIN_PUPDR_PULLDOWN(PF08) | \
915
PIN_PUPDR_PULLDOWN(PF09) | \
916
PIN_PUPDR_PULLDOWN(PF10) | \
917
PIN_PUPDR_PULLDOWN(PF11) | \
918
PIN_PUPDR_PULLDOWN(PF12) | \
919
PIN_PUPDR_PULLDOWN(PF13) | \
920
PIN_PUPDR_PULLDOWN(PF14) | \
921
PIN_PUPDR_PULLDOWN(PF15))
906
#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLDOWN(PF00) | \
…
922
923
#define VAL_GPIOF_ODR (PIN_ODR_LEVEL_LOW(PF00) | \
924
PIN_ODR_LEVEL_LOW(PF01) | \
925
PIN_ODR_LEVEL_LOW(PF02) | \
926
PIN_ODR_LEVEL_LOW(PF03) | \
927
PIN_ODR_LEVEL_LOW(PF04) | \
928
PIN_ODR_LEVEL_LOW(PF05) | \
929
PIN_ODR_LEVEL_LOW(PF06) | \
930
PIN_ODR_LEVEL_LOW(PF07) | \
931
PIN_ODR_LEVEL_LOW(PF08) | \
932
PIN_ODR_LEVEL_LOW(PF09) | \
933
PIN_ODR_LEVEL_LOW(PF10) | \
934
PIN_ODR_LEVEL_LOW(PF11) | \
935
PIN_ODR_LEVEL_LOW(PF12) | \
936
PIN_ODR_LEVEL_LOW(PF13) | \
937
PIN_ODR_LEVEL_LOW(PF14) | \
938
PIN_ODR_LEVEL_LOW(PF15))
923
#define VAL_GPIOF_ODR (PIN_ODR_LEVEL_LOW(PF00) | \
…
939
940
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(PF00, 0) | \
941
PIN_AFIO_AF(PF01, 0) | \
942
PIN_AFIO_AF(PF02, 0) | \
943
PIN_AFIO_AF(PF03, 0) | \
944
PIN_AFIO_AF(PF04, 0) | \
945
PIN_AFIO_AF(PF05, 0) | \
946
PIN_AFIO_AF(PF06, 0) | \
947
PIN_AFIO_AF(PF07, 0))
940
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(PF00, 0) | \
…
948
949
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(PF08, 0) | \
950
PIN_AFIO_AF(PF09, 0) | \
951
PIN_AFIO_AF(PF10, 0) | \
952
PIN_AFIO_AF(PF11, 0) | \
953
PIN_AFIO_AF(PF12, 0) | \
954
PIN_AFIO_AF(PF13, 0) | \
955
PIN_AFIO_AF(PF14, 0) | \
956
PIN_AFIO_AF(PF15, 0))
949
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(PF08, 0) | \
…
957
958
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(PG00) | \
959
PIN_MODE_INPUT(PG01) | \
960
PIN_MODE_INPUT(PG02) | \
961
PIN_MODE_INPUT(PG03) | \
962
PIN_MODE_INPUT(PG04) | \
963
PIN_MODE_INPUT(PG05) | \
964
PIN_MODE_INPUT(PG06) | \
965
PIN_MODE_INPUT(PG07) | \
966
PIN_MODE_INPUT(PG08) | \
967
PIN_MODE_INPUT(PG09) | \
968
PIN_MODE_INPUT(PG10) | \
969
PIN_MODE_INPUT(PG11) | \
970
PIN_MODE_INPUT(PG12) | \
971
PIN_MODE_INPUT(PG13) | \
972
PIN_MODE_INPUT(PG14) | \
973
PIN_MODE_INPUT(PG15))
958
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(PG00) | \
…
974
975
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(PG00) | \
976
PIN_OTYPE_PUSHPULL(PG01) | \
977
PIN_OTYPE_PUSHPULL(PG02) | \
978
PIN_OTYPE_PUSHPULL(PG03) | \
979
PIN_OTYPE_PUSHPULL(PG04) | \
980
PIN_OTYPE_PUSHPULL(PG05) | \
981
PIN_OTYPE_PUSHPULL(PG06) | \
982
PIN_OTYPE_PUSHPULL(PG07) | \
983
PIN_OTYPE_PUSHPULL(PG08) | \
984
PIN_OTYPE_PUSHPULL(PG09) | \
985
PIN_OTYPE_PUSHPULL(PG10) | \
986
PIN_OTYPE_PUSHPULL(PG11) | \
987
PIN_OTYPE_PUSHPULL(PG12) | \
988
PIN_OTYPE_PUSHPULL(PG13) | \
989
PIN_OTYPE_PUSHPULL(PG14) | \
990
PIN_OTYPE_PUSHPULL(PG15))
975
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(PG00) | \
…
991
992
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PG00) | \
993
PIN_OSPEED_SPEED_VERYLOW(PG01) | \
994
PIN_OSPEED_SPEED_VERYLOW(PG02) | \
995
PIN_OSPEED_SPEED_VERYLOW(PG03) | \
996
PIN_OSPEED_SPEED_VERYLOW(PG04) | \
997
PIN_OSPEED_SPEED_VERYLOW(PG05) | \
998
PIN_OSPEED_SPEED_VERYLOW(PG06) | \
999
PIN_OSPEED_SPEED_VERYLOW(PG07) | \
1000
PIN_OSPEED_SPEED_VERYLOW(PG08) | \
1001
PIN_OSPEED_SPEED_VERYLOW(PG09) | \
1002
PIN_OSPEED_SPEED_VERYLOW(PG10) | \
1003
PIN_OSPEED_SPEED_VERYLOW(PG11) | \
1004
PIN_OSPEED_SPEED_VERYLOW(PG12) | \
1005
PIN_OSPEED_SPEED_VERYLOW(PG13) | \
1006
PIN_OSPEED_SPEED_VERYLOW(PG14) | \
1007
PIN_OSPEED_SPEED_VERYLOW(PG15))
992
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PG00) | \
…
1008
1009
#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLDOWN(PG00) | \
1010
PIN_PUPDR_PULLDOWN(PG01) | \
1011
PIN_PUPDR_PULLDOWN(PG02) | \
1012
PIN_PUPDR_PULLDOWN(PG03) | \
1013
PIN_PUPDR_PULLDOWN(PG04) | \
1014
PIN_PUPDR_PULLDOWN(PG05) | \
1015
PIN_PUPDR_PULLDOWN(PG06) | \
1016
PIN_PUPDR_PULLDOWN(PG07) | \
1017
PIN_PUPDR_PULLDOWN(PG08) | \
1018
PIN_PUPDR_PULLDOWN(PG09) | \
1019
PIN_PUPDR_PULLDOWN(PG10) | \
1020
PIN_PUPDR_PULLDOWN(PG11) | \
1021
PIN_PUPDR_PULLDOWN(PG12) | \
1022
PIN_PUPDR_PULLDOWN(PG13) | \
1023
PIN_PUPDR_PULLDOWN(PG14) | \
1024
PIN_PUPDR_PULLDOWN(PG15))
1009
#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLDOWN(PG00) | \
…
1025
1026
#define VAL_GPIOG_ODR (PIN_ODR_LEVEL_LOW(PG00) | \
1027
PIN_ODR_LEVEL_LOW(PG01) | \
1028
PIN_ODR_LEVEL_LOW(PG02) | \
1029
PIN_ODR_LEVEL_LOW(PG03) | \
1030
PIN_ODR_LEVEL_LOW(PG04) | \
1031
PIN_ODR_LEVEL_LOW(PG05) | \
1032
PIN_ODR_LEVEL_LOW(PG06) | \
1033
PIN_ODR_LEVEL_LOW(PG07) | \
1034
PIN_ODR_LEVEL_LOW(PG08) | \
1035
PIN_ODR_LEVEL_LOW(PG09) | \
1036
PIN_ODR_LEVEL_LOW(PG10) | \
1037
PIN_ODR_LEVEL_LOW(PG11) | \
1038
PIN_ODR_LEVEL_LOW(PG12) | \
1039
PIN_ODR_LEVEL_LOW(PG13) | \
1040
PIN_ODR_LEVEL_LOW(PG14) | \
1041
PIN_ODR_LEVEL_LOW(PG15))
1026
#define VAL_GPIOG_ODR (PIN_ODR_LEVEL_LOW(PG00) | \
…
1042
1043
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(PG00, 0) | \
1044
PIN_AFIO_AF(PG01, 0) | \
1045
PIN_AFIO_AF(PG02, 0) | \
1046
PIN_AFIO_AF(PG03, 0) | \
1047
PIN_AFIO_AF(PG04, 0) | \
1048
PIN_AFIO_AF(PG05, 0) | \
1049
PIN_AFIO_AF(PG06, 0) | \
1050
PIN_AFIO_AF(PG07, 0))
1043
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(PG00, 0) | \
…
1051
1052
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(PG08, 0) | \
1053
PIN_AFIO_AF(PG09, 0) | \
1054
PIN_AFIO_AF(PG10, 0) | \
1055
PIN_AFIO_AF(PG11, 0) | \
1056
PIN_AFIO_AF(PG12, 0) | \
1057
PIN_AFIO_AF(PG13, 0) | \
1058
PIN_AFIO_AF(PG14, 0) | \
1059
PIN_AFIO_AF(PG15, 0))
1052
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(PG08, 0) | \
…
1060
1061
#define VAL_GPIOH_MODER (PIN_MODE_ALTERNATE(OSC_IN) | \
1062
PIN_MODE_INPUT(PH01) | \
1063
PIN_MODE_INPUT(PH02) | \
1064
PIN_MODE_INPUT(PH03) | \
1065
PIN_MODE_INPUT(PH04) | \
1066
PIN_MODE_INPUT(PH05) | \
1067
PIN_MODE_INPUT(PH06) | \
1068
PIN_MODE_INPUT(PH07) | \
1069
PIN_MODE_INPUT(PH08) | \
1070
PIN_MODE_INPUT(PH09) | \
1071
PIN_MODE_INPUT(PH10) | \
1072
PIN_MODE_INPUT(PH11) | \
1073
PIN_MODE_INPUT(PH12) | \
1074
PIN_MODE_INPUT(PH13) | \
1075
PIN_MODE_INPUT(PH14) | \
1076
PIN_MODE_INPUT(PH15))
1061
#define VAL_GPIOH_MODER (PIN_MODE_ALTERNATE(OSC_IN) | \
…
1077
1078
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(OSC_IN) | \
1079
PIN_OTYPE_PUSHPULL(PH01) | \
1080
PIN_OTYPE_PUSHPULL(PH02) | \
1081
PIN_OTYPE_PUSHPULL(PH03) | \
1082
PIN_OTYPE_PUSHPULL(PH04) | \
1083
PIN_OTYPE_PUSHPULL(PH05) | \
1084
PIN_OTYPE_PUSHPULL(PH06) | \
1085
PIN_OTYPE_PUSHPULL(PH07) | \
1086
PIN_OTYPE_PUSHPULL(PH08) | \
1087
PIN_OTYPE_PUSHPULL(PH09) | \
1088
PIN_OTYPE_PUSHPULL(PH10) | \
1089
PIN_OTYPE_PUSHPULL(PH11) | \
1090
PIN_OTYPE_PUSHPULL(PH12) | \
1091
PIN_OTYPE_PUSHPULL(PH13) | \
1092
PIN_OTYPE_PUSHPULL(PH14) | \
1093
PIN_OTYPE_PUSHPULL(PH15))
1078
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(OSC_IN) | \
…
1094
1095
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_SPEED_HIGH(OSC_IN) | \
1096
PIN_OSPEED_SPEED_VERYLOW(PH01) | \
1097
PIN_OSPEED_SPEED_VERYLOW(PH02) | \
1098
PIN_OSPEED_SPEED_VERYLOW(PH03) | \
1099
PIN_OSPEED_SPEED_VERYLOW(PH04) | \
1100
PIN_OSPEED_SPEED_VERYLOW(PH05) | \
1101
PIN_OSPEED_SPEED_VERYLOW(PH06) | \
1102
PIN_OSPEED_SPEED_VERYLOW(PH07) | \
1103
PIN_OSPEED_SPEED_VERYLOW(PH08) | \
1104
PIN_OSPEED_SPEED_VERYLOW(PH09) | \
1105
PIN_OSPEED_SPEED_VERYLOW(PH10) | \
1106
PIN_OSPEED_SPEED_VERYLOW(PH11) | \
1107
PIN_OSPEED_SPEED_VERYLOW(PH12) | \
1108
PIN_OSPEED_SPEED_VERYLOW(PH13) | \
1109
PIN_OSPEED_SPEED_VERYLOW(PH14) | \
1110
PIN_OSPEED_SPEED_VERYLOW(PH15))
1095
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_SPEED_HIGH(OSC_IN) | \
…
1111
1112
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(OSC_IN) | \
1113
PIN_PUPDR_PULLDOWN(PH01) | \
1114
PIN_PUPDR_PULLDOWN(PH02) | \
1115
PIN_PUPDR_PULLDOWN(PH03) | \
1116
PIN_PUPDR_PULLDOWN(PH04) | \
1117
PIN_PUPDR_PULLDOWN(PH05) | \
1118
PIN_PUPDR_PULLDOWN(PH06) | \
1119
PIN_PUPDR_PULLDOWN(PH07) | \
1120
PIN_PUPDR_PULLDOWN(PH08) | \
1121
PIN_PUPDR_PULLDOWN(PH09) | \
1122
PIN_PUPDR_PULLDOWN(PH10) | \
1123
PIN_PUPDR_PULLDOWN(PH11) | \
1124
PIN_PUPDR_PULLDOWN(PH12) | \
1125
PIN_PUPDR_PULLDOWN(PH13) | \
1126
PIN_PUPDR_PULLDOWN(PH14) | \
1127
PIN_PUPDR_PULLDOWN(PH15))
1112
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(OSC_IN) | \
…
1128
1129
#define VAL_GPIOH_ODR (PIN_ODR_LEVEL_HIGH(OSC_IN) | \
1130
PIN_ODR_LEVEL_LOW(PH01) | \
1131
PIN_ODR_LEVEL_LOW(PH02) | \
1132
PIN_ODR_LEVEL_LOW(PH03) | \
1133
PIN_ODR_LEVEL_LOW(PH04) | \
1134
PIN_ODR_LEVEL_LOW(PH05) | \
1135
PIN_ODR_LEVEL_LOW(PH06) | \
1136
PIN_ODR_LEVEL_LOW(PH07) | \
1137
PIN_ODR_LEVEL_LOW(PH08) | \
1138
PIN_ODR_LEVEL_LOW(PH09) | \
1139
PIN_ODR_LEVEL_LOW(PH10) | \
1140
PIN_ODR_LEVEL_LOW(PH11) | \
1141
PIN_ODR_LEVEL_LOW(PH12) | \
1142
PIN_ODR_LEVEL_LOW(PH13) | \
1143
PIN_ODR_LEVEL_LOW(PH14) | \
1144
PIN_ODR_LEVEL_LOW(PH15))
1129
#define VAL_GPIOH_ODR (PIN_ODR_LEVEL_HIGH(OSC_IN) | \
…
1145
1146
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(OSC_IN, 0) | \
1147
PIN_AFIO_AF(PH01, 0) | \
1148
PIN_AFIO_AF(PH02, 0) | \
1149
PIN_AFIO_AF(PH03, 0) | \
1150
PIN_AFIO_AF(PH04, 0) | \
1151
PIN_AFIO_AF(PH05, 0) | \
1152
PIN_AFIO_AF(PH06, 0) | \
1153
PIN_AFIO_AF(PH07, 0))
1146
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(OSC_IN, 0) | \
…
1154
1155
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(PH08, 0) | \
1156
PIN_AFIO_AF(PH09, 0) | \
1157
PIN_AFIO_AF(PH10, 0) | \
1158
PIN_AFIO_AF(PH11, 0) | \
1159
PIN_AFIO_AF(PH12, 0) | \
1160
PIN_AFIO_AF(PH13, 0) | \
1161
PIN_AFIO_AF(PH14, 0) | \
1162
PIN_AFIO_AF(PH15, 0))
1155
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(PH08, 0) | \
…
1163
1164
#define VAL_GPIOI_MODER (PIN_MODE_INPUT(PI00) | \
1165
PIN_MODE_INPUT(PI01) | \
1166
PIN_MODE_INPUT(PI02) | \
1167
PIN_MODE_INPUT(PI03) | \
1168
PIN_MODE_INPUT(PI04) | \
1169
PIN_MODE_INPUT(PI05) | \
1170
PIN_MODE_INPUT(PI06) | \
1171
PIN_MODE_INPUT(PI07) | \
1172
PIN_MODE_INPUT(PI08) | \
1173
PIN_MODE_INPUT(PI09) | \
1174
PIN_MODE_INPUT(PI10) | \
1175
PIN_MODE_INPUT(PI11) | \
1176
PIN_MODE_INPUT(PI12) | \
1177
PIN_MODE_INPUT(PI13) | \
1178
PIN_MODE_INPUT(PI14) | \
1179
PIN_MODE_INPUT(PI15))
1164
#define VAL_GPIOI_MODER (PIN_MODE_INPUT(PI00) | \
…
1180
1181
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(PI00) | \
1182
PIN_OTYPE_PUSHPULL(PI01) | \
1183
PIN_OTYPE_PUSHPULL(PI02) | \
1184
PIN_OTYPE_PUSHPULL(PI03) | \
1185
PIN_OTYPE_PUSHPULL(PI04) | \
1186
PIN_OTYPE_PUSHPULL(PI05) | \
1187
PIN_OTYPE_PUSHPULL(PI06) | \
1188
PIN_OTYPE_PUSHPULL(PI07) | \
1189
PIN_OTYPE_PUSHPULL(PI08) | \
1190
PIN_OTYPE_PUSHPULL(PI09) | \
1191
PIN_OTYPE_PUSHPULL(PI10) | \
1192
PIN_OTYPE_PUSHPULL(PI11) | \
1193
PIN_OTYPE_PUSHPULL(PI12) | \
1194
PIN_OTYPE_PUSHPULL(PI13) | \
1195
PIN_OTYPE_PUSHPULL(PI14) | \
1196
PIN_OTYPE_PUSHPULL(PI15))
1181
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(PI00) | \
…
1197
1198
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PI00) | \
1199
PIN_OSPEED_SPEED_VERYLOW(PI01) | \
1200
PIN_OSPEED_SPEED_VERYLOW(PI02) | \
1201
PIN_OSPEED_SPEED_VERYLOW(PI03) | \
1202
PIN_OSPEED_SPEED_VERYLOW(PI04) | \
1203
PIN_OSPEED_SPEED_VERYLOW(PI05) | \
1204
PIN_OSPEED_SPEED_VERYLOW(PI06) | \
1205
PIN_OSPEED_SPEED_VERYLOW(PI07) | \
1206
PIN_OSPEED_SPEED_VERYLOW(PI08) | \
1207
PIN_OSPEED_SPEED_VERYLOW(PI09) | \
1208
PIN_OSPEED_SPEED_VERYLOW(PI10) | \
1209
PIN_OSPEED_SPEED_VERYLOW(PI11) | \
1210
PIN_OSPEED_SPEED_VERYLOW(PI12) | \
1211
PIN_OSPEED_SPEED_VERYLOW(PI13) | \
1212
PIN_OSPEED_SPEED_VERYLOW(PI14) | \
1213
PIN_OSPEED_SPEED_VERYLOW(PI15))
1198
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PI00) | \
…
1214
1215
#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLDOWN(PI00) | \
1216
PIN_PUPDR_PULLDOWN(PI01) | \
1217
PIN_PUPDR_PULLDOWN(PI02) | \
1218
PIN_PUPDR_PULLDOWN(PI03) | \
1219
PIN_PUPDR_PULLDOWN(PI04) | \
1220
PIN_PUPDR_PULLDOWN(PI05) | \
1221
PIN_PUPDR_PULLDOWN(PI06) | \
1222
PIN_PUPDR_PULLDOWN(PI07) | \
1223
PIN_PUPDR_PULLDOWN(PI08) | \
1224
PIN_PUPDR_PULLDOWN(PI09) | \
1225
PIN_PUPDR_PULLDOWN(PI10) | \
1226
PIN_PUPDR_PULLDOWN(PI11) | \
1227
PIN_PUPDR_PULLDOWN(PI12) | \
1228
PIN_PUPDR_PULLDOWN(PI13) | \
1229
PIN_PUPDR_PULLDOWN(PI14) | \
1230
PIN_PUPDR_PULLDOWN(PI15))
1215
#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLDOWN(PI00) | \
…
1231
1232
#define VAL_GPIOI_ODR (PIN_ODR_LEVEL_LOW(PI00) | \
1233
PIN_ODR_LEVEL_LOW(PI01) | \
1234
PIN_ODR_LEVEL_LOW(PI02) | \
1235
PIN_ODR_LEVEL_LOW(PI03) | \
1236
PIN_ODR_LEVEL_LOW(PI04) | \
1237
PIN_ODR_LEVEL_LOW(PI05) | \
1238
PIN_ODR_LEVEL_LOW(PI06) | \
1239
PIN_ODR_LEVEL_LOW(PI07) | \
1240
PIN_ODR_LEVEL_LOW(PI08) | \
1241
PIN_ODR_LEVEL_LOW(PI09) | \
1242
PIN_ODR_LEVEL_LOW(PI10) | \
1243
PIN_ODR_LEVEL_LOW(PI11) | \
1244
PIN_ODR_LEVEL_LOW(PI12) | \
1245
PIN_ODR_LEVEL_LOW(PI13) | \
1246
PIN_ODR_LEVEL_LOW(PI14) | \
1247
PIN_ODR_LEVEL_LOW(PI15))
1232
#define VAL_GPIOI_ODR (PIN_ODR_LEVEL_LOW(PI00) | \
…
1248
1249
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(PI00, 0) | \
1250
PIN_AFIO_AF(PI01, 0) | \
1251
PIN_AFIO_AF(PI02, 0) | \
1252
PIN_AFIO_AF(PI03, 0) | \
1253
PIN_AFIO_AF(PI04, 0) | \
1254
PIN_AFIO_AF(PI05, 0) | \
1255
PIN_AFIO_AF(PI06, 0) | \
1256
PIN_AFIO_AF(PI07, 0))
1249
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(PI00, 0) | \
…
1257
1258
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(PI08, 0) | \
1259
PIN_AFIO_AF(PI09, 0) | \
1260
PIN_AFIO_AF(PI10, 0) | \
1261
PIN_AFIO_AF(PI11, 0) | \
1262
PIN_AFIO_AF(PI12, 0) | \
1263
PIN_AFIO_AF(PI13, 0) | \
1264
PIN_AFIO_AF(PI14, 0) | \
1265
PIN_AFIO_AF(PI15, 0))
1258
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(PI08, 0) | \
…
1266
1267
#define VAL_GPIOJ_MODER (PIN_MODE_INPUT(PJ00) | \
1268
PIN_MODE_INPUT(PJ01) | \
1269
PIN_MODE_INPUT(PJ02) | \
1270
PIN_MODE_INPUT(PJ03) | \
1271
PIN_MODE_INPUT(PJ04) | \
1272
PIN_MODE_INPUT(PJ05) | \
1273
PIN_MODE_INPUT(PJ06) | \
1274
PIN_MODE_INPUT(PJ07) | \
1275
PIN_MODE_INPUT(PJ08) | \
1276
PIN_MODE_INPUT(PJ09) | \
1277
PIN_MODE_INPUT(PJ10) | \
1278
PIN_MODE_INPUT(PJ11) | \
1279
PIN_MODE_INPUT(PJ12) | \
1280
PIN_MODE_INPUT(PJ13) | \
1281
PIN_MODE_INPUT(PJ14) | \
1282
PIN_MODE_INPUT(PJ15))
1267
#define VAL_GPIOJ_MODER (PIN_MODE_INPUT(PJ00) | \
…
1283
1284
#define VAL_GPIOJ_OTYPER (PIN_OTYPE_PUSHPULL(PJ00) | \
1285
PIN_OTYPE_PUSHPULL(PJ01) | \
1286
PIN_OTYPE_PUSHPULL(PJ02) | \
1287
PIN_OTYPE_PUSHPULL(PJ03) | \
1288
PIN_OTYPE_PUSHPULL(PJ04) | \
1289
PIN_OTYPE_PUSHPULL(PJ05) | \
1290
PIN_OTYPE_PUSHPULL(PJ06) | \
1291
PIN_OTYPE_PUSHPULL(PJ07) | \
1292
PIN_OTYPE_PUSHPULL(PJ08) | \
1293
PIN_OTYPE_PUSHPULL(PJ09) | \
1294
PIN_OTYPE_PUSHPULL(PJ10) | \
1295
PIN_OTYPE_PUSHPULL(PJ11) | \
1296
PIN_OTYPE_PUSHPULL(PJ12) | \
1297
PIN_OTYPE_PUSHPULL(PJ13) | \
1298
PIN_OTYPE_PUSHPULL(PJ14) | \
1299
PIN_OTYPE_PUSHPULL(PJ15))
1284
#define VAL_GPIOJ_OTYPER (PIN_OTYPE_PUSHPULL(PJ00) | \
…
1300
1301
#define VAL_GPIOJ_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PJ00) | \
1302
PIN_OSPEED_SPEED_VERYLOW(PJ01) | \
1303
PIN_OSPEED_SPEED_VERYLOW(PJ02) | \
1304
PIN_OSPEED_SPEED_VERYLOW(PJ03) | \
1305
PIN_OSPEED_SPEED_VERYLOW(PJ04) | \
1306
PIN_OSPEED_SPEED_VERYLOW(PJ05) | \
1307
PIN_OSPEED_SPEED_VERYLOW(PJ06) | \
1308
PIN_OSPEED_SPEED_VERYLOW(PJ07) | \
1309
PIN_OSPEED_SPEED_VERYLOW(PJ08) | \
1310
PIN_OSPEED_SPEED_VERYLOW(PJ09) | \
1311
PIN_OSPEED_SPEED_VERYLOW(PJ10) | \
1312
PIN_OSPEED_SPEED_VERYLOW(PJ11) | \
1313
PIN_OSPEED_SPEED_VERYLOW(PJ12) | \
1314
PIN_OSPEED_SPEED_VERYLOW(PJ13) | \
1315
PIN_OSPEED_SPEED_VERYLOW(PJ14) | \
1316
PIN_OSPEED_SPEED_VERYLOW(PJ15))
1301
#define VAL_GPIOJ_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PJ00) | \
…
1317
1318
#define VAL_GPIOJ_PUPDR (PIN_PUPDR_PULLDOWN(PJ00) | \
1319
PIN_PUPDR_PULLDOWN(PJ01) | \
1320
PIN_PUPDR_PULLDOWN(PJ02) | \
1321
PIN_PUPDR_PULLDOWN(PJ03) | \
1322
PIN_PUPDR_PULLDOWN(PJ04) | \
1323
PIN_PUPDR_PULLDOWN(PJ05) | \
1324
PIN_PUPDR_PULLDOWN(PJ06) | \
1325
PIN_PUPDR_PULLDOWN(PJ07) | \
1326
PIN_PUPDR_PULLDOWN(PJ08) | \
1327
PIN_PUPDR_PULLDOWN(PJ09) | \
1328
PIN_PUPDR_PULLDOWN(PJ10) | \
1329
PIN_PUPDR_PULLDOWN(PJ11) | \
1330
PIN_PUPDR_PULLDOWN(PJ12) | \
1331
PIN_PUPDR_PULLDOWN(PJ13) | \
1332
PIN_PUPDR_PULLDOWN(PJ14) | \
1333
PIN_PUPDR_PULLDOWN(PJ15))
1318
#define VAL_GPIOJ_PUPDR (PIN_PUPDR_PULLDOWN(PJ00) | \
…
1334
1335
#define VAL_GPIOJ_ODR (PIN_ODR_LEVEL_LOW(PJ00) | \
1336
PIN_ODR_LEVEL_LOW(PJ01) | \
1337
PIN_ODR_LEVEL_LOW(PJ02) | \
1338
PIN_ODR_LEVEL_LOW(PJ03) | \
1339
PIN_ODR_LEVEL_LOW(PJ04) | \
1340
PIN_ODR_LEVEL_LOW(PJ05) | \
1341
PIN_ODR_LEVEL_LOW(PJ06) | \
1342
PIN_ODR_LEVEL_LOW(PJ07) | \
1343
PIN_ODR_LEVEL_LOW(PJ08) | \
1344
PIN_ODR_LEVEL_LOW(PJ09) | \
1345
PIN_ODR_LEVEL_LOW(PJ10) | \
1346
PIN_ODR_LEVEL_LOW(PJ11) | \
1347
PIN_ODR_LEVEL_LOW(PJ12) | \
1348
PIN_ODR_LEVEL_LOW(PJ13) | \
1349
PIN_ODR_LEVEL_LOW(PJ14) | \
1350
PIN_ODR_LEVEL_LOW(PJ15))
1335
#define VAL_GPIOJ_ODR (PIN_ODR_LEVEL_LOW(PJ00) | \
…
1351
1352
#define VAL_GPIOJ_AFRL (PIN_AFIO_AF(PJ00, 0) | \
1353
PIN_AFIO_AF(PJ01, 0) | \
1354
PIN_AFIO_AF(PJ02, 0) | \
1355
PIN_AFIO_AF(PJ03, 0) | \
1356
PIN_AFIO_AF(PJ04, 0) | \
1357
PIN_AFIO_AF(PJ05, 0) | \
1358
PIN_AFIO_AF(PJ06, 0) | \
1359
PIN_AFIO_AF(PJ07, 0))
1352
#define VAL_GPIOJ_AFRL (PIN_AFIO_AF(PJ00, 0) | \
…
1360
1361
#define VAL_GPIOJ_AFRH (PIN_AFIO_AF(PJ08, 0) | \
1362
PIN_AFIO_AF(PJ09, 0) | \
1363
PIN_AFIO_AF(PJ10, 0) | \
1364
PIN_AFIO_AF(PJ11, 0) | \
1365
PIN_AFIO_AF(PJ12, 0) | \
1366
PIN_AFIO_AF(PJ13, 0) | \
1367
PIN_AFIO_AF(PJ14, 0) | \
1368
PIN_AFIO_AF(PJ15, 0))
1361
#define VAL_GPIOJ_AFRH (PIN_AFIO_AF(PJ08, 0) | \
…
1369
1370
#define VAL_GPIOK_MODER (PIN_MODE_INPUT(PK00) | \
1371
PIN_MODE_INPUT(PK01) | \
1372
PIN_MODE_INPUT(PK02) | \
1373
PIN_MODE_INPUT(PK03) | \
1374
PIN_MODE_INPUT(PK04) | \
1375
PIN_MODE_INPUT(PK05) | \
1376
PIN_MODE_INPUT(PK06) | \
1377
PIN_MODE_INPUT(PK07) | \
1378
PIN_MODE_INPUT(PK08) | \
1379
PIN_MODE_INPUT(PK09) | \
1380
PIN_MODE_INPUT(PK10) | \
1381
PIN_MODE_INPUT(PK11) | \
1382
PIN_MODE_INPUT(PK12) | \
1383
PIN_MODE_INPUT(PK13) | \
1384
PIN_MODE_INPUT(PK14) | \
1385
PIN_MODE_INPUT(PK15))
1370
#define VAL_GPIOK_MODER (PIN_MODE_INPUT(PK00) | \
…
1386
1387
#define VAL_GPIOK_OTYPER (PIN_OTYPE_PUSHPULL(PK00) | \
1388
PIN_OTYPE_PUSHPULL(PK01) | \
1389
PIN_OTYPE_PUSHPULL(PK02) | \
1390
PIN_OTYPE_PUSHPULL(PK03) | \
1391
PIN_OTYPE_PUSHPULL(PK04) | \
1392
PIN_OTYPE_PUSHPULL(PK05) | \
1393
PIN_OTYPE_PUSHPULL(PK06) | \
1394
PIN_OTYPE_PUSHPULL(PK07) | \
1395
PIN_OTYPE_PUSHPULL(PK08) | \
1396
PIN_OTYPE_PUSHPULL(PK09) | \
1397
PIN_OTYPE_PUSHPULL(PK10) | \
1398
PIN_OTYPE_PUSHPULL(PK11) | \
1399
PIN_OTYPE_PUSHPULL(PK12) | \
1400
PIN_OTYPE_PUSHPULL(PK13) | \
1401
PIN_OTYPE_PUSHPULL(PK14) | \
1402
PIN_OTYPE_PUSHPULL(PK15))
1387
#define VAL_GPIOK_OTYPER (PIN_OTYPE_PUSHPULL(PK00) | \
…
1403
1404
#define VAL_GPIOK_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PK00) | \
1405
PIN_OSPEED_SPEED_VERYLOW(PK01) | \
1406
PIN_OSPEED_SPEED_VERYLOW(PK02) | \
1407
PIN_OSPEED_SPEED_VERYLOW(PK03) | \
1408
PIN_OSPEED_SPEED_VERYLOW(PK04) | \
1409
PIN_OSPEED_SPEED_VERYLOW(PK05) | \
1410
PIN_OSPEED_SPEED_VERYLOW(PK06) | \
1411
PIN_OSPEED_SPEED_VERYLOW(PK07) | \
1412
PIN_OSPEED_SPEED_VERYLOW(PK08) | \
1413
PIN_OSPEED_SPEED_VERYLOW(PK09) | \
1414
PIN_OSPEED_SPEED_VERYLOW(PK10) | \
1415
PIN_OSPEED_SPEED_VERYLOW(PK11) | \
1416
PIN_OSPEED_SPEED_VERYLOW(PK12) | \
1417
PIN_OSPEED_SPEED_VERYLOW(PK13) | \
1418
PIN_OSPEED_SPEED_VERYLOW(PK14) | \
1419
PIN_OSPEED_SPEED_VERYLOW(PK15))
1404
#define VAL_GPIOK_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PK00) | \
…
1420
1421
#define VAL_GPIOK_PUPDR (PIN_PUPDR_PULLDOWN(PK00) | \
1422
PIN_PUPDR_PULLDOWN(PK01) | \
1423
PIN_PUPDR_PULLDOWN(PK02) | \
1424
PIN_PUPDR_PULLDOWN(PK03) | \
1425
PIN_PUPDR_PULLDOWN(PK04) | \
1426
PIN_PUPDR_PULLDOWN(PK05) | \
1427
PIN_PUPDR_PULLDOWN(PK06) | \
1428
PIN_PUPDR_PULLDOWN(PK07) | \
1429
PIN_PUPDR_PULLDOWN(PK08) | \
1430
PIN_PUPDR_PULLDOWN(PK09) | \
1431
PIN_PUPDR_PULLDOWN(PK10) | \
1432
PIN_PUPDR_PULLDOWN(PK11) | \
1433
PIN_PUPDR_PULLDOWN(PK12) | \
1434
PIN_PUPDR_PULLDOWN(PK13) | \
1435
PIN_PUPDR_PULLDOWN(PK14) | \
1436
PIN_PUPDR_PULLDOWN(PK15))
1421
#define VAL_GPIOK_PUPDR (PIN_PUPDR_PULLDOWN(PK00) | \
…
1437
1438
#define VAL_GPIOK_ODR (PIN_ODR_LEVEL_LOW(PK00) | \
1439
PIN_ODR_LEVEL_LOW(PK01) | \
1440
PIN_ODR_LEVEL_LOW(PK02) | \
1441
PIN_ODR_LEVEL_LOW(PK03) | \
1442
PIN_ODR_LEVEL_LOW(PK04) | \
1443
PIN_ODR_LEVEL_LOW(PK05) | \
1444
PIN_ODR_LEVEL_LOW(PK06) | \
1445
PIN_ODR_LEVEL_LOW(PK07) | \
1446
PIN_ODR_LEVEL_LOW(PK08) | \
1447
PIN_ODR_LEVEL_LOW(PK09) | \
1448
PIN_ODR_LEVEL_LOW(PK10) | \
1449
PIN_ODR_LEVEL_LOW(PK11) | \
1450
PIN_ODR_LEVEL_LOW(PK12) | \
1451
PIN_ODR_LEVEL_LOW(PK13) | \
1452
PIN_ODR_LEVEL_LOW(PK14) | \
1453
PIN_ODR_LEVEL_LOW(PK15))
1438
#define VAL_GPIOK_ODR (PIN_ODR_LEVEL_LOW(PK00) | \
…
1454
1455
#define VAL_GPIOK_AFRL (PIN_AFIO_AF(PK00, 0) | \
1456
PIN_AFIO_AF(PK01, 0) | \
1457
PIN_AFIO_AF(PK02, 0) | \
1458
PIN_AFIO_AF(PK03, 0) | \
1459
PIN_AFIO_AF(PK04, 0) | \
1460
PIN_AFIO_AF(PK05, 0) | \
1461
PIN_AFIO_AF(PK06, 0) | \
1462
PIN_AFIO_AF(PK07, 0))
1455
#define VAL_GPIOK_AFRL (PIN_AFIO_AF(PK00, 0) | \
…
1463
1464
#define VAL_GPIOK_AFRH (PIN_AFIO_AF(PK08, 0) | \
1465
PIN_AFIO_AF(PK09, 0) | \
1466
PIN_AFIO_AF(PK10, 0) | \
1467
PIN_AFIO_AF(PK11, 0) | \
1468
PIN_AFIO_AF(PK12, 0) | \
1469
PIN_AFIO_AF(PK13, 0) | \
1470
PIN_AFIO_AF(PK14, 0) | \
1471
PIN_AFIO_AF(PK15, 0))
1464
#define VAL_GPIOK_AFRH (PIN_AFIO_AF(PK08, 0) | \
…
1472
1473
#define AF_SPI6_INTERNAL_CLK 8U
1474
#define AF_LINE_SPI6_INTERNAL_CLK 8U
1475
#define AF_SRVB1 2U
1476
#define AF_LINE_SRVB1 2U
1477
#define AF_SRVB2 2U
1478
#define AF_LINE_SRVB2 2U
1479
#define AF_DSHOT_RX 7U
1480
#define AF_LINE_DSHOT_RX 7U
1481
#define AF_OTG_FS_DM 10U
1482
#define AF_LINE_OTG_FS_DM 10U
1483
#define AF_OTG_FS_DP 10U
1484
#define AF_LINE_OTG_FS_DP 10U
1485
#define AF_SWDIO 0U
1486
#define AF_LINE_SWDIO 0U
1487
#define AF_SWCLK 0U
1488
#define AF_LINE_SWCLK 0U
1489
#define AF_UART7_TX 11U
1490
#define AF_LINE_UART7_TX 11U
1491
#define AF_SRVB3 2U
1492
#define AF_LINE_SRVB3 2U
1493
#define AF_SRVB4 2U
1494
#define AF_LINE_SRVB4 2U
1495
#define AF_UART7_RX 11U
1496
#define AF_LINE_UART7_RX 11U
1497
#define AF_SPI6_INTERNAL_MISO 8U
1498
#define AF_LINE_SPI6_INTERNAL_MISO 8U
1499
#define AF_SPI6_INTERNAL_MOSI 8U
1500
#define AF_LINE_SPI6_INTERNAL_MOSI 8U
1501
#define AF_I2C2_SCL 4U
1502
#define AF_LINE_I2C2_SCL 4U
1503
#define AF_I2C2_SDA 4U
1504
#define AF_LINE_I2C2_SDA 4U
1505
#define AF_SPI2_EXTERNAL_MISO 5U
1506
#define AF_LINE_SPI2_EXTERNAL_MISO 5U
1507
#define AF_SPI2_EXTERNAL_MOSI 5U
1508
#define AF_LINE_SPI2_EXTERNAL_MOSI 5U
1509
#define AF_SDMMC1_D0 12U
1510
#define AF_LINE_SDMMC1_D0 12U
1511
#define AF_SDMMC1_D1 12U
1512
#define AF_LINE_SDMMC1_D1 12U
1513
#define AF_SDMMC1_D2 12U
1514
#define AF_LINE_SDMMC1_D2 12U
1515
#define AF_SDMMC1_D3 12U
1516
#define AF_LINE_SDMMC1_D3 12U
1517
#define AF_SDMMC1_CK 12U
1518
#define AF_LINE_SDMMC1_CK 12U
1519
#define AF_CAN_RX 9U
1520
#define AF_LINE_CAN_RX 9U
1521
#define AF_CAN_TX 9U
1522
#define AF_LINE_CAN_TX 9U
1523
#define AF_SDMMC1_CMD 12U
1524
#define AF_LINE_SDMMC1_CMD 12U
1525
#define AF_SPI2_EXTERNAL_CLK 5U
1526
#define AF_LINE_SPI2_EXTERNAL_CLK 5U
1527
#define AF_UART2_TX 7U
1528
#define AF_LINE_UART2_TX 7U
1529
#define AF_UART2_RX 7U
1530
#define AF_LINE_UART2_RX 7U
1531
#define AF_UART3_TX 7U
1532
#define AF_LINE_UART3_TX 7U
1533
#define AF_UART3_RX 7U
1534
#define AF_LINE_UART3_RX 7U
1535
#define AF_I2C4_SCL 4U
1536
#define AF_LINE_I2C4_SCL 4U
1537
#define AF_I2C4_SDA 4U
1538
#define AF_LINE_I2C4_SDA 4U
1539
#define AF_RC1 8U
1540
#define AF_LINE_RC1 8U
1541
#define AF_SRVA1 1U
1542
#define AF_LINE_SRVA1 1U
1543
#define AF_SRVA2 1U
1544
#define AF_LINE_SRVA2 1U
1545
#define AF_SRVA3 1U
1546
#define AF_LINE_SRVA3 1U
1547
#define AF_SRVA4 1U
1548
#define AF_LINE_SRVA4 1U
1549
#define AF_OSC_IN 0U
1550
#define AF_LINE_OSC_IN 0U
1551
1552
1553
#define AUX_A1_ADC 1
1554
#define AUX_A1_ADC_FN INP
1555
#define AUX_A1_ADC_INP 16
1556
#define AUX_A1_TIM 2
1557
#define AUX_A1_TIM_FN CH
1558
#define AUX_A1_TIM_CH 1
1559
#define AUX_A1_TIM_AF 1
1560
#define AUX_A1_USART 2
1561
#define AUX_A1_USART_FN CTS
1562
#define AUX_A1_USART_AF 7
1563
#define AUX_A1_UART 4
1564
#define AUX_A1_UART_FN TX
1565
#define AUX_A1_UART_AF 8
1566
#define AUX_A2_ADC 1
1567
#define AUX_A2_ADC_FN INP
1568
#define AUX_A2_ADC_INP 17
1569
#define AUX_A2_TIM 2
1570
#define AUX_A2_TIM_FN CH
1571
#define AUX_A2_TIM_CH 2
1572
#define AUX_A2_TIM_AF 1
1573
#define AUX_A2_USART 2
1574
#define AUX_A2_USART_FN RTS
1575
#define AUX_A2_USART_AF 7
1576
#define AUX_A2_UART 4
1577
#define AUX_A2_UART_FN RX
1578
#define AUX_A2_UART_AF 8
1579
#define AUX_A3_ADC 1
1580
#define AUX_A3_ADC_FN INP
1581
#define AUX_A3_ADC_INP 14
1582
#define AUX_A3_TIM 2
1583
#define AUX_A3_TIM_FN CH
1584
#define AUX_A3_TIM_CH 3
1585
#define AUX_A3_TIM_AF 1
1586
#define AUX_A3_USART 2
1587
#define AUX_A3_USART_FN TX
1588
#define AUX_A3_USART_AF 7
1589
#define AUX_A4_ADC 1
1590
#define AUX_A4_ADC_FN INP
1591
#define AUX_A4_ADC_INP 15
1592
#define AUX_A4_TIM 2
1593
#define AUX_A4_TIM_FN CH
1594
#define AUX_A4_TIM_CH 4
1595
#define AUX_A4_TIM_AF 1
1596
#define AUX_A4_USART 2
1597
#define AUX_A4_USART_FN RX
1598
#define AUX_A4_USART_AF 7
1599
#define SRVB1_TIM 3
1600
#define SRVB1_TIM_FN CH
1601
#define SRVB1_TIM_CH 1
1602
#define SRVB1_TIM_AF 2
1603
#define SRVB2_TIM 3
1604
#define SRVB2_TIM_FN CH
1605
#define SRVB2_TIM_CH 2
1606
#define SRVB2_TIM_AF 2
1607
#define SRVB3_TIM 3
1608
#define SRVB3_TIM_FN CH
1609
#define SRVB3_TIM_CH 3
1610
#define SRVB3_TIM_AF 2
1611
#define SRVB4_TIM 3
1612
#define SRVB4_TIM_FN CH
1613
#define SRVB4_TIM_CH 4
1614
#define SRVB4_TIM_AF 2
1615
#define AUX_B1_TIM 4
1616
#define AUX_B1_TIM_FN CH
1617
#define AUX_B1_TIM_CH 1
1618
#define AUX_B1_TIM_AF 2
1619
#define AUX_B2_TIM 4
1620
#define AUX_B2_TIM_FN CH
1621
#define AUX_B2_TIM_CH 2
1622
#define AUX_B2_TIM_AF 2
1623
#define AUX_B3_TIM 4
1624
#define AUX_B3_TIM_FN CH
1625
#define AUX_B3_TIM_CH 3
1626
#define AUX_B3_TIM_AF 2
1627
#define AUX_B3_UART 4
1628
#define AUX_B3_UART_FN RX
1629
#define AUX_B3_UART_AF 8
1630
#define AUX_B4_TIM 4
1631
#define AUX_B4_TIM_FN CH
1632
#define AUX_B4_TIM_CH 4
1633
#define AUX_B4_TIM_AF 2
1634
#define AUX_B4_UART 4
1635
#define AUX_B4_UART_FN TX
1636
#define AUX_B4_UART_AF 8
1637
#define VBAT_MEAS_ADC 3
1638
#define VBAT_MEAS_ADC_FN INP
1639
#define VBAT_MEAS_ADC_INP 10
1640
#define RC2_USART 6
1641
#define RC2_USART_FN TX
1642
#define RC2_USART_AF 7
1643
#define RC1_UART 8
1644
#define RC1_UART_FN RX
1645
#define RC1_UART_AF 8
1646
#define SRVA1_TIM 1
1647
#define SRVA1_TIM_FN CH
1648
#define SRVA1_TIM_CH 1
1649
#define SRVA1_TIM_AF 1
1650
#define SRVA2_TIM 1
1651
#define SRVA2_TIM_FN CH
1652
#define SRVA2_TIM_CH 2
1653
#define SRVA2_TIM_AF 1
1654
#define SRVA3_TIM 1
1655
#define SRVA3_TIM_FN CH
1656
#define SRVA3_TIM_CH 3
1657
#define SRVA3_TIM_AF 1
1658
#define SRVA4_TIM 1
1659
#define SRVA4_TIM_FN CH
1660
#define SRVA4_TIM_CH 4
1661
#define SRVA4_TIM_AF 1
1662
1663
#define BOARD_GROUP_DECLFOREACH(line, group) \
1664
static const ioline_t group ## _ARRAY[] = {group}; \
1665
for (ioline_t i=0, line = group ## _ARRAY[i]; (i < group ## _SIZE) && (line = group ## _ARRAY[i]); i++)
1663
#define BOARD_GROUP_DECLFOREACH(line, group) \
…
1666
1667
#define BOARD_GROUP_FOREACH(line, group) \
1668
for (ioline_t i=0, line = group ## _ARRAY[i]; (i < group ## _SIZE) && (line = group ## _ARRAY[i]); i++)
1667
#define BOARD_GROUP_FOREACH(line, group) \
…
1669
1670
1671
#define BOARD_GROUP_DECLFOR(array, index, group) \
1672
static const ioline_t group ## _ARRAY[] = {group}; \
1673
for (ioline_t index=0, *array = (ioline_t *) group ## _ARRAY; index < group ## _SIZE; index++)
1671
#define BOARD_GROUP_DECLFOR(array, index, group) \
…
1674
1675
#define BOARD_GROUP_FOR(array, index, group) \
1676
for (ioline_t index=0, *array = (ioline_t *) group ## _ARRAY; index < group ## _SIZE; index++)
1675
#define BOARD_GROUP_FOR(array, index, group) \
…
1677
1678
#if !defined(_FROM_ASM_)
1679
#ifdef __cplusplus
1680
extern
"C"
{
1681
#endif
1682
void
boardInit
(
void
);
1683
#ifdef __cplusplus
1684
}
1685
#endif
1686
#endif
/* _FROM_ASM_ */
1687
boardInit
void boardInit(void)
Board-specific initialization code.
Definition
board.c:317
sw
airborne
boards
tawaki
chibios
v2.0
board.h
Generated on Mon Mar 17 2025 13:30:44 for Paparazzi UAS by
1.9.8
1.9.8 