Paparazzi UAS  v6.2_unstable
Paparazzi is a free software Unmanned Aircraft System.
nucleo144_f767zi.h
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1 #ifndef CONFIG_NUCLEO144_F767ZI_1_00_H
2 #define CONFIG_NUCLEO144_F767ZI_1_00_H
3 
4 #define BOARD_NUCLEO144_F767ZI
5 
14 
19 /*
20  * AHB_CLK
21  */
22 #define AHB_CLK STM32_HCLK
23 
24 /*
25  * Concat macro
26  */
27 #define _CONCAT_BOARD_PARAM(_s1, _s2) _s1 ## _s2
28 #define CONCAT_BOARD_PARAM(_s1, _s2) _CONCAT_BOARD_PARAM(_s1, _s2)
29 
30 /*
31  * LEDs
32  */
33 /* green, on PB0, 1 on LED_ON, 0 on LED_OFF */
34 #ifndef USE_LED_1
35 #define USE_LED_1 1
36 #endif
37 #define LED_1_GPIO PAL_PORT(LINE_LED1)
38 #define LED_1_GPIO_PIN PAL_PAD(LINE_LED1)
39 #define LED_1_GPIO_ON gpio_set
40 #define LED_1_GPIO_OFF gpio_clear
41 
42 /* blue, on PB7, 1 on LED_ON, 0 on LED_OFF */
43 #ifndef USE_LED_2
44 #define USE_LED_2 1
45 #endif
46 #define LED_2_GPIO PAL_PORT(LINE_LED2)
47 #define LED_2_GPIO_PIN PAL_PAD(LINE_LED2)
48 #define LED_2_GPIO_ON gpio_set
49 #define LED_2_GPIO_OFF gpio_clear
50 
51 /* red, on PB14, 1 on LED_ON, 0 on LED_OFF (disabled by default as shared with SPI2) */
52 #ifndef USE_LED_3
53 #define USE_LED_3 0
54 #endif
55 #define LED_3_GPIO PAL_PORT(LINE_LED3)
56 #define LED_3_GPIO_PIN PAL_PAD(LINE_LED3)
57 #define LED_3_GPIO_ON gpio_set
58 #define LED_3_GPIO_OFF gpio_clear
59 
60 /*
61  * ADCs
62  */
63 // AUXa1
64 #if USE_ADC_1
65 #define AD1_1_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_A1_ADC_IN)
66 #define ADC_1 AD1_1
67 #define ADC_1_GPIO_PORT PAL_PORT(LINE_AUX_A1)
68 #define ADC_1_GPIO_PIN PAL_PAD(LINE_AUX_A1)
69 #endif
70 
71 // AUXa2
72 #if USE_ADC_2
73 #define AD1_2_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_A2_ADC_IN)
74 #define ADC_2 AD1_2
75 #define ADC_2_GPIO_PORT PAL_PORT(LINE_AUX_A2)
76 #define ADC_2_GPIO_PIN PAL_PAD(LINE_AUX_A2)
77 #endif
78 
79 // AUXa3
80 #if USE_ADC_3
81 #define AD1_3_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_A3_ADC_IN)
82 #define ADC_3 AD1_3
83 #define ADC_3_GPIO_PORT PAL_PORT(LINE_AUX_A3)
84 #define ADC_3_GPIO_PIN PAL_PAD(LINE_AUX_A3)
85 #endif
86 
87 // AUXa4
88 #if USE_ADC_4
89 #define AD1_4_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_A4_ADC_IN)
90 #define ADC_4 AD1_4
91 #define ADC_4_GPIO_PORT PAL_PORT(LINE_AUX_A4)
92 #define ADC_4_GPIO_PIN PAL_PAD(LINE_AUX_A4)
93 #endif
94 
95 // AUXb1
96 #if USE_ADC_5
97 #define AD1_5_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_B1_ADC_IN)
98 #define ADC_5 AD1_5
99 #define ADC_5_GPIO_PORT PAL_PORT(LINE_AUX_B1)
100 #define ADC_5_GPIO_PIN PAL_PAD(LINE_AUX_B1)
101 #endif
102 
103 // AUXb2
104 #if USE_ADC_6
105 #define AD1_6_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_B2_ADC_IN)
106 #define ADC_6 AD1_6
107 #define ADC_6_GPIO_PORT PAL_PORT(LINE_AUX_B2)
108 #define ADC_6_GPIO_PIN PAL_PAD(LINE_AUX_B2)
109 #endif
110 
111 // AUXb3
112 //#if USE_ADC_7
113 //#define AD1_7_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_B3_ADC_IN)
114 //#define ADC_7 AD1_7
115 //#define ADC_7_GPIO_PORT PAL_PORT(LINE_AUX_B3)
116 //#define ADC_7_GPIO_PIN PAL_PAD(LINE_AUX_B3)
117 //#endif
118 
119 // AUXb4
120 #if USE_ADC_8
121 #define AD1_8_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, AUX_B4_ADC_IN)
122 #define ADC_8 AD1_8
123 #define ADC_8_GPIO_PORT PAL_PORT(LINE_AUX_B4)
124 #define ADC_8_GPIO_PIN PAL_PAD(LINE_AUX_B4)
125 #endif
126 
127 // Internal ADC for battery enabled by default
128 #ifndef USE_ADC_9
129 #define USE_ADC_9 1
130 #endif
131 #if USE_ADC_9
132 #define AD1_9_CHANNEL CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, VBAT_MEAS_ADC_IN)
133 #define ADC_9 AD1_9
134 #define ADC_9_GPIO_PORT PAL_PORT(LINE_VBAT_MEAS)
135 #define ADC_9_GPIO_PIN PAL_PAD(LINE_VBAT_MEAS)
136 #endif
137 
138 /* allow to define ADC_CHANNEL_VSUPPLY in the airframe file*/
139 #ifndef ADC_CHANNEL_VSUPPLY
140 #define ADC_CHANNEL_VSUPPLY ADC_9
141 #endif
142 
143 /*
144  * R1 = 2.2k
145  * R2 = 12k
146  * adc * (3.3 / 2^12) * ((R1 + R2) / R1)
147  */
148 #define VBAT_R1 2200.0f
149 #define VBAT_R2 12000.0f
150 #define DefaultVoltageOfAdc(adc) ((3.3f/4096.0f)*((VBAT_R1+VBAT_R2)/VBAT_R1)*adc)
151 
152 /*
153  * PWM defines
154  */
155 
156 // SRVa connectors, activated in PWM mode by default
157 
158 #ifndef USE_PWM1
159 #define USE_PWM1 1
160 #endif
161 #if USE_PWM1
162 #define PWM_SERVO_1 1
163 #define PWM_SERVO_1_GPIO PAL_PORT(LINE_SRVA1)
164 #define PWM_SERVO_1_PIN PAL_PAD(LINE_SRVA1)
165 #define PWM_SERVO_1_AF AF_SRVA1
166 #define PWM_SERVO_1_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVA1_TIM)
167 #define PWM_SERVO_1_CHANNEL (SRVA1_TIM_CH-1)
168 #define PWM_SERVO_1_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVA1_TIM)
169 #endif
170 
171 #ifndef USE_PWM2
172 #define USE_PWM2 1
173 #endif
174 #if USE_PWM2
175 #define PWM_SERVO_2 2
176 #define PWM_SERVO_2_GPIO PAL_PORT(LINE_SRVA2)
177 #define PWM_SERVO_2_PIN PAL_PAD(LINE_SRVA2)
178 #define PWM_SERVO_2_AF AF_SRVA2
179 #define PWM_SERVO_2_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVA2_TIM)
180 #define PWM_SERVO_2_CHANNEL (SRVA2_TIM_CH-1)
181 #define PWM_SERVO_2_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVA2_TIM)
182 #endif
183 
184 #ifndef USE_PWM3
185 #define USE_PWM3 1
186 #endif
187 #if USE_PWM3
188 #define PWM_SERVO_3 3
189 #define PWM_SERVO_3_GPIO PAL_PORT(LINE_SRVA3)
190 #define PWM_SERVO_3_PIN PAL_PAD(LINE_SRVA3)
191 #define PWM_SERVO_3_AF AF_SRVA3
192 #define PWM_SERVO_3_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVA3_TIM)
193 #define PWM_SERVO_3_CHANNEL (SRVA3_TIM_CH-1)
194 #define PWM_SERVO_3_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVA3_TIM)
195 #endif
196 
197 #ifndef USE_PWM4
198 #define USE_PWM4 1
199 #endif
200 #if USE_PWM4
201 #define PWM_SERVO_4 4
202 #define PWM_SERVO_4_GPIO PAL_PORT(LINE_SRVA4)
203 #define PWM_SERVO_4_PIN PAL_PAD(LINE_SRVA4)
204 #define PWM_SERVO_4_AF AF_SRVA4
205 #define PWM_SERVO_4_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVA4_TIM)
206 #define PWM_SERVO_4_CHANNEL (SRVA4_TIM_CH-1)
207 #define PWM_SERVO_4_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVA4_TIM)
208 #endif
209 
210 // SRVb connector, PWM mode disabled by default (DShot is enabled by default)
211 
212 #ifndef USE_PWM5
213 #define USE_PWM5 0
214 #endif
215 #if USE_PWM5
216 #define PWM_SERVO_5 5
217 #define PWM_SERVO_5_GPIO PAL_PORT(LINE_SRVB1)
218 #define PWM_SERVO_5_PIN PAL_PAD(LINE_SRVB1)
219 #define PWM_SERVO_5_AF AF_SRVB1
220 #define PWM_SERVO_5_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVB1_TIM)
221 #define PWM_SERVO_5_CHANNEL (SRVB1_TIM_CH-1)
222 #define PWM_SERVO_5_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVB1_TIM)
223 #endif
224 
225 #ifndef USE_PWM6
226 #define USE_PWM6 0
227 #endif
228 #if USE_PWM6
229 #define PWM_SERVO_6 6
230 #define PWM_SERVO_6_GPIO PAL_PORT(LINE_SRVB2)
231 #define PWM_SERVO_6_PIN PAL_PAD(LINE_SRVB2)
232 #define PWM_SERVO_6_AF AF_SRVB2
233 #define PWM_SERVO_6_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVB2_TIM)
234 #define PWM_SERVO_6_CHANNEL (SRVB2_TIM_CH-1)
235 #define PWM_SERVO_6_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVB2_TIM)
236 #endif
237 
238 #ifndef USE_PWM7
239 #define USE_PWM7 0
240 #endif
241 #if USE_PWM7
242 #define PWM_SERVO_7 7
243 #define PWM_SERVO_7_GPIO PAL_PORT(LINE_SRVB3)
244 #define PWM_SERVO_7_PIN PAL_PAD(LINE_SRVB3)
245 #define PWM_SERVO_7_AF AF_SRVB3
246 #define PWM_SERVO_7_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVB3_TIM)
247 #define PWM_SERVO_7_CHANNEL (SRVB3_TIM_CH-1)
248 #define PWM_SERVO_7_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVB3_TIM)
249 #endif
250 
251 #ifndef USE_PWM8
252 #define USE_PWM8 0
253 #endif
254 #if USE_PWM8
255 #define PWM_SERVO_8 8
256 #define PWM_SERVO_8_GPIO PAL_PORT(LINE_SRVB4)
257 #define PWM_SERVO_8_PIN PAL_PAD(LINE_SRVB4)
258 #define PWM_SERVO_8_AF AF_SRVB4
259 #define PWM_SERVO_8_DRIVER CONCAT_BOARD_PARAM(PWMD, SRVB4_TIM)
260 #define PWM_SERVO_8_CHANNEL (SRVB4_TIM_CH-1)
261 #define PWM_SERVO_8_CONF CONCAT_BOARD_PARAM(pwmcfg, SRVB4_TIM)
262 #endif
263 
264 #ifndef USE_PWM9
265 #define USE_PWM9 0
266 #endif
267 #if USE_PWM9
268 #define PWM_SERVO_9 9
269 #define PWM_SERVO_9_GPIO PAL_PORT(LINE_AUX_A1)
270 #define PWM_SERVO_9_PIN PAL_PAD(LINE_AUX_A1)
271 #define PWM_SERVO_9_AF GPIO_AF2
272 #define PWM_SERVO_9_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_A1_TIM)
273 #define PWM_SERVO_9_CHANNEL (AUX_A1_TIM_CH-1)
274 #define PWM_SERVO_9_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_A1_TIM)
275 #endif
276 
277 #ifndef USE_PWM10
278 #define USE_PWM10 0
279 #endif
280 #if USE_PWM10
281 #define PWM_SERVO_10 10
282 #define PWM_SERVO_10_GPIO PAL_PORT(LINE_AUX_A2)
283 #define PWM_SERVO_10_PIN PAL_PAD(LINE_AUX_A2)
284 #define PWM_SERVO_10_AF GPIO_AF2
285 #define PWM_SERVO_10_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_A2_TIM)
286 #define PWM_SERVO_10_CHANNEL (AUX_A2_TIM_CH-1)
287 #define PWM_SERVO_10_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_A2_TIM)
288 #endif
289 
290 #ifndef USE_PWM11
291 #define USE_PWM11 0
292 #endif
293 #if USE_PWM11
294 #define PWM_SERVO_11 11
295 #define PWM_SERVO_11_GPIO PAL_PORT(LINE_AUX_A3)
296 #define PWM_SERVO_11_PIN PAL_PAD(LINE_AUX_A3)
297 #define PWM_SERVO_11_AF GPIO_AF2
298 #define PWM_SERVO_11_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_A3_TIM)
299 #define PWM_SERVO_11_CHANNEL (AUX_A3_TIM_CH-1)
300 #define PWM_SERVO_11_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_A3_TIM)
301 #endif
302 
303 #ifndef USE_PWM12
304 #define USE_PWM12 0
305 #endif
306 #if USE_PWM12
307 #define PWM_SERVO_12 12
308 #define PWM_SERVO_12_GPIO PAL_PORT(LINE_AUX_A4)
309 #define PWM_SERVO_12_PIN PAL_PAD(LINE_AUX_A4)
310 #define PWM_SERVO_12_AF GPIO_AF2
311 #define PWM_SERVO_12_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_A4_TIM)
312 #define PWM_SERVO_12_CHANNEL (AUX_A4_TIM_CH-1)
313 #define PWM_SERVO_12_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_A4_TIM)
314 #endif
315 
316 #ifndef USE_PWM13
317 #define USE_PWM13 0
318 #endif
319 #if USE_PWM13
320 #define PWM_SERVO_13 13
321 #define PWM_SERVO_13_GPIO PAL_PORT(LINE_AUX_B1)
322 #define PWM_SERVO_13_PIN PAL_PAD(LINE_AUX_B1)
323 #define PWM_SERVO_13_AF GPIO_AF2
324 #define PWM_SERVO_13_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_B1_TIM)
325 #define PWM_SERVO_13_CHANNEL (AUX_B1_TIM_CH-1)
326 #define PWM_SERVO_13_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_B1_TIM)
327 #endif
328 
329 #ifndef USE_PWM14
330 #define USE_PWM14 0
331 #endif
332 #if USE_PWM14
333 #define PWM_SERVO_14 14
334 #define PWM_SERVO_14_GPIO PAL_PORT(LINE_AUX_B2)
335 #define PWM_SERVO_14_PIN PAL_PAD(LINE_AUX_B2)
336 #define PWM_SERVO_14_AF GPIO_AF2
337 #define PWM_SERVO_14_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_B2_TIM)
338 #define PWM_SERVO_14_CHANNEL (AUX_B2_TIM_CH-1)
339 #define PWM_SERVO_14_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_B2_TIM)
340 #endif
341 
342 //#ifndef USE_PWM15
343 //#define USE_PWM15 0
344 //#endif
345 //#if USE_PWM15
346 //#define PWM_SERVO_15 15
347 //#define PWM_SERVO_15_GPIO PAL_PORT(LINE_AUX_B3)
348 //#define PWM_SERVO_15_PIN PAL_PAD(LINE_AUX_B3)
349 //#define PWM_SERVO_15_AF GPIO_AF2
350 //#define PWM_SERVO_15_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_B3_TIM)
351 //#define PWM_SERVO_15_CHANNEL (AUX_B3_TIM_CH-1)
352 //#define PWM_SERVO_15_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_B3_TIM)
353 //#endif
354 
355 #ifndef USE_PWM16
356 #define USE_PWM16 0
357 #endif
358 #if USE_PWM16
359 #define PWM_SERVO_16 16
360 #define PWM_SERVO_16_GPIO PAL_PORT(LINE_AUX_B4)
361 #define PWM_SERVO_16_PIN PAL_PAD(LINE_AUX_B4)
362 #define PWM_SERVO_16_AF GPIO_AF2
363 #define PWM_SERVO_16_DRIVER CONCAT_BOARD_PARAM(PWMD, AUX_B4_TIM)
364 #define PWM_SERVO_16_CHANNEL (AUX_B4_TIM_CH-1)
365 #define PWM_SERVO_16_CONF CONCAT_BOARD_PARAM(pwmcfg, AUX_B4_TIM)
366 #endif
367 
368 // servo index starting at 1 + regular servos + aux servos
369 // so NB = 1+8+8
370 #define ACTUATORS_PWM_NB 17
371 
372 
376 #ifndef DSHOT_TELEMETRY_DEV
377 #define DSHOT_TELEMETRY_DEV NULL
378 #endif
379 
380 #ifndef USE_DSHOT_TIM4
381 #define USE_DSHOT_TIM4 1 // use SRVb for DShot by default
382 #endif
383 
384 #if USE_DSHOT_TIM4 // Servo B1, B2, B3, B4 on TIM4
385 
386 // Servo B1, B2, B3, B4 on TM4 are primary DSHOT connector
387 #define DSHOT_SERVO_1 1
388 #define DSHOT_SERVO_1_GPIO PAL_PORT(LINE_SRVB1)
389 #define DSHOT_SERVO_1_PIN PAL_PAD(LINE_SRVB1)
390 #define DSHOT_SERVO_1_AF AF_SRVB1
391 #define DSHOT_SERVO_1_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVB1_TIM)
392 #define DSHOT_SERVO_1_CHANNEL SRVB1_TIM_CH
393 
394 #define DSHOT_SERVO_2 2
395 #define DSHOT_SERVO_2_GPIO PAL_PORT(LINE_SRVB2)
396 #define DSHOT_SERVO_2_PIN PAL_PAD(LINE_SRVB2)
397 #define DSHOT_SERVO_2_AF AF_SRVB2
398 #define DSHOT_SERVO_2_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVB2_TIM)
399 #define DSHOT_SERVO_2_CHANNEL SRVB2_TIM_CH
400 
401 #define DSHOT_SERVO_3 3
402 #define DSHOT_SERVO_3_GPIO PAL_PORT(LINE_SRVB3)
403 #define DSHOT_SERVO_3_PIN PAL_PAD(LINE_SRVB3)
404 #define DSHOT_SERVO_3_AF AF_SRVB3
405 #define DSHOT_SERVO_3_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVB3_TIM)
406 #define DSHOT_SERVO_3_CHANNEL SRVB3_TIM_CH
407 
408 #define DSHOT_SERVO_4 4
409 #define DSHOT_SERVO_4_GPIO PAL_PORT(LINE_SRVB4)
410 #define DSHOT_SERVO_4_PIN PAL_PAD(LINE_SRVB4)
411 #define DSHOT_SERVO_4_AF AF_SRVB4
412 #define DSHOT_SERVO_4_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVB4_TIM)
413 #define DSHOT_SERVO_4_CHANNEL SRVB4_TIM_CH
414 
415 #define DSHOT_CONF_TIM4 1
416 #define DSHOT_CONF4_DEF { \
417  .dma_stream = STM32_PWM4_UP_DMA_STREAM, \
418  .dma_channel = STM32_PWM4_UP_DMA_CHANNEL, \
419  .pwmp = &PWMD4, \
420  .tlm_sd = DSHOT_TELEMETRY_DEV, \
421  .dma_buf = &dshot4DmaBuffer, \
422  .dcache_memory_in_use = false \
423 }
424 
425 #endif
426 
427 #if USE_DSHOT_TIM1 // Servo A1, A2, A3, A4 on TIM1 only activated if needed
428 
429 #define DSHOT_SERVO_5 5
430 #define DSHOT_SERVO_5_GPIO PAL_PORT(LINE_SRVA1)
431 #define DSHOT_SERVO_5_PIN PAL_PAD(LINE_SRVA1)
432 #define DSHOT_SERVO_5_AF AF_SRVA1
433 #define DSHOT_SERVO_5_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVA1_TIM)
434 #define DSHOT_SERVO_5_CHANNEL SRVA1_TIM_CH
435 
436 #define DSHOT_SERVO_6 6
437 #define DSHOT_SERVO_6_GPIO PAL_PORT(LINE_SRVA2)
438 #define DSHOT_SERVO_6_PIN PAL_PAD(LINE_SRVA2)
439 #define DSHOT_SERVO_6_AF AF_SRVA2
440 #define DSHOT_SERVO_6_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVA2_TIM)
441 #define DSHOT_SERVO_6_CHANNEL SRVA2_TIM_CH
442 
443 #define DSHOT_SERVO_7 7
444 #define DSHOT_SERVO_7_GPIO PAL_PORT(LINE_SRVA3)
445 #define DSHOT_SERVO_7_PIN PAL_PAD(LINE_SRVA3)
446 #define DSHOT_SERVO_7_AF AF_SRVA3
447 #define DSHOT_SERVO_7_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVA3_TIM)
448 #define DSHOT_SERVO_7_CHANNEL SRVA3_TIM_CH
449 
450 #define DSHOT_SERVO_8 8
451 #define DSHOT_SERVO_8_GPIO PAL_PORT(LINE_SRVA4)
452 #define DSHOT_SERVO_8_PIN PAL_PAD(LINE_SRVA4)
453 #define DSHOT_SERVO_8_AF AF_SRVA4
454 #define DSHOT_SERVO_8_DRIVER CONCAT_BOARD_PARAM(DSHOTD, SRVA4_TIM)
455 #define DSHOT_SERVO_8_CHANNEL SRVA4_TIM_CH
456 
457 #define DSHOT_CONF_TIM1 1
458 #define DSHOT_CONF1_DEF { \
459  .dma_stream = STM32_PWM1_UP_DMA_STREAM, \
460  .dma_channel = STM32_PWM1_UP_DMA_CHANNEL, \
461  .pwmp = &PWMD1, \
462  .tlm_sd = DSHOT_TELEMETRY_DEV, \
463  .dma_buf = &dshot1DmaBuffer, \
464  .dcache_memory_in_use = false \
465 }
466 
467 #endif
468 
472 #define UART2_GPIO_PORT_TX PAL_PORT(LINE_UART2_TX)
473 #define UART2_GPIO_TX PAL_PAD(LINE_UART2_TX)
474 #define UART2_GPIO_PORT_RX PAL_PORT(LINE_UART2_RX)
475 #define UART2_GPIO_RX PAL_PAD(LINE_UART2_RX)
476 #define UART2_GPIO_AF AF_UART2_TX
477 #ifndef UART2_HW_FLOW_CONTROL
478 #define UART2_HW_FLOW_CONTROL FALSE
479 #endif
480 
486 #define UART3_GPIO_PORT_TX PAL_PORT(LINE_UART3_TX)
487 #define UART3_GPIO_TX PAL_PAD(LINE_UART3_TX)
488 #define UART3_GPIO_PORT_RX PAL_PORT(LINE_UART3_RX)
489 #define UART3_GPIO_RX PAL_PAD(LINE_UART3_RX)
490 #define UART3_GPIO_AF AF_UART3_TX
491 
492 #define UART7_GPIO_PORT_TX PAL_PORT(LINE_UART7_TX)
493 #define UART7_GPIO_TX PAL_PAD(LINE_UART7_TX)
494 #define UART7_GPIO_PORT_RX PAL_PORT(LINE_UART7_RX)
495 #define UART7_GPIO_RX PAL_PAD(LINE_UART7_RX)
496 #define UART7_GPIO_AF AF_UART7_TX
497 
502 #define UART4_GPIO_PORT_TX PAL_PORT(LINE_AUX_A1)
503 #define UART4_GPIO_TX PAL_PAD(LINE_AUX_A1)
504 #define UART4_GPIO_PORT_RX PAL_PORT(LINE_AUX_A2)
505 #define UART4_GPIO_RX PAL_PAD(LINE_AUX_A2)
506 #define UART4_GPIO_AF AUX_A1_UART_AF
507 
520 // In case, do dynamic config of UARTs
521 #define USE_UART8_RX TRUE
522 #ifndef USE_UART8_TX // may be used in half duplex mode
523 #define USE_UART8_TX FALSE
524 #endif
525 #define UART8_GPIO_PORT_RX PAL_PORT(LINE_RC1)
526 #define UART8_GPIO_RX PAL_PAD(LINE_RC1)
527 #define UART8_GPIO_AF RC1_UART_AF
528 
529 // FIXME when RC2 is used for FrSky telemetry
530 #define USE_UART6_RX TRUE
531 #define USE_UART6_TX FALSE
532 #define UART6_GPIO_PORT_RX PAL_PORT(LINE_RC2)
533 #define UART6_GPIO_RX PAL_PAD(LINE_RC2)
534 #define UART6_GPIO_AF RC2_USART_AF
535 
536 /* The line that is pulled low at power up to initiate the bind process
537  * PB1: AUXb4
538  */
539 #define SPEKTRUM_BIND_PIN PAL_PORT(LINE_AUX_B4)
540 #define SPEKTRUM_BIND_PIN_PORT PAL_PAD(LINE_AUX_B4)
541 
542 // no wait with chibios as the RTC oscillator takes longer to stabilize
543 #define SPEKTRUM_BIND_WAIT 30000
544 
550 #define RC_PPM_TICKS_PER_USEC 6
551 #define PPM_TIMER_FREQUENCY 6000000
552 #define PPM_CHANNEL CONCAT_BOARD_PARAM(ICU_CHANNEL_, RC2_TIM_CH)
553 #define PPM_TIMER CONCAT_BOARD_PARAM(ICUD, RC2_TIM)
554 
555 /*
556  * PWM input
557  */
558 // PWM_INPUT 1 on PA0 (AUXa1)
559 #define PWM_INPUT1_ICU ICUD2
560 #define PWM_INPUT1_CHANNEL ICU_CHANNEL_1
561 #define PWM_INPUT1_GPIO_PORT PAL_PORT(LINE_AUX_A1)
562 #define PWM_INPUT1_GPIO_PIN PAL_PAD(LINE_AUX_A1)
563 #define PWM_INPUT1_GPIO_AF GPIO_AF1
564 
565 // PWM_INPUT 2 on PA1 (AUXa2)
566 #define PWM_INPUT2_ICU ICUD5
567 #define PWM_INPUT2_CHANNEL ICU_CHANNEL_2
568 #define PWM_INPUT2_GPIO_PORT PAL_PORT(LINE_AUX_A2)
569 #define PWM_INPUT2_GPIO_PIN PAL_PAD(LINE_AUX_A2)
570 #define PWM_INPUT2_GPIO_AF GPIO_AF2
571 
575 // Digital noise filter: 0 disabled, [0x1 - 0xF] enable up to n t_I2CCLK
576 #define STM32_CR1_DNF(n) ((n & 0x0f) << 8)
577 // Timing register
578 #define I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR (STM32_TIMINGR_PRESC(0U) | \
579  STM32_TIMINGR_SCLDEL(10U) | STM32_TIMINGR_SDADEL(0U) | \
580  STM32_TIMINGR_SCLH(34U) | STM32_TIMINGR_SCLL(86U))
581 #define I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR (STM32_TIMINGR_PRESC(1U) | \
582  STM32_TIMINGR_SCLDEL(9U) | STM32_TIMINGR_SDADEL(0U) | \
583  STM32_TIMINGR_SCLH(105U) | STM32_TIMINGR_SCLL(153U))
584 
585 
586 // Internal I2C (baro, magneto)
587 
588 #ifndef I2C4_CLOCK_SPEED
589 #define I2C4_CLOCK_SPEED 400000
590 #endif
591 
592 #if I2C4_CLOCK_SPEED == 400000
593 #define I2C4_CFG_DEF { \
594  .timingr = I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
595  .cr1 = STM32_CR1_DNF(0), \
596  .cr2 = 0 \
597 }
598 #elif I2C4_CLOCK_SPEED == 100000
599 #define I2C4_CFG_DEF { \
600  .timingr = I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
601  .cr1 = STM32_CR1_DNF(0), \
602  .cr2 = 0 \
603 }
604 #else
605 #error "Unknown I2C4 clock speed"
606 #endif
607 
608 // External I2C
609 
610 #ifndef I2C2_CLOCK_SPEED
611 #define I2C2_CLOCK_SPEED 400000
612 #endif
613 
614 #if I2C2_CLOCK_SPEED == 400000
615 #define I2C2_CFG_DEF { \
616  .timingr = I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
617  .cr1 = STM32_CR1_DNF(0), \
618  .cr2 = 0 \
619 }
620 #elif I2C2_CLOCK_SPEED == 100000
621 #define I2C2_CFG_DEF { \
622  .timingr = I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
623  .cr1 = STM32_CR1_DNF(0), \
624  .cr2 = 0 \
625 }
626 #else
627 #error "Unknown I2C2 clock speed"
628 #endif
629 
634 // Internal SPI (IMU)
635 #define SPI4_GPIO_AF AF_SPI4_INTERNAL_CLK
636 #define SPI4_GPIO_PORT_MISO PAL_PORT(LINE_SPI4_INTERNAL_MISO)
637 #define SPI4_GPIO_MISO PAL_PAD(LINE_SPI4_INTERNAL_MISO)
638 #define SPI4_GPIO_PORT_MOSI PAL_PORT(LINE_SPI4_INTERNAL_MOSI)
639 #define SPI4_GPIO_MOSI PAL_PAD(LINE_SPI4_INTERNAL_MOSI)
640 #define SPI4_GPIO_PORT_SCK PAL_PORT(LINE_SPI4_INTERNAL_CLK)
641 #define SPI4_GPIO_SCK PAL_PAD(LINE_SPI4_INTERNAL_CLK)
642 
643 // External SPI
644 #define SPI2_GPIO_AF AF_SPI2_EXTERNAL_CLK
645 #define SPI2_GPIO_PORT_MISO PAL_PORT(LINE_SPI2_EXTERNAL_MISO)
646 #define SPI2_GPIO_MISO PAL_PAD(LINE_SPI2_EXTERNAL_MISO)
647 #define SPI2_GPIO_PORT_MOSI PAL_PORT(LINE_SPI2_EXTERNAL_MOSI)
648 #define SPI2_GPIO_MOSI PAL_PAD(LINE_SPI2_EXTERNAL_MOSI)
649 #define SPI2_GPIO_PORT_SCK PAL_PORT(LINE_SPI2_EXTERNAL_CLK)
650 #define SPI2_GPIO_SCK PAL_PAD(LINE_SPI2_EXTERNAL_CLK)
651 
652 // SLAVE0 on SPI connector (NSS possible)
653 #define SPI_SELECT_SLAVE0_PORT PAL_PORT(LINE_SPI2_EXTERNAL_CS)
654 #define SPI_SELECT_SLAVE0_PIN PAL_PAD(LINE_SPI2_EXTERNAL_CS)
655 // SLAVE1 on AUXb1
656 #define SPI_SELECT_SLAVE1_PORT PAL_PORT(LINE_AUX_B1)
657 #define SPI_SELECT_SLAVE1_PIN PAL_PAD(LINE_AUX_B1)
658 // SLAVE2 on AUXb2
659 #define SPI_SELECT_SLAVE2_PORT PAL_PORT(LINE_AUX_B2)
660 #define SPI_SELECT_SLAVE2_PIN PAL_PAD(LINE_AUX_B2)
661 // SLAVE3 on AUXb3
662 //#define SPI_SELECT_SLAVE3_PORT PAL_PORT(LINE_AUX_B3)
663 //#define SPI_SELECT_SLAVE3_PIN PAL_PAD(LINE_AUX_B3)
664 // SLAVE4 on AUXb4
665 #define SPI_SELECT_SLAVE4_PORT PAL_PORT(LINE_AUX_B4)
666 #define SPI_SELECT_SLAVE4_PIN PAL_PAD(LINE_AUX_B4)
667 // SLAVE5 on PE4 (internal IMU)
668 #define SPI_SELECT_SLAVE5_PORT PAL_PORT(LINE_SPI4_INTERNAL_CS)
669 #define SPI_SELECT_SLAVE5_PIN PAL_PAD(LINE_SPI4_INTERNAL_CS)
670 
677 #ifndef USE_BARO_BOARD
678 #define USE_BARO_BOARD 0
679 #endif
680 
684 #define SDIO_D0_PORT PAL_PORT(LINE_SDMMC1_D0)
685 #define SDIO_D0_PIN PAL_PAD(LINE_SDMMC1_D0)
686 #define SDIO_D1_PORT PAL_PORT(LINE_SDMMC1_D1)
687 #define SDIO_D1_PIN PAL_PAD(LINE_SDMMC1_D1)
688 #define SDIO_D2_PORT PAL_PORT(LINE_SDMMC1_D2)
689 #define SDIO_D2_PIN PAL_PAD(LINE_SDMMC1_D2)
690 #define SDIO_D3_PORT PAL_PORT(LINE_SDMMC1_D3)
691 #define SDIO_D3_PIN PAL_PAD(LINE_SDMMC1_D3)
692 #define SDIO_CK_PORT PAL_PORT(LINE_SDMMC1_CK)
693 #define SDIO_CK_PIN PAL_PAD(LINE_SDMMC1_CK)
694 #define SDIO_CMD_PORT PAL_PORT(LINE_SDMMC1_CMD)
695 #define SDIO_CMD_PIN PAL_PAD(LINE_SDMMC1_CMD)
696 #define SDIO_AF AF_SDMMC1_CK
697 // bat monitoring for file closing
698 #define SDLOG_BAT_ADC CONCAT_BOARD_PARAM(ADCD, VBAT_MEAS_ADC)
699 #define SDLOG_BAT_CHAN CONCAT_BOARD_PARAM(ADC_CHANNEL_IN, VBAT_MEAS_ADC_IN)
700 // usb led status
701 #define SDLOG_USB_LED 4
702 #define SDLOG_USB_VBUS_PORT PAL_PORT(LINE_USB_VBUS)
703 #define SDLOG_USB_VBUS_PIN PAL_PAD(LINE_USB_VBUS)
704 
705 
706 /*
707  * Actuators for fixedwing
708  */
709  /* Default actuators driver */
710 #define DEFAULT_ACTUATORS "modules/actuators/actuators_pwm.h"
711 #define ActuatorDefaultSet(_x,_y) ActuatorPwmSet(_x,_y)
712 #define ActuatorsDefaultInit() ActuatorsPwmInit()
713 #define ActuatorsDefaultCommit() ActuatorsPwmCommit()
714 
718 #define WS2812D1_GPIO PAL_PORT(LINE_AUX_A1)
719 #define WS2812D1_PIN PAL_PAD(LINE_AUX_A1)
720 #define WS2812D1_AF 2
721 #define WS2812D1_CFG_DEF { \
722  .dma_stream = STM32_PWM5_UP_DMA_STREAM, \
723  .dma_channel = STM32_PWM5_UP_DMA_CHANNEL, \
724  .dma_priority = STM32_PWM5_UP_DMA_PRIORITY, \
725  .pwm_channel = 0, \
726  .pwmp = &PWMD5 \
727 }
728 
729 #endif /* CONFIG_NUCLEO144_F767ZI_1_00_H */
730 
board.h