42 #if USE_HARD_FAULT_RECOVERY
44 #if defined(STM32F4XX) || defined (STM32F7XX)
45 #define BCKP_SECTION ".ram5"
46 #define IN_BCKP_SECTION(var) var __attribute__ ((section(BCKP_SECTION), aligned(8)))
48 #error "No backup ram available"
50 IN_BCKP_SECTION(
volatile bool hard_fault);
57 CH_IRQ_HANDLER(HardFault_Handler)
63 CH_IRQ_HANDLER(NMI_Handler)
69 CH_IRQ_HANDLER(MemManage_Handler)
75 CH_IRQ_HANDLER(BusFault_Handler)
81 CH_IRQ_HANDLER(UsageFault_Handler)
87 bool recovering_from_hard_fault;
90 #if defined(STM32F4XX)
91 #define __PWR_CSR PWR->CSR
92 #define __PWR_CSR_BRE PWR_CSR_BRE
93 #define __PWR_CSR_BRR PWR_CSR_BRR
94 #elif defined(STM32F7XX)
95 #define __PWR_CSR PWR->CSR1
96 #define __PWR_CSR_BRE PWR_CSR1_BRE
97 #define __PWR_CSR_BRR PWR_CSR1_BRR
99 #error Hard fault recovery not supported
117 #if defined(USE_RTC_BACKUP)
136 #if USE_HARD_FAULT_RECOVERY
138 #if defined(STM32F4XX) || defined(STM32F7XX)
139 RCC->AHB1ENR |= RCC_AHB1ENR_BKPSRAMEN;
140 __PWR_CSR |= __PWR_CSR_BRE;
141 while ((__PWR_CSR & __PWR_CSR_BRR) == 0) ;
145 recovering_from_hard_fault =
false;
146 if (!(RCC->CSR & RCC_CSR_SFTRSTF)) {
149 }
else if ((RCC->CSR & RCC_CSR_SFTRSTF) && !hard_fault) {
154 recovering_from_hard_fault =
true;
158 RCC->CSR = RCC_CSR_RMVF;
179 #if defined(USE_RTC_BACKUP)
197 #if defined(ENERGY_SAVE_INPUTS)
199 palSetLineMode(input_line, PAL_MODE_INPUT);
202 #if defined(ENERGY_SAVE_LOWS)
204 palClearLine(input_low);
219 #if defined(STM32F4XX)
221 PWR->CR &= ~(PWR_CR_PDDS | PWR_CR_LPDS);
223 PWR->CR |= (PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF);
224 #elif defined(STM32F7XX)
226 PWR->CR1 &= ~(PWR_CR1_PDDS | PWR_CR1_LPDS);
228 PWR->CR1 |= (PWR_CR1_LPDS | PWR_CR1_CSBF);
229 #elif defined(STM32H7XX)
231 PWR->CR1 &= ~PWR_CR1_LPDS;
233 PWR->CR1 |= PWR_CR1_LPDS;
237 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
248 SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
251 #if defined(USE_RTC_BACKUP)
258 #if !defined(STM32F1)
259 if ((RCC->BDCR & RCC_BDCR_RTCEN) == 0) {
261 RCC->BDCR |= RCC_BDCR_RTCEN;
264 PWR->CR |= PWR_CR_DBP;
266 PWR->CR1 |= PWR_CR1_DBP;
272 dr[0] = (
val) & 0xFFFF;
274 #elif defined(STM32G4)
#define BOARD_GROUP_DECLFOREACH(line, group)
rtc_boot_magic
RTC backup register values.
@ RTC_BOOT_FAST
No timeout in bootloader.
@ RTC_BOOT_OFF
Normal boot.
@ RTC_BOOT_CANBL
CAN bootloader, ORd with 8 bit local node ID.
@ RTC_BOOT_HOLD
Hold in bootloader, do not boot application.
@ RTC_BOOT_FWOK
indicates FW ran for 30s
static void mcu_deep_sleep(void)
Put MCU into deep sleep mode.
void mcu_arch_init(void)
Initialize the specific archittecture functions.
#define ENERGY_SAVE_INPUTS
void mcu_reboot(enum reboot_state_t reboot_state)
Reboot the MCU.
reboot_state_t
The requested reboot states.
void mcu_energy_save(void)
Save energy for performing operations on shutdown Used for example to shutdown SD-card logging.
@ MCU_REBOOT_BOOTLOADER
Go to bootloader.
@ MCU_REBOOT_POWEROFF
Poweroff the device.
@ MCU_REBOOT_FAST
Fast reboot (skip bootloader)
Arch independent mcu ( Micro Controller Unit ) utilities.
static void __enable_irq(void)
static void __disable_irq(void)
unsigned int uint32_t
Typedef defining 32 bit unsigned int type.