Paparazzi UAS  v5.14.0_stable-0-g3f680d1
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mt9v117.c
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1 /*
2  * Copyright (C) 2016 Freek van Tienen <freek.v.tienen@gmail.com>
3  *
4  * This file is part of Paparazzi.
5  *
6  * Paparazzi is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2, or (at your option)
9  * any later version.
10  *
11  * Paparazzi is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with paparazzi; see the file COPYING. If not, see
18  * <http://www.gnu.org/licenses/>.
19  *
20  */
21 
27 #include "std.h"
28 #include "mt9v117.h"
29 #include "mt9v117_regs.h"
30 #include "boards/bebop.h"
31 
32 #include <stdio.h>
33 #include <unistd.h>
34 #include <fcntl.h>
35 #include <sys/ioctl.h>
36 #include <linux/i2c-dev.h>
37 #include <linux/videodev2.h>
38 #include <linux/v4l2-mediabus.h>
39 
40 /* Camera structure */
42  .output_size = {
43  .w = 240,
44  .h = 240
45  },
46  .sensor_size = {
47  .w = 320,
48  .h = 240,
49  },
50  .crop = {
51  .x = 40,
52  .y = 0,
53  .w = 240,
54  .h = 240
55  },
56  .dev_name = "/dev/video0",
57  .subdev_name = "/dev/v4l-subdev0",
58  .format = V4L2_PIX_FMT_UYVY,
59  .subdev_format = V4L2_MBUS_FMT_UYVY8_2X8,
60  .buf_cnt = 5,
61  .filters = 0,
62  .cv_listener = NULL,
63  .fps = MT9V117_TARGET_FPS,
64  .camera_intrinsics = {
65  .focal_x = MT9V117_FOCAL_X,
66  .focal_y = MT9V117_FOCAL_Y,
67  .center_x = MT9V117_CENTER_X,
68  .center_y = MT9V117_CENTER_Y,
69  .Dhane_k = MT9V117_DHANE_K
70  }
71 };
72 
73 
74 /* Patch lines */
75 //I2C_BUF_LEN must be higher then size of these patch lines
76 #define MT9V117_PATCH_LINE_NUM 13
77 static uint8_t patch_line1[] = {
78  0xf0, 0x00, 0x72, 0xcf, 0xff, 0x00, 0x3e, 0xd0, 0x92, 0x00,
79  0x71, 0xcf, 0xff, 0xff, 0xf2, 0x18, 0xb1, 0x10, 0x92, 0x05,
80  0xb1, 0x11, 0x92, 0x04, 0xb1, 0x12, 0x70, 0xcf, 0xff, 0x00,
81  0x30, 0xc0, 0x90, 0x00, 0x7f, 0xe0, 0xb1, 0x13, 0x70, 0xcf,
82  0xff, 0xff, 0xe7, 0x1c, 0x88, 0x36, 0x09, 0x0f, 0x00, 0xb3
83 };
84 
85 static uint8_t patch_line2[] = {
86  0xf0, 0x30, 0x69, 0x13, 0xe1, 0x80, 0xd8, 0x08, 0x20, 0xca,
87  0x03, 0x22, 0x71, 0xcf, 0xff, 0xff, 0xe5, 0x68, 0x91, 0x35,
88  0x22, 0x0a, 0x1f, 0x80, 0xff, 0xff, 0xf2, 0x18, 0x29, 0x05,
89  0x00, 0x3e, 0x12, 0x22, 0x11, 0x01, 0x21, 0x04, 0x0f, 0x81,
90  0x00, 0x00, 0xff, 0xf0, 0x21, 0x8c, 0xf0, 0x10, 0x1a, 0x22
91 };
92 
93 static uint8_t patch_line3[] = {
94  0xf0, 0x60, 0x10, 0x44, 0x12, 0x20, 0x11, 0x02, 0xf7, 0x87,
95  0x22, 0x4f, 0x03, 0x83, 0x1a, 0x20, 0x10, 0xc4, 0xf0, 0x09,
96  0xba, 0xae, 0x7b, 0x50, 0x1a, 0x20, 0x10, 0x84, 0x21, 0x45,
97  0x01, 0xc1, 0x1a, 0x22, 0x10, 0x44, 0x70, 0xcf, 0xff, 0x00,
98  0x3e, 0xd0, 0xb0, 0x60, 0xb0, 0x25, 0x7e, 0xe0, 0x78, 0xe0
99 };
100 
101 static uint8_t patch_line4[] = {
102  0xf0, 0x90, 0x71, 0xcf, 0xff, 0xff, 0xf2, 0x18, 0x91, 0x12,
103  0x72, 0xcf, 0xff, 0xff, 0xe7, 0x1c, 0x8a, 0x57, 0x20, 0x04,
104  0x0f, 0x80, 0x00, 0x00, 0xff, 0xf0, 0xe2, 0x80, 0x20, 0xc5,
105  0x01, 0x61, 0x20, 0xc5, 0x03, 0x22, 0xb1, 0x12, 0x71, 0xcf,
106  0xff, 0x00, 0x3e, 0xd0, 0xb1, 0x04, 0x7e, 0xe0, 0x78, 0xe0
107 };
108 
109 static uint8_t patch_line5[] = {
110  0xf0, 0xc0, 0x70, 0xcf, 0xff, 0xff, 0xe7, 0x1c, 0x88, 0x57,
111  0x71, 0xcf, 0xff, 0xff, 0xf2, 0x18, 0x91, 0x13, 0xea, 0x84,
112  0xb8, 0xa9, 0x78, 0x10, 0xf0, 0x03, 0xb8, 0x89, 0xb8, 0x8c,
113  0xb1, 0x13, 0x71, 0xcf, 0xff, 0x00, 0x30, 0xc0, 0xb1, 0x00,
114  0x7e, 0xe0, 0xc0, 0xf1, 0x09, 0x1e, 0x03, 0xc0, 0xc1, 0xa1
115 };
116 
117 static uint8_t patch_line6[] = {
118  0xf0, 0xf0, 0x75, 0x08, 0x76, 0x28, 0x77, 0x48, 0xc2, 0x40,
119  0xd8, 0x20, 0x71, 0xcf, 0x00, 0x03, 0x20, 0x67, 0xda, 0x02,
120  0x08, 0xae, 0x03, 0xa0, 0x73, 0xc9, 0x0e, 0x25, 0x13, 0xc0,
121  0x0b, 0x5e, 0x01, 0x60, 0xd8, 0x06, 0xff, 0xbc, 0x0c, 0xce,
122  0x01, 0x00, 0xd8, 0x00, 0xb8, 0x9e, 0x0e, 0x5a, 0x03, 0x20
123 };
124 
125 static uint8_t patch_line7[] = {
126  0xf1, 0x20, 0xd9, 0x01, 0xd8, 0x00, 0xb8, 0x9e, 0x0e, 0xb6,
127  0x03, 0x20, 0xd9, 0x01, 0x8d, 0x14, 0x08, 0x17, 0x01, 0x91,
128  0x8d, 0x16, 0xe8, 0x07, 0x0b, 0x36, 0x01, 0x60, 0xd8, 0x07,
129  0x0b, 0x52, 0x01, 0x60, 0xd8, 0x11, 0x8d, 0x14, 0xe0, 0x87,
130  0xd8, 0x00, 0x20, 0xca, 0x02, 0x62, 0x00, 0xc9, 0x03, 0xe0
131 };
132 
133 static uint8_t patch_line8[] = {
134  0xf1, 0x50, 0xc0, 0xa1, 0x78, 0xe0, 0xc0, 0xf1, 0x08, 0xb2,
135  0x03, 0xc0, 0x76, 0xcf, 0xff, 0xff, 0xe5, 0x40, 0x75, 0xcf,
136  0xff, 0xff, 0xe5, 0x68, 0x95, 0x17, 0x96, 0x40, 0x77, 0xcf,
137  0xff, 0xff, 0xe5, 0x42, 0x95, 0x38, 0x0a, 0x0d, 0x00, 0x01,
138  0x97, 0x40, 0x0a, 0x11, 0x00, 0x40, 0x0b, 0x0a, 0x01, 0x00
139 };
140 
141 static uint8_t patch_line9[] = {
142  0xf1, 0x80, 0x95, 0x17, 0xb6, 0x00, 0x95, 0x18, 0xb7, 0x00,
143  0x76, 0xcf, 0xff, 0xff, 0xe5, 0x44, 0x96, 0x20, 0x95, 0x15,
144  0x08, 0x13, 0x00, 0x40, 0x0e, 0x1e, 0x01, 0x20, 0xd9, 0x00,
145  0x95, 0x15, 0xb6, 0x00, 0xff, 0xa1, 0x75, 0xcf, 0xff, 0xff,
146  0xe7, 0x1c, 0x77, 0xcf, 0xff, 0xff, 0xe5, 0x46, 0x97, 0x40
147 };
148 
149 static uint8_t patch_line10[] = {
150  0xf1, 0xb0, 0x8d, 0x16, 0x76, 0xcf, 0xff, 0xff, 0xe5, 0x48,
151  0x8d, 0x37, 0x08, 0x0d, 0x00, 0x81, 0x96, 0x40, 0x09, 0x15,
152  0x00, 0x80, 0x0f, 0xd6, 0x01, 0x00, 0x8d, 0x16, 0xb7, 0x00,
153  0x8d, 0x17, 0xb6, 0x00, 0xff, 0xb0, 0xff, 0xbc, 0x00, 0x41,
154  0x03, 0xc0, 0xc0, 0xf1, 0x0d, 0x9e, 0x01, 0x00, 0xe8, 0x04
155 };
156 
157 static uint8_t patch_line11[] = {
158  0xf1, 0xe0, 0xff, 0x88, 0xf0, 0x0a, 0x0d, 0x6a, 0x01, 0x00,
159  0x0d, 0x8e, 0x01, 0x00, 0xe8, 0x7e, 0xff, 0x85, 0x0d, 0x72,
160  0x01, 0x00, 0xff, 0x8c, 0xff, 0xa7, 0xff, 0xb2, 0xd8, 0x00,
161  0x73, 0xcf, 0xff, 0xff, 0xf2, 0x40, 0x23, 0x15, 0x00, 0x01,
162  0x81, 0x41, 0xe0, 0x02, 0x81, 0x20, 0x08, 0xf7, 0x81, 0x34
163 };
164 
165 static uint8_t patch_line12[] = {
166  0xf2, 0x10, 0xa1, 0x40, 0xd8, 0x00, 0xc0, 0xd1, 0x7e, 0xe0,
167  0x53, 0x51, 0x30, 0x34, 0x20, 0x6f, 0x6e, 0x5f, 0x73, 0x74,
168  0x61, 0x72, 0x74, 0x5f, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d,
169  0x69, 0x6e, 0x67, 0x20, 0x25, 0x64, 0x20, 0x25, 0x64, 0x0a,
170  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
171 };
172 
173 static uint8_t patch_line13[] = {
174  0xf2, 0x40, 0xff, 0xff, 0xe8, 0x28, 0xff, 0xff, 0xf0, 0xe8,
175  0xff, 0xff, 0xe8, 0x08, 0xff, 0xff, 0xf1, 0x54
176 };
177 
178 /* Patch lines structure */
182 };
183 
185  {patch_line1, sizeof(patch_line1)},
186  {patch_line2, sizeof(patch_line2)},
187  {patch_line3, sizeof(patch_line3)},
188  {patch_line4, sizeof(patch_line4)},
189  {patch_line5, sizeof(patch_line5)},
190  {patch_line6, sizeof(patch_line6)},
191  {patch_line7, sizeof(patch_line7)},
192  {patch_line8, sizeof(patch_line8)},
193  {patch_line9, sizeof(patch_line9)},
194  {patch_line10, sizeof(patch_line10)},
195  {patch_line11, sizeof(patch_line11)},
196  {patch_line12, sizeof(patch_line12)},
197  {patch_line13, sizeof(patch_line13)}
198 };
199 
203 static void write_reg(struct mt9v117_t *mt, uint16_t addr, uint32_t val, uint16_t len)
204 {
205  mt->i2c_trans.buf[0] = addr >> 8;
206  mt->i2c_trans.buf[1] = addr & 0xFF;
207 
208  // Fix sigdness based on length
209  if (len == 1) {
210  mt->i2c_trans.buf[2] = val & 0xFF;
211  } else if (len == 2) {
212  mt->i2c_trans.buf[2] = (val >> 8) & 0xFF;
213  mt->i2c_trans.buf[3] = val & 0xFF;
214  } else if (len == 4) {
215  mt->i2c_trans.buf[2] = (val >> 24) & 0xFF;
216  mt->i2c_trans.buf[3] = (val >> 16) & 0xFF;
217  mt->i2c_trans.buf[4] = (val >> 8) & 0xFF;
218  mt->i2c_trans.buf[5] = val & 0xFF;
219  } else {
220  printf("[MT9V117] write_reg with incorrect length %d\r\n", len);
221  }
222 
223  // Transmit the buffer
225 }
226 
230 static uint32_t read_reg(struct mt9v117_t *mt, uint16_t addr, uint16_t len)
231 {
232  uint32_t ret = 0;
233  mt->i2c_trans.buf[0] = addr >> 8;
234  mt->i2c_trans.buf[1] = addr & 0xFF;
235 
236  // Transmit the buffer and receive back
238 
239  /* Fix sigdness */
240  for (uint8_t i = 0; i < len; i++) {
241  ret |= mt->i2c_trans.buf[len - i - 1] << (8 * i);
242  }
243  return ret;
244 }
245 
246 /* Write a byte to a var */
248 {
249  uint16_t addr = 0x8000 | (var << 10) | offset;
250  write_reg(mt, addr, val, len);
251 }
252 
253 /* Read a byte from a var */
255 {
256  uint16_t addr = 0x8000 | (var << 10) | offset;
257  return read_reg(mt, addr, len);
258 }
259 
260 static inline void mt9v117_write_patch(struct mt9v117_t *mt)
261 {
262  /* Errata item 2 */
263  write_reg(mt, 0x301a, 0x10d0, 2);
264  write_reg(mt, 0x31c0, 0x1404, 2);
265  write_reg(mt, 0x3ed8, 0x879c, 2);
266  write_reg(mt, 0x3042, 0x20e1, 2);
267  write_reg(mt, 0x30d4, 0x8020, 2);
268  write_reg(mt, 0x30c0, 0x0026, 2);
269  write_reg(mt, 0x301a, 0x10d4, 2);
270 
271  /* Errata item 6 */
272  write_var(mt, MT9V117_AE_TRACK_VAR, 0x0002, 0x00d3, 2);
273  write_var(mt, MT9V117_CAM_CTRL_VAR, 0x0078, 0x00a0, 2);
274  write_var(mt, MT9V117_CAM_CTRL_VAR, 0x0076, 0x0140, 2);
275 
276  /* Errata item 8 */
277  write_var(mt, MT9V117_LOW_LIGHT_VAR, 0x0004, 0x00fc, 2);
278  write_var(mt, MT9V117_LOW_LIGHT_VAR, 0x0038, 0x007f, 2);
279  write_var(mt, MT9V117_LOW_LIGHT_VAR, 0x003a, 0x007f, 2);
280  write_var(mt, MT9V117_LOW_LIGHT_VAR, 0x003c, 0x007f, 2);
281  write_var(mt, MT9V117_LOW_LIGHT_VAR, 0x0004, 0x00f4, 2);
282 
283  /* Patch 0403; Critical; Sensor optimization */
284  write_reg(mt, MT9V117_ACCESS_CTL_STAT, 0x0001, 2);
286 
287  /* Write patch */
288  for (uint8_t i = 0; i < MT9V117_PATCH_LINE_NUM; ++i) {
289  // Copy buffer
290  for (uint8_t j = 0; j < mt9v117_patch_lines[i].len; ++j) {
291  mt->i2c_trans.buf[j] = mt9v117_patch_lines[i].data[j];
292  }
293 
294  // Transmit the buffer
295  i2c_blocking_transmit(mt->i2c_periph, &mt->i2c_trans, mt->i2c_trans.slave_addr, mt9v117_patch_lines[i].len);
296  }
297 
303 
304  /* Wait for command OK */
305  for (uint8_t retries = 100; retries > 0; retries--) {
306  /* Wait 10ms */
307  usleep(10000);
308 
309  /* Check the command */
310  uint16_t cmd = read_reg(mt, MT9V117_COMMAND, 2);
311  if ((cmd & MT9V117_COMMAND_APPLY_PATCH) == 0) {
312  if ((cmd & MT9V117_COMMAND_OK) == 0) {
313  printf("[MT9V117] Applying patch failed (No OK)\r\n");
314  }
315  return;
316  }
317  }
318 
319  printf("[MT9V117] Applying patch failed after 10 retries\r\n");
320 }
321 
322 /* Configure the sensor */
323 static inline void mt9v117_config(struct mt9v117_t *mt)
324 {
335 
338 
341 
342  /* Set gain metric for 111.2 fps
343  * The final fps depends on the input clock
344  * (89.2fps on bebop) so a modification may be needed here */
347 
348  /* set crop window */
353 
354  /* Enable auto-stats mode */
362 }
363 
368 void mt9v117_init(struct mt9v117_t *mt)
369 {
370  /* bytes written to gpios/pwm */
371  int wc = 0;
372  /* Reset the device */
373  int gpio129 = open("/sys/class/gpio/gpio129/value", O_WRONLY | O_CREAT | O_TRUNC, 0666);
374  wc += write(gpio129, "0", 1);
375  wc += write(gpio129, "1", 1);
376  close(gpio129);
377 
378  if (wc != 2) {
379  printf("[MT9V117] Couldn't write to GPIO 129\n");
380  }
381 
382  /* Start PWM 9 (Which probably is the clock of the MT9V117) */
383  //#define BEBOP_CAMV_PWM_FREQ 43333333
384  int pwm9 = open("/sys/class/pwm/pwm_9/run", O_WRONLY | O_CREAT | O_TRUNC, 0666);
385  wc = 0;
386  wc += write(pwm9, "0", 1);
387  wc += write(pwm9, "1", 1);
388  close(pwm9);
389 
390  if (wc != 2) {
391  printf("[MT9V117] Couldn't write to PWM\n");
392  }
393 
394  //TODO: Make PWM and GPIO generic
395 
396  /* Wait 50ms */
397  usleep(50000);
398 
399  /* Setup i2c transaction */
401 
402  /* See if the device is there and correct */
403  uint16_t chip_id = read_reg(mt, MT9V117_CHIP_ID, 2);
404  if (chip_id != MT9V117_CHIP_ID_RESP) {
405  printf("[MT9V117] Didn't get correct response from CHIP_ID (expected: 0x%04X, got: 0x%04X)\r\n", MT9V117_CHIP_ID_RESP,
406  chip_id);
407  return;
408  }
409 
410  /* Reset the device with software */
413 
414  /* Wait 50ms */
415  usleep(50000);
416 
417  /* Apply MT9V117 software patch */
419 
420  /* Set basic settings */
423 
424  /* Set pixclk pad slew to 6 and data out pad slew to 1 */
425  write_reg(mt, MT9V117_PAD_SLEW, read_reg(mt, MT9V117_PAD_SLEW, 2) | 0x0600 | 0x0001, 2);
426 
427  /* Configure the MT9V117 sensor */
428  mt9v117_config(mt);
429 
430  /* Enable ITU656 */
434 
435  /* Apply the configuration */
438 
439  /* Wait for command OK */
440  for (uint8_t retries = 100; retries > 0; retries--) {
441  /* Wait 10ms */
442  usleep(10000);
443 
444  /* Check the command */
445  uint16_t cmd = read_reg(mt, MT9V117_COMMAND, 2);
446  if ((cmd & MT9V117_COMMAND_SET_STATE) == 0) {
447  if ((cmd & MT9V117_COMMAND_OK) == 0) {
448  printf("[MT9V117] Switching config failed (No OK)\r\n");
449  }
450 
451  // Successfully configured!
452  //printf("[MT9V117] Switching config OK\r\n");
453  return;
454  }
455  }
456 
457  printf("[MT9V117] Could not switch to new config\r\n");
458 }
struct video_config_t bottom_camera
Definition: mt9v117.c:41
#define MT9V117_CAM_SENSOR_CFG_X_ADDR_END_OFFSET
Definition: mt9v117_regs.h:37
unsigned short uint16_t
Definition: types.h:16
static uint8_t patch_line11[]
Definition: mt9v117.c:157
static uint8_t patch_line7[]
Definition: mt9v117.c:125
#define MT9V117_CAM_SENSOR_CFG_X_ADDR_START_OFFSET
Definition: mt9v117_regs.h:35
#define MT9V117_CAM_STAT_AE_INITIAL_WINDOW_XEND_OFFSET
Definition: mt9v117_regs.h:79
#define MT9V117_CAM_STAT_AE_INITIAL_WINDOW_YEND_OFFSET
Definition: mt9v117_regs.h:80
#define MT9V117_AE_RULE_ALGO_OFFSET
Definition: mt9v117_regs.h:26
#define MT9V117_LOGICAL_ADDRESS_ACCESS
Definition: mt9v117_regs.h:20
#define MT9V117_ADDRESS
The i2c address of the chip.
Definition: mt9v117_regs.h:4
#define MT9V117_CAM_LL_START_GAIN_METRIC_OFFSET
Definition: mt9v117_regs.h:81
volatile uint8_t buf[I2C_BUF_LEN]
Transaction buffer With I2C_BUF_LEN number of bytes.
Definition: i2c.h:122
#define MT9V117_TARGET_FPS
Definition: mt9v117.h:34
#define MT9V117_CAM_OUTPUT_FORMAT_BT656_ENABLE
Definition: mt9v117_regs.h:69
#define MT9V117_CAM_STAT_AE_INITIAL_WINDOW_XSTART_OFFSET
Definition: mt9v117_regs.h:77
#define MT9V117_CAM_LL_STOP_GAIN_METRIC_OFFSET
Definition: mt9v117_regs.h:82
struct img_size_t output_size
Output image size.
Definition: video_device.h:56
#define MT9V117_AWB_VAR
Definition: mt9v117_regs.h:30
static void mt9v117_write_patch(struct mt9v117_t *mt)
Definition: mt9v117.c:260
#define MT9V117_FOCAL_Y
Definition: mt9v117.h:42
Initialization and configuration of the MT9V117 CMOS Chip.
#define MT9V117_SYSMGR_NEXT_STATE_OFFSET
Definition: mt9v117_regs.h:84
#define MT9V117_COMMAND
Definition: mt9v117_regs.h:12
#define MT9V117_COMMAND_SET_STATE
Definition: mt9v117_regs.h:16
#define MT9V117_CAM_STAT_AWB_HG_WINDOW_XEND_OFFSET
Definition: mt9v117_regs.h:75
#define MT9V117_CAM_OUTPUT_FORMAT_OFFSET
Definition: mt9v117_regs.h:60
#define MT9V117_CAM_AET_SKIP_FRAMES
Definition: mt9v117_regs.h:22
#define MT9V117_PHYSICAL_ADDRESS_ACCESS
Definition: mt9v117_regs.h:19
#define MT9V117_PATCHLDR_LOADER_ADDRESS_OFFSET
Definition: mt9v117_regs.h:94
#define MT9V117_COMMAND_OK
Definition: mt9v117_regs.h:13
uint16_t len
Definition: mt9v117.c:181
static uint32_t read_reg(struct mt9v117_t *mt, uint16_t addr, uint16_t len)
Read multiple bytes from a register.
Definition: mt9v117.c:230
#define MT9V117_COMMAND_APPLY_PATCH
Definition: mt9v117_regs.h:17
static const struct mt9v117_patch_t mt9v117_patch_lines[MT9V117_PATCH_LINE_NUM]
Definition: mt9v117.c:184
static uint8_t patch_line3[]
Definition: mt9v117.c:93
#define MT9V117_CHIP_ID_RESP
Should be the response to CHIP_ID.
Definition: mt9v117_regs.h:8
#define MT9V117_CAM_SENSOR_CFG_Y_ADDR_END_OFFSET
Definition: mt9v117_regs.h:36
static void write_var(struct mt9v117_t *mt, uint16_t var, uint16_t offset, uint32_t val, uint16_t len)
Definition: mt9v117.c:247
#define MT9V117_SYS_STATE_ENTER_CONFIG_CHANGE
Definition: mt9v117_regs.h:85
static uint8_t patch_line1[]
Definition: mt9v117.c:77
static void write_reg(struct mt9v117_t *mt, uint16_t addr, uint32_t val, uint16_t len)
Write multiple bytes to a single register.
Definition: mt9v117.c:203
#define MT9V117_CHIP_ID
Request the chip ID.
Definition: mt9v117_regs.h:7
#define MT9V117_AE_RULE_ALGO_AVERAGE
Definition: mt9v117_regs.h:27
bool i2c_blocking_transceive(struct i2c_periph *p, struct i2c_transaction *t, uint8_t s_addr, uint8_t len_w, uint16_t len_r)
Submit a write/read transaction and wait for it to complete.
Definition: i2c.c:337
#define MT9V117_ACCESS_CTL_STAT
Definition: mt9v117_regs.h:18
static uint8_t patch_line9[]
Definition: mt9v117.c:141
#define MT9V117_LOW_LIGHT_VAR
Definition: mt9v117_regs.h:32
#define MT9V117_AE_RULE_VAR
Definition: mt9v117_regs.h:25
static const float offset[]
#define MT9V117_CAM_SENSOR_CFG_Y_ADDR_START_OFFSET
Definition: mt9v117_regs.h:34
transaction set to done by user level
Definition: i2c.h:59
#define MT9V117_PATCHLDR_FIRMWARE_ID_OFFSET
Definition: mt9v117_regs.h:96
uint16_t val[TCOUPLE_NB]
#define MT9V117_CAM_SENSOR_CONTROL_Y_SKIP_EN
Definition: mt9v117_regs.h:47
#define MT9V117_CAM_OUTPUT_WIDTH_OFFSET
Definition: mt9v117_regs.h:58
#define MT9V117_PATCHLDR_VAR
Definition: mt9v117_regs.h:93
unsigned long uint32_t
Definition: types.h:18
#define MT9V117_SYSMGR_VAR
Definition: mt9v117_regs.h:83
#define MT9V117_RESET_MISC_CTRL
Definition: mt9v117_regs.h:9
#define MT9V117_DHANE_K
Definition: mt9v117.h:51
static uint8_t patch_line6[]
Definition: mt9v117.c:117
#define MT9V117_CAM_CROP_WINDOW_XOFFSET_OFFSET
Definition: mt9v117_regs.h:53
static uint8_t patch_line8[]
Definition: mt9v117.c:133
#define MT9V117_PAD_SLEW
Definition: mt9v117_regs.h:11
#define MT9V117_CAM_OUTPUT_HEIGHT_OFFSET
Definition: mt9v117_regs.h:59
void mt9v117_init(struct mt9v117_t *mt)
Initialisation of the Aptina MT9V117 CMOS sensor (1/6 inch VGA, bottom camera)
Definition: mt9v117.c:368
#define MT9V117_CAM_CROP_WINDOW_WIDTH_OFFSET
Definition: mt9v117_regs.h:55
enum I2CTransactionStatus status
Transaction status.
Definition: i2c.h:126
static uint8_t patch_line4[]
Definition: mt9v117.c:101
#define MT9V117_PATCH_LINE_NUM
Definition: mt9v117.c:76
#define MT9V117_CAM_STAT_AE_INITIAL_WINDOW_YSTART_OFFSET
Definition: mt9v117_regs.h:78
#define MT9V117_CAM_CROP_WINDOW_YOFFSET_OFFSET
Definition: mt9v117_regs.h:54
static uint8_t patch_line12[]
Definition: mt9v117.c:165
uint8_t slave_addr
Slave address.
Definition: i2c.h:104
#define MT9V117_FOCAL_X
Definition: mt9v117.h:39
static uint8_t patch_line2[]
Definition: mt9v117.c:85
#define MT9V117_CAM_SENSOR_CFG_CPIPE_LAST_ROW_OFFSET
Definition: mt9v117_regs.h:39
unsigned char uint8_t
Definition: types.h:14
static uint8_t patch_line13[]
Definition: mt9v117.c:173
static uint8_t patch_line10[]
Definition: mt9v117.c:149
#define MT9V117_CAM_CROP_MODE_OFFSET
Definition: mt9v117_regs.h:57
#define MT9V117_CENTER_Y
Definition: mt9v117.h:48
static uint8_t patch_line5[]
Definition: mt9v117.c:109
#define MT9V117_AE_TRACK_JUMP_DIVISOR
Definition: mt9v117_regs.h:21
#define MT9V117_CAM_SENSOR_CFG_MAX_FDZONE_60_OFFSET
Definition: mt9v117_regs.h:42
#define MT9V117_AE_TRACK_VAR
Definition: mt9v117_regs.h:29
#define MT9V117_CAM_SENSOR_CONTROL_READ_MODE_OFFSET
Definition: mt9v117_regs.h:46
#define MT9V117_CAM_SENSOR_CFG_FRAME_LENGTH_LINES_OFFSET
Definition: mt9v117_regs.h:38
#define MT9V117_CAM_CROP_WINDOW_HEIGHT_OFFSET
Definition: mt9v117_regs.h:56
#define MT9V117_CAM_STAT_AWB_HG_WINDOW_YEND_OFFSET
Definition: mt9v117_regs.h:76
#define MT9V117_CAM_SENSOR_CFG_TARGET_FDZONE_60_OFFSET
Definition: mt9v117_regs.h:44
struct i2c_periph * i2c_periph
I2C peripheral used to communicate over.
Definition: mt9v117.h:56
uint16_t w
The width.
Definition: image.h:75
static uint32_t read_var(struct mt9v117_t *mt, uint16_t var, uint16_t offset, uint16_t len)
Definition: mt9v117.c:254
uint8_t * data
Definition: mt9v117.c:180
#define MT9V117_AWB_PIXEL_THRESHOLD_COUNT_OFFSET
Definition: mt9v117_regs.h:31
static void mt9v117_config(struct mt9v117_t *mt)
Definition: mt9v117.c:323
#define MT9V117_RESET_SOC_I2C
Definition: mt9v117_regs.h:10
#define MT9V117_CAM_CTRL_VAR
Definition: mt9v117_regs.h:33
V4L2 device settings.
Definition: video_device.h:55
bool i2c_blocking_transmit(struct i2c_periph *p, struct i2c_transaction *t, uint8_t s_addr, uint8_t len)
Submit a write only transaction and wait for it to complete.
Definition: i2c.c:295
#define MT9V117_CENTER_X
Definition: mt9v117.h:45
#define MT9V117_PATCHLDR_PATCH_ID_OFFSET
Definition: mt9v117_regs.h:95
struct i2c_transaction i2c_trans
I2C transaction for comminication with CMOS chip.
Definition: mt9v117.h:57