Paparazzi UAS
v5.12_stable-4-g9b43e9b
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board.h
Go to the documentation of this file.
1
/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for STMicroelectronics STM32F4-Discovery board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_ST_APOGEE
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#define BOARD_NAME "AB/GRZ STM32F4 Apogee 1.0"
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/*
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* Board oscillators-related settings.
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* NOTE: LSE fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 32768
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#endif
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 16000000
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#endif
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 300
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/*
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* MCU type as defined in the ST header file stm32f4xx.h.
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*/
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#define STM32F407xx
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//#define STM32F40_41xxx
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//#define STM32F4XX
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/*
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* IO pins assignments.
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*/
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#define GPIOA_UART4_TX 0 // GPS TX
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#define GPIOA_UART4_RX 1 // GPS RX
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#define GPIOA_PWM2_CH3 2 // SERVO 1
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#define GPIOA_UART2_RX 3 // SBUS RX
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#define GPIOA_ADC1_IN4 4 // BAT ADC
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#define GPIOA_SPI1_SCK 5 // SPI SCK
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#define GPIOA_SPI1_MISO 6 // SPI MISO
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#define GPIOA_SPI1_MOSI 7 // SPI MOSI
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#define GPIOA_ICU1_CH1 8 // PPM_IN
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#define GPIOA_OTG_FS_VBUS 9 // VBUS
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#define GPIOA_USART1_RX 10 // MODEM RX
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#define GPIOA_OTG_FS_DM 11 // USB
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#define GPIOA_OTG_FS_DP 12 // USB
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#define GPIOA_SWDIO 13 // SERIAL WIRE DEBUG
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#define GPIOA_SWCLK 14 // SERIAL WIRE DEBUG
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#define GPIOA_PWM2_CH1 15 // SERVO 5
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#define GPIOB_PWM3_CH3 0 // SERVO 0
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#define GPIOB_AUX1 1 // AUX1 / SERVO6 (TIM3_CHANNEL_4 when pwm)
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#define GPIOB_BOOT1 2 //
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#define GPIOB_PWM2_CH2 3 // SERVO 4
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#define GPIOB_PWM3_CH1 4 // SERVO 3
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#define GPIOB_PWM3_CH2 5 // SERVO 2
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#define GPIOB_USART1_TX 6 // MODEM TX
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#define GPIOB_I2C1_SDA 7 // I2C1 SDA
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#define GPIOB_I2C1_SCL 8 // I2C1 SCL
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#define GPIOB_SPI1_CS 9 // SPI CS
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#define GPIOB_I2C2_SCL 10 // I2C2 SCL
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#define GPIOB_I2C2_SDA 11 // I2C2 SDA
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#define GPIOB_POWER_SWITCH 12 // POWER SWITCH
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#define GPIOB_RX2_POL 13 // UART2 POLARITY
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#define GPIOB_SDIO_DETECT 14 // SDIO DETECT
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#define GPIOB_AUX4 15 // AUX4, only GPIO capable
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#define GPIOC_LED1 0 // LED 1
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#define GPIOC_LED3 1 // LED 3
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#define GPIOC_PIN2 2 // NOT YET USED, ADC Capable
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#define GPIOC_LED4 3 // LED 4
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#define GPIOC_AUX3 4 // AUX3 ADC Capable
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#define GPIOC_AUX2 5 // AUX2 ADC Capable
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#define GPIOC_USART6_TX 6 // UART6 TX
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#define GPIOC_USART6_RX 7 // UART6 RX
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#define GPIOC_SDIO_D0 8 // SDIO
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#define GPIOC_SDIO_D1 9 // SDIO
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#define GPIOC_SDIO_D2 10 // SDIO
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#define GPIOC_SDIO_D3 11 // SDIO
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#define GPIOC_SDIO_CK 12 // SDIO
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#define GPIOC_LED2 13 // LED 2
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#define GPIOC_OSC32_IN 14
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#define GPIOC_OSC32_OUT 15
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#define GPIOD_SDIO_CMD 2 // SDIO
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#define GPIOH_OSC_IN 0
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#define GPIOH_OSC_OUT 1
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#define GPIOH_PIN2 2
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#define GPIOH_PIN3 3
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#define GPIOH_PIN4 4
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#define GPIOH_PIN5 5
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#define GPIOH_PIN6 6
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#define GPIOH_PIN7 7
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#define GPIOH_PIN8 8
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#define GPIOH_PIN9 9
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#define GPIOH_PIN10 10
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#define GPIOH_PIN11 11
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#define GPIOH_PIN12 12
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#define GPIOH_PIN13 13
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#define GPIOH_PIN14 14
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#define GPIOH_PIN15 15
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
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#define PIN_ODR_LOW(n) (0U << (n))
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#define PIN_ODR_HIGH(n) (1U << (n))
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
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#define PIN_OSPEED_2M(n) (0U << ((n) * 2U))
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#define PIN_OSPEED_25M(n) (1U << ((n) * 2U))
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#define PIN_OSPEED_50M(n) (2U << ((n) * 2U))
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#define PIN_OSPEED_100M(n) (3U << ((n) * 2U))
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
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#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
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/*
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* GPIOA setup:
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*
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*/
156
#define VAL_GPIOA_MODER (PIN_MODE_ALTERNATE(GPIOA_UART4_TX) | \
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PIN_MODE_ALTERNATE(GPIOA_UART4_RX) | \
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PIN_MODE_INPUT(GPIOA_PWM2_CH3) | \
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PIN_MODE_ALTERNATE(GPIOA_UART2_RX) | \
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PIN_MODE_ANALOG(GPIOA_ADC1_IN4) | \
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PIN_MODE_ALTERNATE(GPIOA_SPI1_SCK) | \
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PIN_MODE_ALTERNATE(GPIOA_SPI1_MISO) | \
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PIN_MODE_ALTERNATE(GPIOA_SPI1_MOSI) | \
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PIN_MODE_ALTERNATE(GPIOA_ICU1_CH1) | \
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PIN_MODE_INPUT(GPIOA_OTG_FS_VBUS) | \
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PIN_MODE_ALTERNATE(GPIOA_USART1_RX) | \
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PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
168
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
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PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
170
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
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PIN_MODE_INPUT(GPIOA_PWM2_CH1))
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173
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_UART4_TX) | \
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PIN_OTYPE_PUSHPULL(GPIOA_UART4_RX) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PWM2_CH3) | \
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PIN_OTYPE_PUSHPULL(GPIOA_UART2_RX) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ADC1_IN4) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SPI1_SCK) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SPI1_MISO) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SPI1_MOSI) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ICU1_CH1) | \
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PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_VBUS) | \
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PIN_OTYPE_PUSHPULL(GPIOA_USART1_RX) | \
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PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \
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PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PWM2_CH1))
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#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_100M(GPIOA_UART4_TX) | \
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PIN_OSPEED_100M(GPIOA_UART4_RX) | \
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PIN_OSPEED_100M(GPIOA_PWM2_CH3) | \
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PIN_OSPEED_100M(GPIOA_UART2_RX) | \
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PIN_OSPEED_100M(GPIOA_ADC1_IN4) | \
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PIN_OSPEED_100M(GPIOA_SPI1_SCK) | \
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PIN_OSPEED_100M(GPIOA_SPI1_MISO) | \
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PIN_OSPEED_100M(GPIOA_SPI1_MOSI) | \
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PIN_OSPEED_100M(GPIOA_ICU1_CH1) | \
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PIN_OSPEED_100M(GPIOA_OTG_FS_VBUS) | \
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PIN_OSPEED_100M(GPIOA_USART1_RX) | \
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PIN_OSPEED_100M(GPIOA_OTG_FS_DM) | \
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PIN_OSPEED_100M(GPIOA_OTG_FS_DP) | \
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PIN_OSPEED_100M(GPIOA_SWDIO) | \
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PIN_OSPEED_100M(GPIOA_SWCLK) | \
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PIN_OSPEED_100M(GPIOA_PWM2_CH1))
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#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_UART4_TX) | \
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PIN_PUPDR_FLOATING(GPIOA_UART4_RX) | \
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PIN_PUPDR_FLOATING(GPIOA_PWM2_CH3) | \
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PIN_PUPDR_FLOATING(GPIOA_UART2_RX) | \
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PIN_PUPDR_FLOATING(GPIOA_ADC1_IN4) | \
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PIN_PUPDR_FLOATING(GPIOA_SPI1_SCK) | \
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PIN_PUPDR_FLOATING(GPIOA_SPI1_MISO) | \
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PIN_PUPDR_FLOATING(GPIOA_SPI1_MOSI) | \
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PIN_PUPDR_FLOATING(GPIOA_ICU1_CH1) | \
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PIN_PUPDR_PULLDOWN(GPIOA_OTG_FS_VBUS) | \
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PIN_PUPDR_FLOATING(GPIOA_USART1_RX) | \
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PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
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PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
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PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
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PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
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PIN_PUPDR_FLOATING(GPIOA_PWM2_CH1))
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#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_UART4_TX) | \
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PIN_ODR_HIGH(GPIOA_UART4_RX) | \
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PIN_ODR_HIGH(GPIOA_PWM2_CH3) | \
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PIN_ODR_HIGH(GPIOA_UART2_RX) | \
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PIN_ODR_HIGH(GPIOA_ADC1_IN4) | \
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PIN_ODR_HIGH(GPIOA_SPI1_SCK) | \
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PIN_ODR_HIGH(GPIOA_SPI1_MISO) | \
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PIN_ODR_HIGH(GPIOA_SPI1_MOSI) | \
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PIN_ODR_HIGH(GPIOA_ICU1_CH1) | \
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PIN_ODR_HIGH(GPIOA_OTG_FS_VBUS) | \
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PIN_ODR_HIGH(GPIOA_USART1_RX) | \
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PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
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PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
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PIN_ODR_HIGH(GPIOA_SWDIO) | \
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PIN_ODR_HIGH(GPIOA_SWCLK) | \
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PIN_ODR_HIGH(GPIOA_PWM2_CH1))
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#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_UART4_TX, 8) | \
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PIN_AFIO_AF(GPIOA_UART4_RX, 8) | \
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PIN_AFIO_AF(GPIOA_PWM2_CH3, 0) | \
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PIN_AFIO_AF(GPIOA_UART2_RX, 7) | \
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PIN_AFIO_AF(GPIOA_ADC1_IN4, 0) | \
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PIN_AFIO_AF(GPIOA_SPI1_SCK, 5) | \
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PIN_AFIO_AF(GPIOA_SPI1_MISO, 5) | \
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PIN_AFIO_AF(GPIOA_SPI1_MOSI, 5))
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#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ICU1_CH1, 1) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_VBUS, 0) | \
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PIN_AFIO_AF(GPIOA_USART1_RX, 7) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
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PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
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PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
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PIN_AFIO_AF(GPIOA_PWM2_CH1, 0))
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/*
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* GPIOB setup:
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*
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*/
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#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PWM3_CH3) | \
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PIN_MODE_INPUT(GPIOB_AUX1) | \
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PIN_MODE_INPUT(GPIOB_BOOT1) | \
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PIN_MODE_INPUT(GPIOB_PWM2_CH2) | \
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PIN_MODE_INPUT(GPIOB_PWM3_CH1) | \
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PIN_MODE_INPUT(GPIOB_PWM3_CH2) | \
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PIN_MODE_ALTERNATE(GPIOB_USART1_TX) | \
270
PIN_MODE_ALTERNATE(GPIOB_I2C1_SDA) | \
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PIN_MODE_ALTERNATE(GPIOB_I2C1_SCL) | \
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PIN_MODE_OUTPUT(GPIOB_SPI1_CS) | \
273
PIN_MODE_ALTERNATE(GPIOB_I2C2_SCL) | \
274
PIN_MODE_ALTERNATE(GPIOB_I2C2_SDA) | \
275
PIN_MODE_OUTPUT(GPIOB_POWER_SWITCH) | \
276
PIN_MODE_OUTPUT(GPIOB_RX2_POL) | \
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PIN_MODE_INPUT(GPIOB_SDIO_DETECT) | \
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PIN_MODE_INPUT(GPIOB_AUX4))
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#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PWM3_CH3) | \
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PIN_OTYPE_PUSHPULL(GPIOB_AUX1) | \
282
PIN_OTYPE_OPENDRAIN(GPIOB_BOOT1) | \
283
PIN_OTYPE_PUSHPULL(GPIOB_PWM2_CH2) | \
284
PIN_OTYPE_PUSHPULL(GPIOB_PWM3_CH1) | \
285
PIN_OTYPE_PUSHPULL(GPIOB_PWM3_CH2) | \
286
PIN_OTYPE_PUSHPULL(GPIOB_USART1_TX) | \
287
PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SDA) | \
288
PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SCL) | \
289
PIN_OTYPE_PUSHPULL(GPIOB_SPI1_CS) | \
290
PIN_OTYPE_OPENDRAIN(GPIOB_I2C2_SCL) | \
291
PIN_OTYPE_OPENDRAIN(GPIOB_I2C2_SDA) | \
292
PIN_OTYPE_PUSHPULL(GPIOB_POWER_SWITCH)| \
293
PIN_OTYPE_PUSHPULL(GPIOB_RX2_POL) | \
294
PIN_OTYPE_PUSHPULL(GPIOB_SDIO_DETECT) | \
295
PIN_OTYPE_PUSHPULL(GPIOB_AUX4))
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297
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_100M(GPIOB_PWM3_CH3) | \
298
PIN_OSPEED_100M(GPIOB_AUX1) | \
299
PIN_OSPEED_100M(GPIOB_BOOT1) | \
300
PIN_OSPEED_100M(GPIOB_PWM2_CH2) | \
301
PIN_OSPEED_100M(GPIOB_PWM3_CH1) | \
302
PIN_OSPEED_100M(GPIOB_PWM3_CH2) | \
303
PIN_OSPEED_100M(GPIOB_USART1_TX) | \
304
PIN_OSPEED_100M(GPIOB_I2C1_SDA) | \
305
PIN_OSPEED_100M(GPIOB_I2C1_SCL) | \
306
PIN_OSPEED_100M(GPIOB_SPI1_CS) | \
307
PIN_OSPEED_100M(GPIOB_I2C2_SCL) | \
308
PIN_OSPEED_100M(GPIOB_I2C2_SDA) | \
309
PIN_OSPEED_100M(GPIOB_POWER_SWITCH) | \
310
PIN_OSPEED_100M(GPIOB_RX2_POL) | \
311
PIN_OSPEED_100M(GPIOB_SDIO_DETECT) | \
312
PIN_OSPEED_100M(GPIOB_AUX4))
313
314
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_PWM3_CH3) | \
315
PIN_PUPDR_FLOATING(GPIOB_AUX1) | \
316
PIN_PUPDR_FLOATING(GPIOB_BOOT1) | \
317
PIN_PUPDR_FLOATING(GPIOB_PWM2_CH2) | \
318
PIN_PUPDR_FLOATING(GPIOB_PWM3_CH1) | \
319
PIN_PUPDR_FLOATING(GPIOB_PWM3_CH2) | \
320
PIN_PUPDR_FLOATING(GPIOB_USART1_TX) | \
321
PIN_PUPDR_PULLUP(GPIOB_I2C1_SDA) | \
322
PIN_PUPDR_PULLUP(GPIOB_I2C1_SCL) | \
323
PIN_PUPDR_FLOATING(GPIOB_SPI1_CS) | \
324
PIN_PUPDR_PULLUP(GPIOB_I2C2_SCL) | \
325
PIN_PUPDR_PULLUP(GPIOB_I2C2_SDA) | \
326
PIN_PUPDR_PULLUP(GPIOB_POWER_SWITCH) | \
327
PIN_PUPDR_PULLUP(GPIOB_RX2_POL) | \
328
PIN_PUPDR_PULLUP(GPIOB_SDIO_DETECT) | \
329
PIN_PUPDR_FLOATING(GPIOB_AUX4))
330
331
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PWM3_CH3) | \
332
PIN_ODR_LOW(GPIOB_AUX1) | \
333
PIN_ODR_LOW(GPIOB_BOOT1) | \
334
PIN_ODR_HIGH(GPIOB_PWM2_CH2) | \
335
PIN_ODR_HIGH(GPIOB_PWM3_CH1) | \
336
PIN_ODR_HIGH(GPIOB_PWM3_CH2) | \
337
PIN_ODR_HIGH(GPIOB_USART1_TX) | \
338
PIN_ODR_HIGH(GPIOB_I2C1_SDA) | \
339
PIN_ODR_HIGH(GPIOB_I2C1_SCL) | \
340
PIN_ODR_HIGH(GPIOB_SPI1_CS) | \
341
PIN_ODR_HIGH(GPIOB_I2C2_SCL) | \
342
PIN_ODR_HIGH(GPIOB_I2C2_SDA) | \
343
PIN_ODR_HIGH(GPIOB_POWER_SWITCH) | \
344
PIN_ODR_HIGH(GPIOB_RX2_POL) | \
345
PIN_ODR_HIGH(GPIOB_SDIO_DETECT) | \
346
PIN_ODR_HIGH(GPIOB_AUX4))
347
348
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PWM3_CH3, 0) | \
349
PIN_AFIO_AF(GPIOB_AUX1, 0) | \
350
PIN_AFIO_AF(GPIOB_BOOT1, 0) | \
351
PIN_AFIO_AF(GPIOB_PWM2_CH2, 0) | \
352
PIN_AFIO_AF(GPIOB_PWM3_CH1, 0) | \
353
PIN_AFIO_AF(GPIOB_PWM3_CH2, 0) | \
354
PIN_AFIO_AF(GPIOB_USART1_TX, 7) | \
355
PIN_AFIO_AF(GPIOB_I2C1_SDA, 4))
356
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_I2C1_SCL, 4) | \
357
PIN_AFIO_AF(GPIOB_SPI1_CS, 0) | \
358
PIN_AFIO_AF(GPIOB_I2C2_SCL, 4) | \
359
PIN_AFIO_AF(GPIOB_I2C2_SDA, 4) | \
360
PIN_AFIO_AF(GPIOB_POWER_SWITCH, 0) | \
361
PIN_AFIO_AF(GPIOB_RX2_POL, 0) | \
362
PIN_AFIO_AF(GPIOB_SDIO_DETECT, 0) | \
363
PIN_AFIO_AF(GPIOB_AUX4, 0))
364
365
/*
366
* GPIOC setup:
367
*
368
*/
369
#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_LED1) | \
370
PIN_MODE_OUTPUT(GPIOC_LED3) | \
371
PIN_MODE_OUTPUT(GPIOC_PIN2) | \
372
PIN_MODE_OUTPUT(GPIOC_LED4) | \
373
PIN_MODE_INPUT(GPIOC_AUX3) | \
374
PIN_MODE_INPUT(GPIOC_AUX2) | \
375
PIN_MODE_ALTERNATE(GPIOC_USART6_TX) | \
376
PIN_MODE_ALTERNATE(GPIOC_USART6_RX) | \
377
PIN_MODE_ALTERNATE(GPIOC_SDIO_D0) | \
378
PIN_MODE_ALTERNATE(GPIOC_SDIO_D1) | \
379
PIN_MODE_ALTERNATE(GPIOC_SDIO_D2) | \
380
PIN_MODE_ALTERNATE(GPIOC_SDIO_D3) | \
381
PIN_MODE_ALTERNATE(GPIOC_SDIO_CK) | \
382
PIN_MODE_OUTPUT(GPIOC_LED2) | \
383
PIN_MODE_INPUT(GPIOC_OSC32_IN) | \
384
PIN_MODE_INPUT(GPIOC_OSC32_OUT))
385
386
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_LED1) | \
387
PIN_OTYPE_PUSHPULL(GPIOC_LED3) | \
388
PIN_OTYPE_OPENDRAIN(GPIOC_PIN2) | \
389
PIN_OTYPE_PUSHPULL(GPIOC_LED4) | \
390
PIN_OTYPE_PUSHPULL(GPIOC_AUX3) | \
391
PIN_OTYPE_PUSHPULL(GPIOC_AUX2) | \
392
PIN_OTYPE_PUSHPULL(GPIOC_USART6_TX) | \
393
PIN_OTYPE_PUSHPULL(GPIOC_USART6_RX) | \
394
PIN_OTYPE_PUSHPULL(GPIOC_SDIO_D0) | \
395
PIN_OTYPE_PUSHPULL(GPIOC_SDIO_D1) | \
396
PIN_OTYPE_PUSHPULL(GPIOC_SDIO_D2) | \
397
PIN_OTYPE_PUSHPULL(GPIOC_SDIO_D3) | \
398
PIN_OTYPE_PUSHPULL(GPIOC_SDIO_CK) | \
399
PIN_OTYPE_PUSHPULL(GPIOC_LED2) | \
400
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \
401
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
402
403
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_100M(GPIOC_LED1) | \
404
PIN_OSPEED_100M(GPIOC_LED3) | \
405
PIN_OSPEED_100M(GPIOC_PIN2) | \
406
PIN_OSPEED_100M(GPIOC_LED4) | \
407
PIN_OSPEED_100M(GPIOC_AUX3) | \
408
PIN_OSPEED_100M(GPIOC_AUX2) | \
409
PIN_OSPEED_100M(GPIOC_USART6_TX) | \
410
PIN_OSPEED_100M(GPIOC_USART6_RX) | \
411
PIN_OSPEED_100M(GPIOC_SDIO_D0) | \
412
PIN_OSPEED_100M(GPIOC_SDIO_D1) | \
413
PIN_OSPEED_100M(GPIOC_SDIO_D2) | \
414
PIN_OSPEED_100M(GPIOC_SDIO_D3) | \
415
PIN_OSPEED_100M(GPIOC_SDIO_CK) | \
416
PIN_OSPEED_100M(GPIOC_LED2) | \
417
PIN_OSPEED_100M(GPIOC_OSC32_IN) | \
418
PIN_OSPEED_100M(GPIOC_OSC32_OUT))
419
420
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_LED1) | \
421
PIN_PUPDR_FLOATING(GPIOC_LED3) | \
422
PIN_PUPDR_FLOATING(GPIOC_PIN2) | \
423
PIN_PUPDR_FLOATING(GPIOC_LED4) | \
424
PIN_PUPDR_FLOATING(GPIOC_AUX3) | \
425
PIN_PUPDR_FLOATING(GPIOC_AUX2) | \
426
PIN_PUPDR_FLOATING(GPIOC_USART6_TX) | \
427
PIN_PUPDR_FLOATING(GPIOC_USART6_RX) | \
428
PIN_PUPDR_PULLUP(GPIOC_SDIO_D0) | \
429
PIN_PUPDR_PULLUP(GPIOC_SDIO_D1) | \
430
PIN_PUPDR_PULLUP(GPIOC_SDIO_D2) | \
431
PIN_PUPDR_PULLUP(GPIOC_SDIO_D3) | \
432
PIN_PUPDR_FLOATING(GPIOC_SDIO_CK) | \
433
PIN_PUPDR_FLOATING(GPIOC_LED2) | \
434
PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \
435
PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
436
437
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_LED1) | \
438
PIN_ODR_HIGH(GPIOC_LED3) | \
439
PIN_ODR_HIGH(GPIOC_PIN2) | \
440
PIN_ODR_HIGH(GPIOC_LED4) | \
441
PIN_ODR_LOW(GPIOC_AUX3) | \
442
PIN_ODR_LOW(GPIOC_AUX2) | \
443
PIN_ODR_HIGH(GPIOC_USART6_TX) | \
444
PIN_ODR_HIGH(GPIOC_USART6_RX) | \
445
PIN_ODR_HIGH(GPIOC_SDIO_D0) | \
446
PIN_ODR_HIGH(GPIOC_SDIO_D1) | \
447
PIN_ODR_HIGH(GPIOC_SDIO_D2) | \
448
PIN_ODR_HIGH(GPIOC_SDIO_D3) | \
449
PIN_ODR_HIGH(GPIOC_SDIO_CK) | \
450
PIN_ODR_HIGH(GPIOC_LED2) | \
451
PIN_ODR_HIGH(GPIOC_OSC32_IN) | \
452
PIN_ODR_HIGH(GPIOC_OSC32_OUT))
453
454
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_LED1, 0) | \
455
PIN_AFIO_AF(GPIOC_LED3, 0) | \
456
PIN_AFIO_AF(GPIOC_PIN2, 0) | \
457
PIN_AFIO_AF(GPIOC_LED4, 0) | \
458
PIN_AFIO_AF(GPIOC_AUX3, 0) | \
459
PIN_AFIO_AF(GPIOC_AUX2, 0) | \
460
PIN_AFIO_AF(GPIOC_USART6_TX, 8) | \
461
PIN_AFIO_AF(GPIOC_USART6_RX, 8))
462
463
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SDIO_D0, 12) | \
464
PIN_AFIO_AF(GPIOC_SDIO_D1, 12) | \
465
PIN_AFIO_AF(GPIOC_SDIO_D2, 12) | \
466
PIN_AFIO_AF(GPIOC_SDIO_D3, 12) | \
467
PIN_AFIO_AF(GPIOC_SDIO_CK, 12) | \
468
PIN_AFIO_AF(GPIOC_LED2, 0) | \
469
PIN_AFIO_AF(GPIOC_OSC32_IN, 0) | \
470
PIN_AFIO_AF(GPIOC_OSC32_OUT, 0))
471
472
/*
473
* GPIOD setup:
474
*
475
* PD2 - SDIO CMD (alternate 12).
476
*/
477
#define VAL_GPIOD_MODER PIN_MODE_ALTERNATE(GPIOD_SDIO_CMD)
478
#define VAL_GPIOD_OTYPER 0x00000000
479
#define VAL_GPIOD_OSPEEDR 0xFFFFFFFF
480
#define VAL_GPIOD_PUPDR 0x55555555 // all pullup, GPIOD_SDIO_CMD should be !
481
#define VAL_GPIOD_ODR 0xFFFFFFFF
482
#define VAL_GPIOD_AFRL PIN_AFIO_AF(GPIOD_SDIO_CMD, 12)
483
#define VAL_GPIOD_AFRH 0x00000000
484
485
/*
486
* GPIOE setup:
487
*
488
*/
489
490
#define VAL_GPIOE_MODER 0x00000000
491
#define VAL_GPIOE_OTYPER 0x00000000
492
#define VAL_GPIOE_OSPEEDR 0x00000000
493
#define VAL_GPIOE_PUPDR 0x55555555 // all pullup
494
#define VAL_GPIOE_ODR 0xFFFFFFFF
495
#define VAL_GPIOE_AFRL 0x00000000
496
#define VAL_GPIOE_AFRH 0x00000000
497
498
/*
499
* GPIOF setup:
500
*
501
*/
502
#define VAL_GPIOF_MODER 0x00000000
503
#define VAL_GPIOF_OTYPER 0x00000000
504
#define VAL_GPIOF_OSPEEDR 0x00000000
505
#define VAL_GPIOF_PUPDR 0x55555555 // all pullup
506
#define VAL_GPIOF_ODR 0xFFFFFFFF
507
#define VAL_GPIOF_AFRL 0x00000000
508
#define VAL_GPIOF_AFRH 0x00000000
509
510
/*
511
* GPIOG setup:
512
*
513
*/
514
#define VAL_GPIOG_MODER 0x00000000
515
#define VAL_GPIOG_OTYPER 0x00000000
516
#define VAL_GPIOG_OSPEEDR 0x00000000
517
#define VAL_GPIOG_PUPDR 0x55555555 // all pullup
518
#define VAL_GPIOG_ODR 0xFFFFFFFF
519
#define VAL_GPIOG_AFRL 0x00000000
520
#define VAL_GPIOG_AFRH 0x00000000
521
522
/*
523
* GPIOH setup:
524
*
525
* PH0 - OSC_IN (input floating).
526
* PH1 - OSC_OUT (input floating).
527
*/
528
#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
529
PIN_MODE_INPUT(GPIOH_OSC_OUT) | \
530
PIN_MODE_INPUT(GPIOH_PIN2) | \
531
PIN_MODE_INPUT(GPIOH_PIN3) | \
532
PIN_MODE_INPUT(GPIOH_PIN4) | \
533
PIN_MODE_INPUT(GPIOH_PIN5) | \
534
PIN_MODE_INPUT(GPIOH_PIN6) | \
535
PIN_MODE_INPUT(GPIOH_PIN7) | \
536
PIN_MODE_INPUT(GPIOH_PIN8) | \
537
PIN_MODE_INPUT(GPIOH_PIN9) | \
538
PIN_MODE_INPUT(GPIOH_PIN10) | \
539
PIN_MODE_INPUT(GPIOH_PIN11) | \
540
PIN_MODE_INPUT(GPIOH_PIN12) | \
541
PIN_MODE_INPUT(GPIOH_PIN13) | \
542
PIN_MODE_INPUT(GPIOH_PIN14) | \
543
PIN_MODE_INPUT(GPIOH_PIN15))
544
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \
545
PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \
546
PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \
547
PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \
548
PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \
549
PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \
550
PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \
551
PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \
552
PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \
553
PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \
554
PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \
555
PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \
556
PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \
557
PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
558
PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
559
PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
560
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_100M(GPIOH_OSC_IN) | \
561
PIN_OSPEED_100M(GPIOH_OSC_OUT) | \
562
PIN_OSPEED_100M(GPIOH_PIN2) | \
563
PIN_OSPEED_100M(GPIOH_PIN3) | \
564
PIN_OSPEED_100M(GPIOH_PIN4) | \
565
PIN_OSPEED_100M(GPIOH_PIN5) | \
566
PIN_OSPEED_100M(GPIOH_PIN6) | \
567
PIN_OSPEED_100M(GPIOH_PIN7) | \
568
PIN_OSPEED_100M(GPIOH_PIN8) | \
569
PIN_OSPEED_100M(GPIOH_PIN9) | \
570
PIN_OSPEED_100M(GPIOH_PIN10) | \
571
PIN_OSPEED_100M(GPIOH_PIN11) | \
572
PIN_OSPEED_100M(GPIOH_PIN12) | \
573
PIN_OSPEED_100M(GPIOH_PIN13) | \
574
PIN_OSPEED_100M(GPIOH_PIN14) | \
575
PIN_OSPEED_100M(GPIOH_PIN15))
576
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
577
PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \
578
PIN_PUPDR_FLOATING(GPIOH_PIN2) | \
579
PIN_PUPDR_FLOATING(GPIOH_PIN3) | \
580
PIN_PUPDR_FLOATING(GPIOH_PIN4) | \
581
PIN_PUPDR_FLOATING(GPIOH_PIN5) | \
582
PIN_PUPDR_FLOATING(GPIOH_PIN6) | \
583
PIN_PUPDR_FLOATING(GPIOH_PIN7) | \
584
PIN_PUPDR_FLOATING(GPIOH_PIN8) | \
585
PIN_PUPDR_FLOATING(GPIOH_PIN9) | \
586
PIN_PUPDR_FLOATING(GPIOH_PIN10) | \
587
PIN_PUPDR_FLOATING(GPIOH_PIN11) | \
588
PIN_PUPDR_FLOATING(GPIOH_PIN12) | \
589
PIN_PUPDR_FLOATING(GPIOH_PIN13) | \
590
PIN_PUPDR_FLOATING(GPIOH_PIN14) | \
591
PIN_PUPDR_FLOATING(GPIOH_PIN15))
592
#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \
593
PIN_ODR_HIGH(GPIOH_OSC_OUT) | \
594
PIN_ODR_HIGH(GPIOH_PIN2) | \
595
PIN_ODR_HIGH(GPIOH_PIN3) | \
596
PIN_ODR_HIGH(GPIOH_PIN4) | \
597
PIN_ODR_HIGH(GPIOH_PIN5) | \
598
PIN_ODR_HIGH(GPIOH_PIN6) | \
599
PIN_ODR_HIGH(GPIOH_PIN7) | \
600
PIN_ODR_HIGH(GPIOH_PIN8) | \
601
PIN_ODR_HIGH(GPIOH_PIN9) | \
602
PIN_ODR_HIGH(GPIOH_PIN10) | \
603
PIN_ODR_HIGH(GPIOH_PIN11) | \
604
PIN_ODR_HIGH(GPIOH_PIN12) | \
605
PIN_ODR_HIGH(GPIOH_PIN13) | \
606
PIN_ODR_HIGH(GPIOH_PIN14) | \
607
PIN_ODR_HIGH(GPIOH_PIN15))
608
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0) | \
609
PIN_AFIO_AF(GPIOH_OSC_OUT, 0) | \
610
PIN_AFIO_AF(GPIOH_PIN2, 0) | \
611
PIN_AFIO_AF(GPIOH_PIN3, 0) | \
612
PIN_AFIO_AF(GPIOH_PIN4, 0) | \
613
PIN_AFIO_AF(GPIOH_PIN5, 0) | \
614
PIN_AFIO_AF(GPIOH_PIN6, 0) | \
615
PIN_AFIO_AF(GPIOH_PIN7, 0))
616
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \
617
PIN_AFIO_AF(GPIOH_PIN9, 0) | \
618
PIN_AFIO_AF(GPIOH_PIN10, 0) | \
619
PIN_AFIO_AF(GPIOH_PIN11, 0) | \
620
PIN_AFIO_AF(GPIOH_PIN12, 0) | \
621
PIN_AFIO_AF(GPIOH_PIN13, 0) | \
622
PIN_AFIO_AF(GPIOH_PIN14, 0) | \
623
PIN_AFIO_AF(GPIOH_PIN15, 0))
624
625
/*
626
* GPIOI setup:
627
*
628
*/
629
#define VAL_GPIOI_MODER 0x00000000
630
#define VAL_GPIOI_OTYPER 0x00000000
631
#define VAL_GPIOI_OSPEEDR 0x00000000
632
#define VAL_GPIOI_PUPDR 0x55555555 // all pullup
633
#define VAL_GPIOI_ODR 0xFFFFFFFF
634
#define VAL_GPIOI_AFRL 0x00000000
635
#define VAL_GPIOI_AFRH 0x00000000
636
637
/*
638
* AHB_CLK
639
*/
640
#define AHB_CLK STM32_HCLK
641
642
643
/*
644
* LEDs
645
*/
646
/* red, on PC0 */
647
#ifndef USE_LED_1
648
#define USE_LED_1 1
649
#endif
650
#define LED_1_GPIO GPIOC
651
#define LED_1_GPIO_PIN GPIO0
652
#define LED_1_GPIO_ON gpio_clear
653
#define LED_1_GPIO_OFF gpio_set
654
655
/* orange, on PC13 */
656
#ifndef USE_LED_2
657
#define USE_LED_2 1
658
#endif
659
#define LED_2_GPIO GPIOC
660
#define LED_2_GPIO_PIN GPIO13
661
#define LED_2_GPIO_ON gpio_clear
662
#define LED_2_GPIO_OFF gpio_set
663
664
/* green, on PC1 */
665
#ifndef USE_LED_3
666
#define USE_LED_3 1
667
#endif
668
#define LED_3_GPIO GPIOC
669
#define LED_3_GPIO_PIN GPIO1
670
#define LED_3_GPIO_ON gpio_clear
671
#define LED_3_GPIO_OFF gpio_set
672
673
/* yellow, on PC3 */
674
#ifndef USE_LED_4
675
#define USE_LED_4 1
676
#endif
677
#define LED_4_GPIO GPIOC
678
#define LED_4_GPIO_PIN GPIO3
679
#define LED_4_GPIO_ON gpio_clear
680
#define LED_4_GPIO_OFF gpio_set
681
682
/* AUX1, on PB1, 1 on LED_ON, 0 on LED_OFF */
683
#ifndef USE_LED_5
684
#define USE_LED_5 0
685
#endif
686
#define LED_5_GPIO GPIOB
687
#define LED_5_GPIO_PIN GPIO1
688
#define LED_5_GPIO_ON gpio_set
689
#define LED_5_GPIO_OFF gpio_clear
690
691
/* AUX2, on PC5, 1 on LED_ON, 0 on LED_OFF */
692
#ifndef USE_LED_6
693
#define USE_LED_6 0
694
#endif
695
#define LED_6_GPIO GPIOC
696
#define LED_6_GPIO_PIN GPIO5
697
#define LED_6_GPIO_ON gpio_set
698
#define LED_6_GPIO_OFF gpio_clear
699
700
/* AUX3, on PC4, 1 on LED_ON, 0 on LED_OFF */
701
#ifndef USE_LED_7
702
#define USE_LED_7 0
703
#endif
704
#define LED_7_GPIO GPIOC
705
#define LED_7_GPIO_PIN GPIO4
706
#define LED_7_GPIO_ON gpio_set
707
#define LED_7_GPIO_OFF gpio_clear
708
709
/* AUX4, on PB15, 1 on LED_ON, 0 on LED_OFF */
710
#ifndef USE_LED_8
711
#define USE_LED_8 0
712
#endif
713
#define LED_8_GPIO GPIOB
714
#define LED_8_GPIO_PIN GPIO15
715
#define LED_8_GPIO_ON gpio_set
716
#define LED_8_GPIO_OFF gpio_clear
717
718
719
/* Pint to set Uart2 RX polarity, on PB13, output high inverts, low doesn't */
720
#define RC_POLARITY_GPIO_PORT GPIOB
721
#define RC_POLARITY_GPIO_PIN GPIO13
722
723
/*
724
* ADCs
725
*/
726
// AUX 1
727
#if USE_ADC_1
728
#define AD1_1_CHANNEL ADC_CHANNEL_IN9
729
#define ADC_1 AD1_1
730
#define ADC_1_GPIO_PORT GPIOB
731
#define ADC_1_GPIO_PIN GPIO1
732
#endif
733
734
// AUX 2
735
#if USE_ADC_2
736
#define AD1_2_CHANNEL ADC_CHANNEL_IN15
737
#define ADC_2 AD1_2
738
#define ADC_2_GPIO_PORT GPIOC
739
#define ADC_2_GPIO_PIN GPIO5
740
#endif
741
742
// AUX 3
743
#if USE_ADC_3
744
#define AD1_3_CHANNEL ADC_CHANNEL_IN14
745
#define ADC_3 AD1_3
746
#define ADC_3_GPIO_PORT GPIOC
747
#define ADC_3_GPIO_PIN GPIO4
748
#endif
749
750
// Internal ADC for battery enabled by default
751
#ifndef USE_ADC_4
752
#define USE_ADC_4 1
753
#endif
754
#if USE_ADC_4
755
#define AD1_4_CHANNEL ADC_CHANNEL_IN4
756
#define ADC_4 AD1_4
757
#define ADC_4_GPIO_PORT GPIOA
758
#define ADC_4_GPIO_PIN GPIO4
759
#endif
760
761
/* allow to define ADC_CHANNEL_VSUPPLY in the airframe file*/
762
#ifndef ADC_CHANNEL_VSUPPLY
763
#define ADC_CHANNEL_VSUPPLY ADC_4
764
#endif
765
766
#define DefaultVoltageOfAdc(adc) (0.006185*adc)
767
768
/*
769
* PWM defines
770
*/
771
#ifndef USE_PWM0
772
#define USE_PWM0 1
773
#endif
774
#if USE_PWM0
775
#define PWM_SERVO_0 0
776
#define PWM_SERVO_0_GPIO GPIOB
777
#define PWM_SERVO_0_PIN GPIO0
778
#define PWM_SERVO_0_AF GPIO_AF2
779
#define PWM_SERVO_0_DRIVER PWMD3
780
#define PWM_SERVO_0_CHANNEL 2
781
#define PWM_SERVO_0_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
782
#else
783
#define PWM_SERVO_0_ACTIVE PWM_OUTPUT_DISABLED
784
#endif
785
786
#ifndef USE_PWM1
787
#define USE_PWM1 1
788
#endif
789
#if USE_PWM1
790
#define PWM_SERVO_1 1
791
#define PWM_SERVO_1_GPIO GPIOA
792
#define PWM_SERVO_1_PIN GPIO2
793
#define PWM_SERVO_1_AF GPIO_AF1
794
#define PWM_SERVO_1_DRIVER PWMD2
795
#define PWM_SERVO_1_CHANNEL 2
796
#define PWM_SERVO_1_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
797
#else
798
#define PWM_SERVO_1_ACTIVE PWM_OUTPUT_DISABLED
799
#endif
800
801
#ifndef USE_PWM2
802
#define USE_PWM2 1
803
#endif
804
#if USE_PWM2
805
#define PWM_SERVO_2 2
806
#define PWM_SERVO_2_GPIO GPIOB
807
#define PWM_SERVO_2_PIN GPIO5
808
#define PWM_SERVO_2_AF GPIO_AF2
809
#define PWM_SERVO_2_DRIVER PWMD3
810
#define PWM_SERVO_2_CHANNEL 1
811
#define PWM_SERVO_2_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
812
#else
813
#define PWM_SERVO_2_ACTIVE PWM_OUTPUT_DISABLED
814
#endif
815
816
#ifndef USE_PWM3
817
#define USE_PWM3 1
818
#endif
819
#if USE_PWM3
820
#define PWM_SERVO_3 3
821
#define PWM_SERVO_3_GPIO GPIOB
822
#define PWM_SERVO_3_PIN GPIO4
823
#define PWM_SERVO_3_AF GPIO_AF2
824
#define PWM_SERVO_3_DRIVER PWMD3
825
#define PWM_SERVO_3_CHANNEL 0
826
#define PWM_SERVO_3_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
827
#else
828
#define PWM_SERVO_3_ACTIVE PWM_OUTPUT_DISABLED
829
#endif
830
831
#ifndef USE_PWM4
832
#define USE_PWM4 1
833
#endif
834
#if USE_PWM4
835
#define PWM_SERVO_4 4
836
#define PWM_SERVO_4_GPIO GPIOB
837
#define PWM_SERVO_4_PIN GPIO3
838
#define PWM_SERVO_4_AF GPIO_AF1
839
#define PWM_SERVO_4_DRIVER PWMD2
840
#define PWM_SERVO_4_CHANNEL 1
841
#define PWM_SERVO_4_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
842
#else
843
#define PWM_SERVO_4_ACTIVE PWM_OUTPUT_DISABLED
844
#endif
845
846
#ifndef USE_PWM5
847
#define USE_PWM5 1
848
#endif
849
#if USE_PWM5
850
#define PWM_SERVO_5 5
851
#define PWM_SERVO_5_GPIO GPIOA
852
#define PWM_SERVO_5_PIN GPIO15
853
#define PWM_SERVO_5_AF GPIO_AF1
854
#define PWM_SERVO_5_DRIVER PWMD2
855
#define PWM_SERVO_5_CHANNEL 0
856
#define PWM_SERVO_5_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
857
#else
858
#define PWM_SERVO_5_ACTIVE PWM_OUTPUT_DISABLED
859
#endif
860
861
#if USE_PWM6
862
#define PWM_SERVO_6 6
863
#define PWM_SERVO_6_GPIO GPIOB
864
#define PWM_SERVO_6_PIN GPIO1
865
#define PWM_SERVO_6_AF GPIO_AF2
866
#define PWM_SERVO_6_DRIVER PWMD3
867
#define PWM_SERVO_6_CHANNEL 3
868
#define PWM_SERVO_6_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
869
#else
870
#define PWM_SERVO_6_ACTIVE PWM_OUTPUT_DISABLED
871
#endif
872
873
874
#ifdef STM32_PWM_USE_TIM2
875
#define PWM_CONF_TIM2 STM32_PWM_USE_TIM2
876
#else
877
#define PWM_CONF_TIM2 1
878
#endif
879
#define PWM_CONF2_DEF { \
880
PWM_FREQUENCY, \
881
PWM_FREQUENCY/TIM2_SERVO_HZ, \
882
NULL, \
883
{ \
884
{ PWM_SERVO_5_ACTIVE, NULL }, \
885
{ PWM_SERVO_4_ACTIVE, NULL }, \
886
{ PWM_SERVO_1_ACTIVE, NULL }, \
887
{ PWM_OUTPUT_DISABLED, NULL }, \
888
}, \
889
0, \
890
0 \
891
}
892
893
#ifdef STM32_PWM_USE_TIM3
894
#define PWM_CONF_TIM3 STM32_PWM_USE_TIM3
895
#else
896
#define PWM_CONF_TIM3 1
897
#endif
898
#define PWM_CONF3_DEF { \
899
PWM_FREQUENCY, \
900
PWM_FREQUENCY/TIM3_SERVO_HZ, \
901
NULL, \
902
{ \
903
{ PWM_SERVO_3_ACTIVE, NULL }, \
904
{ PWM_SERVO_2_ACTIVE, NULL }, \
905
{ PWM_SERVO_0_ACTIVE, NULL }, \
906
{ PWM_SERVO_6_ACTIVE, NULL }, \
907
}, \
908
0, \
909
0 \
910
}
911
915
#define RC_PPM_TICKS_PER_USEC 2
916
#define PPM_TIMER_FREQUENCY 2000000
917
#define PPM_CHANNEL ICU_CHANNEL_1
918
#define PPM_TIMER ICUD1
919
920
/*
921
* PWM input
922
*/
923
// PWM_INPUT 1 on PA8 (also PPM IN)
924
#define PWM_INPUT1_ICU ICUD1
925
#define PWM_INPUT1_CHANNEL ICU_CHANNEL_1
926
// PPM in (aka PA8) is used: not compatible with PPM RC receiver
927
#define PWM_INPUT1_GPIO_PORT GPIOA
928
#define PWM_INPUT1_GPIO_PIN GPIO8
929
#define PWM_INPUT1_GPIO_AF GPIO_AF1
930
931
// PWM_INPUT 2 on PA3 (also SERVO 1)
932
#if (USE_PWM1 && USE_PWM_INPUT2)
933
#error "PW1 and PWM_INPUT2 are not compatible"
934
#endif
935
#define PWM_INPUT2_ICU ICUD9
936
#define PWM_INPUT2_CHANNEL ICU_CHANNEL_1
937
#define PWM_INPUT2_GPIO_PORT GPIOA
938
#define PWM_INPUT2_GPIO_PIN GPIO2
939
#define PWM_INPUT2_GPIO_AF GPIO_AF3
940
944
#ifndef I2C1_CLOCK_SPEED
945
#define I2C1_CLOCK_SPEED 400000
946
#endif
947
#if I2C1_CLOCK_SPEED == 400000
948
#define I2C1_DUTY_CYCLE FAST_DUTY_CYCLE_2
949
#elif I2C1_CLOCK_SPEED == 100000
950
#define I2C1_DUTY_CYCLE STD_DUTY_CYCLE
951
#else
952
#error Invalid I2C1 clock speed
953
#endif
954
#define I2C1_CFG_DEF { \
955
OPMODE_I2C, \
956
I2C1_CLOCK_SPEED, \
957
I2C1_DUTY_CYCLE, \
958
}
959
960
#ifndef I2C2_CLOCK_SPEED
961
#define I2C2_CLOCK_SPEED 400000
962
#endif
963
#if I2C2_CLOCK_SPEED == 400000
964
#define I2C2_DUTY_CYCLE FAST_DUTY_CYCLE_2
965
#elif I2C2_CLOCK_SPEED == 100000
966
#define I2C2_DUTY_CYCLE STD_DUTY_CYCLE
967
#else
968
#error Invalid I2C2 clock speed
969
#endif
970
#define I2C2_CFG_DEF { \
971
OPMODE_I2C, \
972
I2C2_CLOCK_SPEED, \
973
I2C2_DUTY_CYCLE, \
974
}
975
979
#define SPI1_GPIO_AF GPIO_AF5
980
#define SPI1_GPIO_PORT_MISO GPIOA
981
#define SPI1_GPIO_MISO GPIO6
982
#define SPI1_GPIO_PORT_MOSI GPIOA
983
#define SPI1_GPIO_MOSI GPIO7
984
#define SPI1_GPIO_PORT_SCK GPIOA
985
#define SPI1_GPIO_SCK GPIO5
986
987
// SLAVE0 on SPI connector
988
#define SPI_SELECT_SLAVE0_PORT GPIOB
989
#define SPI_SELECT_SLAVE0_PIN GPIO9
990
// SLAVE1 on AUX1
991
#define SPI_SELECT_SLAVE1_PORT GPIOB
992
#define SPI_SELECT_SLAVE1_PIN GPIO1
993
// SLAVE2 on AUX2
994
#define SPI_SELECT_SLAVE2_PORT GPIOC
995
#define SPI_SELECT_SLAVE2_PIN GPIO5
996
// SLAVE3 on AUX3
997
#define SPI_SELECT_SLAVE3_PORT GPIOC
998
#define SPI_SELECT_SLAVE3_PIN GPIO4
999
// SLAVE4 on AUX4
1000
#define SPI_SELECT_SLAVE4_PORT GPIOB
1001
#define SPI_SELECT_SLAVE4_PIN GPIO15
1002
1009
#ifndef USE_BARO_BOARD
1010
#define USE_BARO_BOARD 1
1011
#endif
1012
1013
/*
1014
* Actuators for fixedwing
1015
*/
1016
/* Default actuators driver */
1017
#define DEFAULT_ACTUATORS "subsystems/actuators/actuators_pwm.h"
1018
#define ActuatorDefaultSet(_x,_y) ActuatorPwmSet(_x,_y)
1019
#define ActuatorsDefaultInit() ActuatorsPwmInit()
1020
#define ActuatorsDefaultCommit() ActuatorsPwmCommit()
1021
1022
1026
#define SDIO_D0_PORT GPIOC
1027
#define SDIO_D0_PIN GPIOC_SDIO_D0
1028
#define SDIO_D1_PORT GPIOC
1029
#define SDIO_D1_PIN GPIOC_SDIO_D1
1030
#define SDIO_D2_PORT GPIOC
1031
#define SDIO_D2_PIN GPIOC_SDIO_D2
1032
#define SDIO_D3_PORT GPIOC
1033
#define SDIO_D3_PIN GPIOC_SDIO_D3
1034
#define SDIO_CK_PORT GPIOC
1035
#define SDIO_CK_PIN GPIOC_SDIO_CK
1036
#define SDIO_CMD_PORT GPIOD
1037
#define SDIO_CMD_PIN GPIOD_SDIO_CMD
1038
#define SDIO_AF 12
1039
// bat monitoring for file closing
1040
#define SDLOG_BAT_ADC ADCD1
1041
#define SDLOG_BAT_CHAN AD1_4_CHANNEL
1042
// usb led status
1043
#define SDLOG_USB_LED 4
1044
#define SDLOG_USB_VBUS_PORT GPIOA
1045
#define SDLOG_USB_VBUS_PIN GPIO9
1046
1047
#if !defined(_FROM_ASM_)
1048
#ifdef __cplusplus
1049
extern
"C"
{
1050
#endif
1051
void
boardInit
(
void
);
1052
#ifdef __cplusplus
1053
}
1054
#endif
1055
#endif
/* _FROM_ASM_ */
1056
1057
#endif
/* _BOARD_H_ */
boardInit
void boardInit(void)
Board-specific initialization code.
Definition:
board.c:122
sw
airborne
boards
apogee
chibios
v1.0
board.h
Generated on Sat Feb 9 2019 06:43:47 for Paparazzi UAS by
1.8.8
1.8.8 
