Initialization of MT9F002 chip and options to change settings. More...

#include "std.h"
#include "mt9f002.h"
#include "mt9f002_regs.h"
#include "math/pprz_algebra_int.h"
#include "boards/bebop.h"
#include <stdio.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/ioctl.h>
#include <linux/i2c-dev.h>
#include <linux/videodev2.h>
#include <linux/v4l2-mediabus.h>

Include dependency graph for mt9f002.c:

Go to the source code of this file.

Macros
#define	MAX(x, y) (((x) > (y)) ? (x) : (y))

Functions
static void	write_reg (struct mt9f002_t *mt, uint16_t addr, uint32_t val, uint8_t len)
	Write multiple bytes to a single register. More...

static uint32_t	read_reg (struct mt9f002_t *mt, uint16_t addr, uint8_t len)
	Read multiple bytes from a register. More...

static void	mt9f002_mipi_stage1 (struct mt9f002_t *mt)
	Configure stage 1 for both MiPi and HiSPi connection. More...

static void	mt9f002_mipi_stage2 (struct mt9f002_t *mt)
	Configure stage 2 for both MiPi and HiSPi connection. More...

static void	mt9f002_mipi_stage3 (struct mt9f002_t *mt)
	Configure stage 3 for both MiPi and HiSPi connection. More...

static void	mt9f002_parallel_stage1 (struct mt9f002_t *mt)
	Configure stage 1 for parallel connection. More...

static void	mt9f002_parallel_stage2 (struct mt9f002_t *mt)
	Configure stage 2 for parallel connection. More...

static void	mt9f002_set_pll (struct mt9f002_t *mt)
	Set the PLL registers based on config. More...

static void	mt9f002_set_blanking (struct mt9f002_t *mt)
	Set the blanking configuration Blanking of the MT9F002 depends on the target FPS. More...

static void	mt9f002_set_exposure (struct mt9f002_t *mt)
	Set the exposure configuration Depends on the blanking (and therefore the FPS) More...

static uint16_t	mt9f002_calc_gain (float gain)
	Calculate the gain based on value of 1.0 -> 63.50. More...

static void	mt9f002_set_gains (struct mt9f002_t *mt)
	Sets the GreenR, Blue, Red and GreenB gains. More...

void	mt9f002_init (struct mt9f002_t *mt)
	Initialisation of the Aptina MT9F002 CMOS sensor (front camera) More...

Variables
struct video_config_t	front_camera

Detailed Description

Initialization of MT9F002 chip and options to change settings.

Definition in file mt9f002.c.

Macro Definition Documentation

#define MAX	(	x,
		y
	)	(((x) > (y)) ? (x) : (y))

Definition at line 41 of file mt9f002.c.

Referenced by mt9f002_set_blanking().

Function Documentation

static uint16_t mt9f002_calc_gain ( float gain )

static

Calculate the gain based on value of 1.0 -> 63.50.

Definition at line 720 of file mt9f002.c.

Referenced by mt9f002_set_gains().

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void mt9f002_init ( struct mt9f002_t * mt )

Initialisation of the Aptina MT9F002 CMOS sensor (front camera)

Definition at line 788 of file mt9f002.c.

References mt9f002_t::i2c_trans, I2CTransDone, mt9f002_t::interface, MT9F002_HiSPi, MT9F002_MIPI, mt9f002_mipi_stage1(), mt9f002_mipi_stage2(), mt9f002_mipi_stage3(), MT9F002_MODE_SELECT, mt9f002_parallel_stage1(), mt9f002_parallel_stage2(), MT9F002_SCALE_M, MT9F002_SCALER_N, MT9F002_SCALING_MODE, mt9f002_set_blanking(), mt9f002_set_exposure(), mt9f002_set_gains(), mt9f002_set_pll(), MT9F002_SOFTWARE_RESET, MT9F002_X_ADDR_END, MT9F002_X_ADDR_START, MT9F002_X_OUTPUT_SIZE, MT9F002_Y_ADDR_END, MT9F002_Y_ADDR_START, MT9F002_Y_OUTPUT_SIZE, mt9f002_t::offset_x, mt9f002_t::offset_y, mt9f002_t::output_height, mt9f002_t::output_scaler, mt9f002_t::output_width, mt9f002_t::scaled_height, mt9f002_t::scaled_width, i2c_transaction::status, and write_reg().

Referenced by board_init2().

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static void mt9f002_mipi_stage1 ( struct mt9f002_t * mt )

inlinestatic

Configure stage 1 for both MiPi and HiSPi connection.

Definition at line 121 of file mt9f002.c.

References mt9f002_t::interface, MT9F002_CPP_DATA_FORMAT, MT9F002_HiSPi, MT9F002_MFR_3176, MT9F002_MFR_317C, MT9F002_MFR_3D00, MT9F002_MFR_3D02, MT9F002_MFR_3D04, MT9F002_MFR_3D06, MT9F002_MFR_3D08, MT9F002_MFR_3D0A, MT9F002_MFR_3D0C, MT9F002_MFR_3D0E, MT9F002_MFR_3D10, MT9F002_MFR_3D12, MT9F002_MFR_3D14, MT9F002_MFR_3D16, MT9F002_MFR_3D18, MT9F002_MFR_3D1A, MT9F002_MFR_3D1C, MT9F002_MFR_3D1E, MT9F002_MFR_3D20, MT9F002_MFR_3D22, MT9F002_MFR_3D24, MT9F002_MFR_3D26, MT9F002_MFR_3D28, MT9F002_MFR_3D2A, MT9F002_MFR_3D2C, MT9F002_MFR_3D2E, MT9F002_MFR_3D30, MT9F002_MFR_3D32, MT9F002_MFR_3D34, MT9F002_MFR_3D36, MT9F002_MFR_3D38, MT9F002_MFR_3D3A, MT9F002_MFR_3D3C, MT9F002_MFR_3D3E, MT9F002_MFR_3D40, MT9F002_MFR_3D42, MT9F002_MFR_3D44, MT9F002_MFR_3D46, MT9F002_MFR_3D48, MT9F002_MFR_3D4A, MT9F002_MFR_3D4C, MT9F002_MFR_3D4E, MT9F002_MFR_3D50, MT9F002_MFR_3D52, MT9F002_MFR_3D54, MT9F002_MFR_3D56, MT9F002_MFR_3D58, MT9F002_MFR_3D5A, MT9F002_MFR_3D5C, MT9F002_MFR_3D5E, MT9F002_MFR_3D60, MT9F002_MFR_3D62, MT9F002_MFR_3D64, MT9F002_MFR_3D66, MT9F002_MFR_3D68, MT9F002_MFR_3D6A, MT9F002_MFR_3D6C, MT9F002_MFR_3D6E, MT9F002_MFR_3D70, MT9F002_MFR_3D72, MT9F002_MFR_3D74, MT9F002_MFR_3D76, MT9F002_MFR_3D78, MT9F002_MFR_3D7A, MT9F002_MFR_3D7C, MT9F002_MFR_3D7E, MT9F002_MFR_3D80, MT9F002_MFR_3D82, MT9F002_MFR_3D84, MT9F002_MFR_3D86, MT9F002_MFR_3D88, MT9F002_MFR_3D8A, MT9F002_MFR_3D8C, MT9F002_MFR_3D8E, MT9F002_MFR_3D90, MT9F002_MFR_3D92, MT9F002_MFR_3D94, MT9F002_MFR_3D96, MT9F002_MFR_3D98, MT9F002_MFR_3D9A, MT9F002_MFR_3D9C, MT9F002_MFR_3D9E, MT9F002_MFR_3DA0, MT9F002_MFR_3DA2, MT9F002_MFR_3DA4, MT9F002_MFR_3DA6, MT9F002_MFR_3DA8, MT9F002_MFR_3DAA, MT9F002_MFR_3DAC, MT9F002_MFR_3DAE, MT9F002_MFR_3DB0, MT9F002_MFR_3DB2, MT9F002_MFR_3DB4, MT9F002_MFR_3DB6, MT9F002_MFR_3DB8, MT9F002_MFR_3DBA, MT9F002_MFR_3DBC, MT9F002_MFR_3DBE, MT9F002_MFR_3DC0, MT9F002_MFR_3DC2, MT9F002_MFR_3DC4, MT9F002_MFR_3DC6, MT9F002_MFR_3DC8, MT9F002_MFR_3DCA, MT9F002_MFR_3DCC, MT9F002_MFR_3DCE, MT9F002_MFR_3DD0, MT9F002_MFR_3DD2, MT9F002_MFR_3DD4, MT9F002_MFR_3DD6, MT9F002_MFR_3DD8, MT9F002_MFR_3DDA, MT9F002_MFR_3DDC, MT9F002_MFR_3DDE, MT9F002_MFR_3DE0, MT9F002_MFR_3DE2, MT9F002_MFR_3DE4, MT9F002_MFR_3DE6, MT9F002_MFR_3DE8, MT9F002_MFR_3DEA, MT9F002_MFR_3DEC, MT9F002_MFR_3DEE, MT9F002_MFR_3DF0, MT9F002_MFR_3DF2, MT9F002_MFR_3DF4, MT9F002_MFR_3DF6, MT9F002_MFR_3DF8, MT9F002_MFR_3DFA, MT9F002_MFR_3DFC, MT9F002_MFR_3DFE, MT9F002_MFR_3E00, MT9F002_MFR_3E02, MT9F002_MFR_3E04, MT9F002_MFR_3E06, MT9F002_MFR_3E08, MT9F002_MFR_3E0A, MT9F002_MFR_3E0C, MT9F002_MFR_3E0E, MT9F002_MFR_3E10, MT9F002_MFR_3E12, MT9F002_MFR_3E14, MT9F002_MFR_3E16, MT9F002_MFR_3E18, MT9F002_MFR_3E1A, MT9F002_MFR_3E1C, MT9F002_MFR_3E1E, MT9F002_MFR_3E20, MT9F002_MFR_3E22, MT9F002_MFR_3E24, MT9F002_MFR_3E26, MT9F002_MFR_3E28, MT9F002_MFR_3E2A, MT9F002_MFR_3E2C, MT9F002_MFR_3E2E, MT9F002_MFR_3E30, MT9F002_MFR_3E32, MT9F002_MFR_3E34, MT9F002_MFR_3E36, MT9F002_MFR_3E38, MT9F002_MFR_3E3A, MT9F002_MFR_3E3C, MT9F002_MFR_3E3E, MT9F002_MFR_3E40, MT9F002_MFR_3E42, MT9F002_MFR_3E44, MT9F002_MFR_3E46, MT9F002_MFR_3E48, MT9F002_MFR_3E4A, MT9F002_MFR_3E4C, MT9F002_MFR_3E4E, MT9F002_MFR_3E50, MT9F002_MFR_3E52, MT9F002_MFR_3E54, MT9F002_MFR_3E56, MT9F002_MFR_3E58, MT9F002_MFR_3E5A, MT9F002_MFR_3E5C, MT9F002_MFR_3E5E, MT9F002_MFR_3E60, MT9F002_MFR_3E62, MT9F002_MFR_3E64, MT9F002_MFR_3E66, MT9F002_MFR_3E68, MT9F002_MFR_3E6A, MT9F002_MFR_3E6C, MT9F002_MFR_3E6E, MT9F002_MFR_3E70, MT9F002_MFR_3E72, MT9F002_MFR_3E74, MT9F002_MFR_3E76, MT9F002_MFR_3E78, MT9F002_MFR_3E7A, MT9F002_MFR_3E7C, MT9F002_MFR_3E7E, MT9F002_MFR_3E80, MT9F002_MFR_3E82, MT9F002_MFR_3E84, MT9F002_MFR_3E86, MT9F002_MFR_3E88, MT9F002_MFR_3E8A, MT9F002_MFR_3E8C, MT9F002_MFR_3E8E, MT9F002_MFR_3E90, MT9F002_MFR_3E92, MT9F002_MFR_3E94, MT9F002_MFR_3E96, MT9F002_MFR_3E98, MT9F002_MFR_3E9A, MT9F002_MFR_3E9C, MT9F002_MFR_3E9E, MT9F002_MFR_3EA0, MT9F002_MFR_3EA2, MT9F002_MFR_3EA4, MT9F002_MFR_3EA6, MT9F002_MFR_3EA8, MT9F002_MFR_3EAA, MT9F002_MFR_3EAC, MT9F002_MFR_3EAE, MT9F002_MFR_3EB0, MT9F002_MFR_3EB2, MT9F002_MFR_3EB4, MT9F002_MFR_3EB6, MT9F002_MFR_3EB8, MT9F002_MFR_3EBA, MT9F002_MFR_3EBC, MT9F002_MFR_3EBE, MT9F002_MFR_3EC0, MT9F002_MFR_3EC2, MT9F002_MFR_3EC4, MT9F002_MFR_3EC6, MT9F002_MFR_3EC8, MT9F002_MFR_3ECA, MT9F002_MFR_3ED8, MT9F002_MFR_3EE6, MT9F002_MFR_3EE8, MT9F002_MODE_SELECT, MT9F002_RESET_REGISTER, MT9F002_SERIAL_FORMAT, MT9F002_SMIA_TEST, and write_reg().

Referenced by mt9f002_init().

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static void mt9f002_mipi_stage2 ( struct mt9f002_t * mt )

inlinestatic

Configure stage 2 for both MiPi and HiSPi connection.

Definition at line 378 of file mt9f002.c.

References MT9F002_SMIA_TEST, and write_reg().

Referenced by mt9f002_init().

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static void mt9f002_mipi_stage3 ( struct mt9f002_t * mt )

inlinestatic

Configure stage 3 for both MiPi and HiSPi connection.

Definition at line 386 of file mt9f002.c.

References MT9F002_EXTRA_DELAY, MT9F002_MFR_3EDC, MT9F002_MFR_3EE2, MT9F002_RESET_REGISTER, and write_reg().

Referenced by mt9f002_init().

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static void mt9f002_parallel_stage1 ( struct mt9f002_t * mt )

inlinestatic

Configure stage 1 for parallel connection.

Definition at line 397 of file mt9f002.c.

References MT9F002_ANALOG_CONTROL4, MT9F002_CTX_CONTROL_REG, MT9F002_CTX_WR_DATA_REG, MT9F002_DAC_LD_14_15, MT9F002_DATA_PEDESTAL_, MT9F002_DATAPATH_SELECT, MT9F002_GLOBAL_GAIN, MT9F002_RESET_REGISTER, MT9F002_SERIAL_FORMAT, MT9F002_SMIA_TEST, and write_reg().

Referenced by mt9f002_init().

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static void mt9f002_parallel_stage2 ( struct mt9f002_t * mt )

inlinestatic

Configure stage 2 for parallel connection.

Definition at line 494 of file mt9f002.c.

References MT9F002_ANALOG_CONTROL4, MT9F002_ANALOG_CONTROL5, MT9F002_ANALOG_CONTROL7, MT9F002_COARSE_INTEGRATION_TIME, MT9F002_COLUMN_CORRECTION, MT9F002_CTX_CONTROL_REG, MT9F002_DAC_LD_24_25, MT9F002_DAC_LD_28_29, MT9F002_DAC_LD_30_31, MT9F002_DARK_CONTROL3, MT9F002_DATAPATH_SELECT, MT9F002_DIGITAL_TEST, MT9F002_MASK_CORRUPTED_FRAMES, MT9F002_READ_MODE, MT9F002_RESET_REGISTER, MT9F002_X_ODD_INC, MT9F002_Y_ODD_INC, and write_reg().

Referenced by mt9f002_init().

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static void mt9f002_set_blanking ( struct mt9f002_t * mt )

static

Set the blanking configuration Blanking of the MT9F002 depends on the target FPS.

Definition at line 565 of file mt9f002.c.

References mt9f002_t::frame_length, int32_gcd(), mt9f002_t::interface, mt9f002_t::line_length, MAX, MT9F002_FRAME_LENGTH_LINES, MT9F002_FRAME_LENGTH_MAX, MT9F002_HiSPi, MT9F002_LINE_LENGTH_MAX, MT9F002_LINE_LENGTH_PCK, MT9F002_MIN_FRAME_BLANKING_LINES, MT9F002_MIN_LINE_BLANKING_PCK, MT9F002_MIN_LINE_LENGTH_PCK, MT9F002_MIPI, MT9F002_X_ODD_INC, mt9f002_t::op_pix_clk, mt9f002_t::op_pix_clk_div, mt9f002_t::op_sys_clk_div, read_reg(), mt9f002_t::real_fps, mt9f002_t::row_speed_10_8, mt9f002_t::scaled_height, mt9f002_t::scaled_width, mt9f002_t::shift_vt_pix_clk_div, mt9f002_t::target_fps, mt9f002_t::vt_pix_clk, mt9f002_t::vt_pix_clk_div, mt9f002_t::vt_sys_clk_div, and write_reg().

Referenced by mt9f002_init().

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static void mt9f002_set_exposure ( struct mt9f002_t * mt )

static

Set the exposure configuration Depends on the blanking (and therefore the FPS)

Definition at line 658 of file mt9f002.c.

References mt9f002_t::frame_length, mt9f002_t::line_length, MT9F002_COARSE_INTEGRATION_TIME, MT9F002_COARSE_INTEGRATION_TIME_MAX_MARGIN, MT9F002_COARSE_INTEGRATION_TIME_MIN, MT9F002_FINE_INTEGRATION_TIME_, MT9F002_FINE_INTEGRATION_TIME_MAX_MARGIN, MT9F002_FINE_INTEGRATION_TIME_MIN, read_reg(), mt9f002_t::real_exposure, mt9f002_t::target_exposure, mt9f002_t::vt_pix_clk, and write_reg().

Referenced by mt9f002_init().

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static void mt9f002_set_gains ( struct mt9f002_t * mt )

static

Sets the GreenR, Blue, Red and GreenB gains.

Definition at line 776 of file mt9f002.c.

References mt9f002_t::gain_blue, mt9f002_t::gain_green1, mt9f002_t::gain_green2, mt9f002_t::gain_red, MT9F002_BLUE_GAIN, mt9f002_calc_gain(), MT9F002_GREEN1_GAIN, MT9F002_GREEN2_GAIN, MT9F002_RED_GAIN, and write_reg().

Referenced by mt9f002_init().

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static void mt9f002_set_pll ( struct mt9f002_t * mt )

inlinestatic

Set the PLL registers based on config.

Definition at line 535 of file mt9f002.c.

References mt9f002_t::input_clk_freq, MT9F002_OP_PIX_CLK_DIV, MT9F002_OP_SYS_CLK_DIV, MT9F002_PLL_MULTIPLIER, MT9F002_PRE_PLL_CLK_DIV, MT9F002_ROW_SPEED, MT9F002_SMIA_TEST, MT9F002_VT_PIX_CLK_DIV, MT9F002_VT_SYS_CLK_DIV, mt9f002_t::op_pix_clk, mt9f002_t::op_pix_clk_div, mt9f002_t::op_sys_clk_div, mt9f002_t::pll_multiplier, mt9f002_t::pre_pll_clk_div, read_reg(), mt9f002_t::row_speed_10_8, mt9f002_t::rowSpeed_2_0, mt9f002_t::shift_vt_pix_clk_div, mt9f002_t::vt_pix_clk, mt9f002_t::vt_pix_clk_div, mt9f002_t::vt_sys_clk_div, and write_reg().

Referenced by mt9f002_init().

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static uint32_t read_reg	(	struct mt9f002_t *	mt,
		uint16_t	addr,
		uint8_t	len
	)

static

Read multiple bytes from a register.

Definition at line 102 of file mt9f002.c.

References i2c_transaction::buf, mt9f002_t::i2c_periph, mt9f002_t::i2c_trans, i2c_transceive(), and MT9F002_ADDRESS.

Referenced by mt9f002_set_blanking(), mt9f002_set_exposure(), and mt9f002_set_pll().

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static void write_reg	(	struct mt9f002_t *	mt,
		uint16_t	addr,
		uint32_t	val,
		uint8_t	len
	)

static

Write multiple bytes to a single register.

Definition at line 72 of file mt9f002.c.

References i2c_transaction::buf, mt9f002_t::i2c_periph, mt9f002_t::i2c_trans, i2c_transmit(), and MT9F002_ADDRESS.

Referenced by mt9f002_init(), mt9f002_mipi_stage1(), mt9f002_mipi_stage2(), mt9f002_mipi_stage3(), mt9f002_parallel_stage1(), mt9f002_parallel_stage2(), mt9f002_set_blanking(), mt9f002_set_exposure(), mt9f002_set_gains(), and mt9f002_set_pll().

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Variable Documentation

struct video_config_t front_camera

Initial value:

= {
  .output_size = {
    .w = MT9F002_OUTPUT_WIDTH,
    .h = MT9F002_OUTPUT_HEIGHT
  },
  .sensor_size = {
    .w = MT9F002_OUTPUT_WIDTH,
    .h = MT9F002_OUTPUT_HEIGHT,
  },
  .crop = {
    .x = 0,
    .y = 0,
    .w = MT9F002_OUTPUT_WIDTH,
    .h = MT9F002_OUTPUT_HEIGHT
  },
  .dev_name = "/dev/video1",
  .subdev_name = "/dev/v4l-subdev1",
  .format = V4L2_PIX_FMT_UYVY,
  .subdev_format = V4L2_MBUS_FMT_SGRBG10_1X10,
  .buf_cnt = 3,
  .filters = VIDEO_FILTER_ISP,
  .cv_listener = NULL,
  .fps = MT9F002_TARGET_FPS
}

Definition at line 44 of file mt9f002.c.

Macros

Functions

Variables

Detailed Description

Macro Definition Documentation

Function Documentation

Variable Documentation