Paparazzi UAS  v5.12_stable-4-g9b43e9b
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board.h
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1 /*
2  ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
3 
4  Licensed under the Apache License, Version 2.0 (the "License");
5  you may not use this file except in compliance with the License.
6  You may obtain a copy of the License at
7 
8  http://www.apache.org/licenses/LICENSE-2.0
9 
10  Unless required by applicable law or agreed to in writing, software
11  distributed under the License is distributed on an "AS IS" BASIS,
12  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  See the License for the specific language governing permissions and
14  limitations under the License.
15 */
16 
17 #pragma once
18 
19 /*
20  * Board identifier.
21  */
22 #define BOARD_CHIMERA
23 #define BOARD_NAME "Chimera Autopilot"
24 
25 /*
26  * Board oscillators-related settings.
27  */
28 #if !defined(STM32_LSECLK)
29 #define STM32_LSECLK 32768U
30 #endif
31 
32 #if !defined(STM32_HSECLK)
33 #define STM32_HSECLK 16000000U
34 #endif
35 
36 /*
37  * Board voltages.
38  * Required for performance limits calculation.
39  */
40 #define STM32_VDD 300U
41 
42 /*
43  * MCU type as defined in the ST header.
44  */
45 #define STM32F767xx
46 
47 /*
48  * IO pins assignments.
49  */
50 #define AUX3 0U
51 #define RC1_UART4_RX 1U
52 #define AUX2 2U
53 #define AUX1 3U
54 #define VBAT_MEAS 4U
55 #define AUX0 5U
56 #define SRV0_TIM3_CH1 6U
57 #define SRV1_TIM3_CH2 7U
58 #define XB_ASSO 8U
59 #define USB_VBUS 9U
60 #define SD_DETECT 10U
61 #define OTG_FS_DM 11U
62 #define OTG_FS_DP 12U
63 #define SWDIO 13U
64 #define SWCLK 14U
65 #define SPI1_CS 15U
66 
67 #define SRV2_TIM3_CH3 0U
68 #define SRV3_TIM3_CH4 1U
69 #define RC1 2U
70 #define SPI1_SCK 3U
71 #define SPI1_MISO 4U
72 #define SPI1_MOSI 5U
73 #define USART1_TX 6U
74 #define USART1_RX 7U
75 #define I2C1_SCL 8U
76 #define I2C1_SDA 9U
77 #define I2C2_SCL 10U
78 #define I2C2_SDA 11U
79 #define LED1 12U
80 #define LED2 13U
81 #define DIS_C 14U
82 #define DIS_DP 15U
83 
84 #define PC00 0U
85 #define PC01 1U
86 #define AUX5 2U
87 #define AUX4 3U
88 #define EN_COMP 4U
89 #define PC05 5U
90 #define AUX6 6U
91 #define AUX7 7U
92 #define SDMMC1_D0 8U
93 #define SDMMC1_D1 9U
94 #define SDMMC1_D2 10U
95 #define SDMMC1_D3 11U
96 #define SDMMC1_CK 12U
97 #define PC13 13U
98 #define OSC32_IN 14U
99 #define OSC32_OUT 15U
100 
101 #define CAN1_RX 0U
102 #define CAN1_TX 1U
103 #define SDMMC1_CMD 2U
104 #define USART2_CTS 3U
105 #define USART2_RTS 4U
106 #define USART2_TX 5U
107 #define USART2_RX 6U
108 #define IMU_INT 7U
109 #define USART3_TX 8U
110 #define USART3_RX 9U
111 #define LED3 10U
112 #define LED4 11U
113 #define SRV4_TIM4_CH1 12U
114 #define SRV5_TIM4_CH2 13U
115 #define SRV6_TIM4_CH3 14U
116 #define SRV7_TIM4_CH4 15U
117 
118 #define UART8_RX 0U
119 #define UART8_TX 1U
120 #define DIS_G 2U
121 #define DIS_F 3U
122 #define DIS_A 4U
123 #define DIS_B 5U
124 #define APSW 6U
125 #define RC2_UART7_RX 7U
126 #define DIS_E 8U
127 #define DIS_D 9U
128 #define PE10 10U
129 #define PE11 11U
130 #define PE12 12U
131 #define PE13 13U
132 #define PE14 14U
133 #define XB_RST 15U
134 
135 #define PF00 0U
136 #define PF01 1U
137 #define PF02 2U
138 #define PF03 3U
139 #define PF04 4U
140 #define PF05 5U
141 #define PF06 6U
142 #define PF07 7U
143 #define PF08 8U
144 #define PF09 9U
145 #define PF10 10U
146 #define PF11 11U
147 #define PF12 12U
148 #define PF13 13U
149 #define PF14 14U
150 #define PF15 15U
151 
152 #define PG00 0U
153 #define PG01 1U
154 #define PG02 2U
155 #define PG03 3U
156 #define PG04 4U
157 #define PG05 5U
158 #define PG06 6U
159 #define PG07 7U
160 #define PG08 8U
161 #define PG09 9U
162 #define PG10 10U
163 #define PG11 11U
164 #define PG12 12U
165 #define PG13 13U
166 #define PG14 14U
167 #define PG15 15U
168 
169 #define OSC_IN 0U
170 #define OSC_OUT 1U
171 #define PH02 2U
172 #define PH03 3U
173 #define PH04 4U
174 #define PH05 5U
175 #define PH06 6U
176 #define PH07 7U
177 #define PH08 8U
178 #define PH09 9U
179 #define PH10 10U
180 #define PH11 11U
181 #define PH12 12U
182 #define PH13 13U
183 #define PH14 14U
184 #define PH15 15U
185 
186 #define PI00 0U
187 #define PI01 1U
188 #define PI02 2U
189 #define PI03 3U
190 #define PI04 4U
191 #define PI05 5U
192 #define PI06 6U
193 #define PI07 7U
194 #define PI08 8U
195 #define PI09 9U
196 #define PI10 10U
197 #define PI11 11U
198 #define PI12 12U
199 #define PI13 13U
200 #define PI14 14U
201 #define PI15 15U
202 
203 #define PJ00 0U
204 #define PJ01 1U
205 #define PJ02 2U
206 #define PJ03 3U
207 #define PJ04 4U
208 #define PJ05 5U
209 #define PJ06 6U
210 #define PJ07 7U
211 #define PJ08 8U
212 #define PJ09 9U
213 #define PJ10 10U
214 #define PJ11 11U
215 #define PJ12 12U
216 #define PJ13 13U
217 #define PJ14 14U
218 #define PJ15 15U
219 
220 #define PK00 0U
221 #define PK01 1U
222 #define PK02 2U
223 #define PK03 3U
224 #define PK04 4U
225 #define PK05 5U
226 #define PK06 6U
227 #define PK07 7U
228 #define PK08 8U
229 #define PK09 9U
230 #define PK10 10U
231 #define PK11 11U
232 #define PK12 12U
233 #define PK13 13U
234 #define PK14 14U
235 #define PK15 15U
236 
237 /*
238  * IO lines assignments.
239  */
240 #define LINE_AUX3 PAL_LINE(GPIOA, 0U)
241 #define LINE_RC1_UART4_RX PAL_LINE(GPIOA, 1U)
242 #define LINE_AUX2 PAL_LINE(GPIOA, 2U)
243 #define LINE_AUX1 PAL_LINE(GPIOA, 3U)
244 #define LINE_VBAT_MEAS PAL_LINE(GPIOA, 4U)
245 #define LINE_AUX0 PAL_LINE(GPIOA, 5U)
246 #define LINE_SRV0_TIM3_CH1 PAL_LINE(GPIOA, 6U)
247 #define LINE_SRV1_TIM3_CH2 PAL_LINE(GPIOA, 7U)
248 #define LINE_XB_ASSO PAL_LINE(GPIOA, 8U)
249 #define LINE_USB_VBUS PAL_LINE(GPIOA, 9U)
250 #define LINE_SD_DETECT PAL_LINE(GPIOA, 10U)
251 #define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U)
252 #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U)
253 #define LINE_SWDIO PAL_LINE(GPIOA, 13U)
254 #define LINE_SWCLK PAL_LINE(GPIOA, 14U)
255 #define LINE_SPI1_CS PAL_LINE(GPIOA, 15U)
256 
257 #define LINE_SRV2_TIM3_CH3 PAL_LINE(GPIOB, 0U)
258 #define LINE_SRV3_TIM3_CH4 PAL_LINE(GPIOB, 1U)
259 #define LINE_RC1 PAL_LINE(GPIOB, 2U)
260 #define LINE_SPI1_SCK PAL_LINE(GPIOB, 3U)
261 #define LINE_SPI1_MISO PAL_LINE(GPIOB, 4U)
262 #define LINE_SPI1_MOSI PAL_LINE(GPIOB, 5U)
263 #define LINE_USART1_TX PAL_LINE(GPIOB, 6U)
264 #define LINE_USART1_RX PAL_LINE(GPIOB, 7U)
265 #define LINE_I2C1_SCL PAL_LINE(GPIOB, 8U)
266 #define LINE_I2C1_SDA PAL_LINE(GPIOB, 9U)
267 #define LINE_I2C2_SCL PAL_LINE(GPIOB, 10U)
268 #define LINE_I2C2_SDA PAL_LINE(GPIOB, 11U)
269 #define LINE_LED1 PAL_LINE(GPIOB, 12U)
270 #define LINE_LED2 PAL_LINE(GPIOB, 13U)
271 #define LINE_DIS_C PAL_LINE(GPIOB, 14U)
272 #define LINE_DIS_DP PAL_LINE(GPIOB, 15U)
273 
274 #define LINE_AUX5 PAL_LINE(GPIOC, 2U)
275 #define LINE_AUX4 PAL_LINE(GPIOC, 3U)
276 #define LINE_EN_COMP PAL_LINE(GPIOC, 4U)
277 #define LINE_AUX6 PAL_LINE(GPIOC, 6U)
278 #define LINE_AUX7 PAL_LINE(GPIOC, 7U)
279 #define LINE_SDMMC1_D0 PAL_LINE(GPIOC, 8U)
280 #define LINE_SDMMC1_D1 PAL_LINE(GPIOC, 9U)
281 #define LINE_SDMMC1_D2 PAL_LINE(GPIOC, 10U)
282 #define LINE_SDMMC1_D3 PAL_LINE(GPIOC, 11U)
283 #define LINE_SDMMC1_CK PAL_LINE(GPIOC, 12U)
284 #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
285 #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
286 
287 #define LINE_CAN1_RX PAL_LINE(GPIOD, 0U)
288 #define LINE_CAN1_TX PAL_LINE(GPIOD, 1U)
289 #define LINE_SDMMC1_CMD PAL_LINE(GPIOD, 2U)
290 #define LINE_USART2_CTS PAL_LINE(GPIOD, 3U)
291 #define LINE_USART2_RTS PAL_LINE(GPIOD, 4U)
292 #define LINE_USART2_TX PAL_LINE(GPIOD, 5U)
293 #define LINE_USART2_RX PAL_LINE(GPIOD, 6U)
294 #define LINE_IMU_INT PAL_LINE(GPIOD, 7U)
295 #define LINE_USART3_TX PAL_LINE(GPIOD, 8U)
296 #define LINE_USART3_RX PAL_LINE(GPIOD, 9U)
297 #define LINE_LED3 PAL_LINE(GPIOD, 10U)
298 #define LINE_LED4 PAL_LINE(GPIOD, 11U)
299 #define LINE_SRV4_TIM4_CH1 PAL_LINE(GPIOD, 12U)
300 #define LINE_SRV5_TIM4_CH2 PAL_LINE(GPIOD, 13U)
301 #define LINE_SRV6_TIM4_CH3 PAL_LINE(GPIOD, 14U)
302 #define LINE_SRV7_TIM4_CH4 PAL_LINE(GPIOD, 15U)
303 
304 #define LINE_UART8_RX PAL_LINE(GPIOE, 0U)
305 #define LINE_UART8_TX PAL_LINE(GPIOE, 1U)
306 #define LINE_DIS_G PAL_LINE(GPIOE, 2U)
307 #define LINE_DIS_F PAL_LINE(GPIOE, 3U)
308 #define LINE_DIS_A PAL_LINE(GPIOE, 4U)
309 #define LINE_DIS_B PAL_LINE(GPIOE, 5U)
310 #define LINE_APSW PAL_LINE(GPIOE, 6U)
311 #define LINE_RC2_UART7_RX PAL_LINE(GPIOE, 7U)
312 #define LINE_DIS_E PAL_LINE(GPIOE, 8U)
313 #define LINE_DIS_D PAL_LINE(GPIOE, 9U)
314 #define LINE_XB_RST PAL_LINE(GPIOE, 15U)
315 
316 #define LINE_OSC_IN PAL_LINE(GPIOH, 0U)
317 #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U)
318 
319 
320 /*
321  * I/O ports initial setup, this configuration is established soon after reset
322  * in the initialization code.
323  * Please refer to the STM32 Reference Manual for details.
324  */
325 #define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
326 #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
327 #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
328 #define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
329 #define PIN_ODR_LEVEL_LOW(n) (0U << (n))
330 #define PIN_ODR_LEVEL_HIGH(n) (1U << (n))
331 #define PIN_OTYPE_PUSHPULL(n) (0U << (n))
332 #define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
333 #define PIN_OSPEED_SPEED_VERYLOW(n) (0U << ((n) * 2U))
334 #define PIN_OSPEED_SPEED_LOW(n) (1U << ((n) * 2U))
335 #define PIN_OSPEED_SPEED_MEDIUM(n) (2U << ((n) * 2U))
336 #define PIN_OSPEED_SPEED_HIGH(n) (3U << ((n) * 2U))
337 #define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
338 #define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
339 #define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
340 #define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
341 
342 #define VAL_GPIOA_MODER (PIN_MODE_INPUT(AUX3) | \
343  PIN_MODE_INPUT(RC1_UART4_RX) | \
344  PIN_MODE_INPUT(AUX2) | \
345  PIN_MODE_INPUT(AUX1) | \
346  PIN_MODE_ANALOG(VBAT_MEAS) | \
347  PIN_MODE_INPUT(AUX0) | \
348  PIN_MODE_INPUT(SRV0_TIM3_CH1) | \
349  PIN_MODE_INPUT(SRV1_TIM3_CH2) | \
350  PIN_MODE_INPUT(XB_ASSO) | \
351  PIN_MODE_INPUT(USB_VBUS) | \
352  PIN_MODE_INPUT(SD_DETECT) | \
353  PIN_MODE_ALTERNATE(OTG_FS_DM) | \
354  PIN_MODE_ALTERNATE(OTG_FS_DP) | \
355  PIN_MODE_ALTERNATE(SWDIO) | \
356  PIN_MODE_ALTERNATE(SWCLK) | \
357  PIN_MODE_OUTPUT(SPI1_CS))
358 
359 #define VAL_GPIOA_OTYPER (PIN_OTYPE_OPENDRAIN(AUX3) | \
360  PIN_OTYPE_OPENDRAIN(RC1_UART4_RX) | \
361  PIN_OTYPE_OPENDRAIN(AUX2) | \
362  PIN_OTYPE_OPENDRAIN(AUX1) | \
363  PIN_OTYPE_PUSHPULL(VBAT_MEAS) | \
364  PIN_OTYPE_OPENDRAIN(AUX0) | \
365  PIN_OTYPE_OPENDRAIN(SRV0_TIM3_CH1) | \
366  PIN_OTYPE_OPENDRAIN(SRV1_TIM3_CH2) | \
367  PIN_OTYPE_OPENDRAIN(XB_ASSO) | \
368  PIN_OTYPE_OPENDRAIN(USB_VBUS) | \
369  PIN_OTYPE_OPENDRAIN(SD_DETECT) | \
370  PIN_OTYPE_PUSHPULL(OTG_FS_DM) | \
371  PIN_OTYPE_PUSHPULL(OTG_FS_DP) | \
372  PIN_OTYPE_PUSHPULL(SWDIO) | \
373  PIN_OTYPE_PUSHPULL(SWCLK) | \
374  PIN_OTYPE_PUSHPULL(SPI1_CS))
375 
376 #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(AUX3) | \
377  PIN_OSPEED_SPEED_VERYLOW(RC1_UART4_RX) | \
378  PIN_OSPEED_SPEED_VERYLOW(AUX2) | \
379  PIN_OSPEED_SPEED_VERYLOW(AUX1) | \
380  PIN_OSPEED_SPEED_VERYLOW(VBAT_MEAS) | \
381  PIN_OSPEED_SPEED_VERYLOW(AUX0) | \
382  PIN_OSPEED_SPEED_VERYLOW(SRV0_TIM3_CH1) | \
383  PIN_OSPEED_SPEED_VERYLOW(SRV1_TIM3_CH2) | \
384  PIN_OSPEED_SPEED_VERYLOW(XB_ASSO) | \
385  PIN_OSPEED_SPEED_VERYLOW(USB_VBUS) | \
386  PIN_OSPEED_SPEED_VERYLOW(SD_DETECT) | \
387  PIN_OSPEED_SPEED_HIGH(OTG_FS_DM) | \
388  PIN_OSPEED_SPEED_HIGH(OTG_FS_DP) | \
389  PIN_OSPEED_SPEED_HIGH(SWDIO) | \
390  PIN_OSPEED_SPEED_HIGH(SWCLK) | \
391  PIN_OSPEED_SPEED_HIGH(SPI1_CS))
392 
393 #define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLDOWN(AUX3) | \
394  PIN_PUPDR_PULLDOWN(RC1_UART4_RX) | \
395  PIN_PUPDR_PULLDOWN(AUX2) | \
396  PIN_PUPDR_PULLDOWN(AUX1) | \
397  PIN_PUPDR_FLOATING(VBAT_MEAS) | \
398  PIN_PUPDR_PULLDOWN(AUX0) | \
399  PIN_PUPDR_PULLDOWN(SRV0_TIM3_CH1) | \
400  PIN_PUPDR_PULLDOWN(SRV1_TIM3_CH2) | \
401  PIN_PUPDR_FLOATING(XB_ASSO) | \
402  PIN_PUPDR_PULLDOWN(USB_VBUS) | \
403  PIN_PUPDR_PULLUP(SD_DETECT) | \
404  PIN_PUPDR_FLOATING(OTG_FS_DM) | \
405  PIN_PUPDR_FLOATING(OTG_FS_DP) | \
406  PIN_PUPDR_FLOATING(SWDIO) | \
407  PIN_PUPDR_FLOATING(SWCLK) | \
408  PIN_PUPDR_FLOATING(SPI1_CS))
409 
410 #define VAL_GPIOA_ODR (PIN_ODR_LEVEL_HIGH(AUX3) | \
411  PIN_ODR_LEVEL_HIGH(RC1_UART4_RX) | \
412  PIN_ODR_LEVEL_HIGH(AUX2) | \
413  PIN_ODR_LEVEL_HIGH(AUX1) | \
414  PIN_ODR_LEVEL_LOW(VBAT_MEAS) | \
415  PIN_ODR_LEVEL_HIGH(AUX0) | \
416  PIN_ODR_LEVEL_HIGH(SRV0_TIM3_CH1) | \
417  PIN_ODR_LEVEL_HIGH(SRV1_TIM3_CH2) | \
418  PIN_ODR_LEVEL_LOW(XB_ASSO) | \
419  PIN_ODR_LEVEL_LOW(USB_VBUS) | \
420  PIN_ODR_LEVEL_LOW(SD_DETECT) | \
421  PIN_ODR_LEVEL_HIGH(OTG_FS_DM) | \
422  PIN_ODR_LEVEL_HIGH(OTG_FS_DP) | \
423  PIN_ODR_LEVEL_HIGH(SWDIO) | \
424  PIN_ODR_LEVEL_HIGH(SWCLK) | \
425  PIN_ODR_LEVEL_HIGH(SPI1_CS))
426 
427 #define VAL_GPIOA_AFRL (PIN_AFIO_AF(AUX3, 0) | \
428  PIN_AFIO_AF(RC1_UART4_RX, 0) | \
429  PIN_AFIO_AF(AUX2, 0) | \
430  PIN_AFIO_AF(AUX1, 0) | \
431  PIN_AFIO_AF(VBAT_MEAS, 0) | \
432  PIN_AFIO_AF(AUX0, 0) | \
433  PIN_AFIO_AF(SRV0_TIM3_CH1, 0) | \
434  PIN_AFIO_AF(SRV1_TIM3_CH2, 0))
435 
436 #define VAL_GPIOA_AFRH (PIN_AFIO_AF(XB_ASSO, 0) | \
437  PIN_AFIO_AF(USB_VBUS, 0) | \
438  PIN_AFIO_AF(SD_DETECT, 0) | \
439  PIN_AFIO_AF(OTG_FS_DM, 10) | \
440  PIN_AFIO_AF(OTG_FS_DP, 10) | \
441  PIN_AFIO_AF(SWDIO, 0) | \
442  PIN_AFIO_AF(SWCLK, 0) | \
443  PIN_AFIO_AF(SPI1_CS, 0))
444 
445 #define VAL_GPIOB_MODER (PIN_MODE_INPUT(SRV2_TIM3_CH3) | \
446  PIN_MODE_INPUT(SRV3_TIM3_CH4) | \
447  PIN_MODE_INPUT(RC1) | \
448  PIN_MODE_ALTERNATE(SPI1_SCK) | \
449  PIN_MODE_ALTERNATE(SPI1_MISO) | \
450  PIN_MODE_ALTERNATE(SPI1_MOSI) | \
451  PIN_MODE_ALTERNATE(USART1_TX) | \
452  PIN_MODE_ALTERNATE(USART1_RX) | \
453  PIN_MODE_ALTERNATE(I2C1_SCL) | \
454  PIN_MODE_ALTERNATE(I2C1_SDA) | \
455  PIN_MODE_ALTERNATE(I2C2_SCL) | \
456  PIN_MODE_ALTERNATE(I2C2_SDA) | \
457  PIN_MODE_OUTPUT(LED1) | \
458  PIN_MODE_OUTPUT(LED2) | \
459  PIN_MODE_OUTPUT(DIS_C) | \
460  PIN_MODE_OUTPUT(DIS_DP))
461 
462 #define VAL_GPIOB_OTYPER (PIN_OTYPE_OPENDRAIN(SRV2_TIM3_CH3) | \
463  PIN_OTYPE_OPENDRAIN(SRV3_TIM3_CH4) | \
464  PIN_OTYPE_OPENDRAIN(RC1) | \
465  PIN_OTYPE_PUSHPULL(SPI1_SCK) | \
466  PIN_OTYPE_PUSHPULL(SPI1_MISO) | \
467  PIN_OTYPE_PUSHPULL(SPI1_MOSI) | \
468  PIN_OTYPE_PUSHPULL(USART1_TX) | \
469  PIN_OTYPE_PUSHPULL(USART1_RX) | \
470  PIN_OTYPE_OPENDRAIN(I2C1_SCL) | \
471  PIN_OTYPE_OPENDRAIN(I2C1_SDA) | \
472  PIN_OTYPE_OPENDRAIN(I2C2_SCL) | \
473  PIN_OTYPE_OPENDRAIN(I2C2_SDA) | \
474  PIN_OTYPE_PUSHPULL(LED1) | \
475  PIN_OTYPE_PUSHPULL(LED2) | \
476  PIN_OTYPE_PUSHPULL(DIS_C) | \
477  PIN_OTYPE_PUSHPULL(DIS_DP))
478 
479 #define VAL_GPIOB_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(SRV2_TIM3_CH3) | \
480  PIN_OSPEED_SPEED_VERYLOW(SRV3_TIM3_CH4) | \
481  PIN_OSPEED_SPEED_VERYLOW(RC1) | \
482  PIN_OSPEED_SPEED_HIGH(SPI1_SCK) | \
483  PIN_OSPEED_SPEED_HIGH(SPI1_MISO) | \
484  PIN_OSPEED_SPEED_HIGH(SPI1_MOSI) | \
485  PIN_OSPEED_SPEED_HIGH(USART1_TX) | \
486  PIN_OSPEED_SPEED_HIGH(USART1_RX) | \
487  PIN_OSPEED_SPEED_HIGH(I2C1_SCL) | \
488  PIN_OSPEED_SPEED_HIGH(I2C1_SDA) | \
489  PIN_OSPEED_SPEED_HIGH(I2C2_SCL) | \
490  PIN_OSPEED_SPEED_HIGH(I2C2_SDA) | \
491  PIN_OSPEED_SPEED_VERYLOW(LED1) | \
492  PIN_OSPEED_SPEED_VERYLOW(LED2) | \
493  PIN_OSPEED_SPEED_VERYLOW(DIS_C) | \
494  PIN_OSPEED_SPEED_VERYLOW(DIS_DP))
495 
496 #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLDOWN(SRV2_TIM3_CH3) | \
497  PIN_PUPDR_PULLDOWN(SRV3_TIM3_CH4) | \
498  PIN_PUPDR_PULLDOWN(RC1) | \
499  PIN_PUPDR_FLOATING(SPI1_SCK) | \
500  PIN_PUPDR_FLOATING(SPI1_MISO) | \
501  PIN_PUPDR_FLOATING(SPI1_MOSI) | \
502  PIN_PUPDR_FLOATING(USART1_TX) | \
503  PIN_PUPDR_FLOATING(USART1_RX) | \
504  PIN_PUPDR_PULLUP(I2C1_SCL) | \
505  PIN_PUPDR_PULLUP(I2C1_SDA) | \
506  PIN_PUPDR_PULLUP(I2C2_SCL) | \
507  PIN_PUPDR_PULLUP(I2C2_SDA) | \
508  PIN_PUPDR_FLOATING(LED1) | \
509  PIN_PUPDR_FLOATING(LED2) | \
510  PIN_PUPDR_FLOATING(DIS_C) | \
511  PIN_PUPDR_FLOATING(DIS_DP))
512 
513 #define VAL_GPIOB_ODR (PIN_ODR_LEVEL_HIGH(SRV2_TIM3_CH3) | \
514  PIN_ODR_LEVEL_HIGH(SRV3_TIM3_CH4) | \
515  PIN_ODR_LEVEL_HIGH(RC1) | \
516  PIN_ODR_LEVEL_HIGH(SPI1_SCK) | \
517  PIN_ODR_LEVEL_HIGH(SPI1_MISO) | \
518  PIN_ODR_LEVEL_HIGH(SPI1_MOSI) | \
519  PIN_ODR_LEVEL_HIGH(USART1_TX) | \
520  PIN_ODR_LEVEL_HIGH(USART1_RX) | \
521  PIN_ODR_LEVEL_HIGH(I2C1_SCL) | \
522  PIN_ODR_LEVEL_HIGH(I2C1_SDA) | \
523  PIN_ODR_LEVEL_HIGH(I2C2_SCL) | \
524  PIN_ODR_LEVEL_HIGH(I2C2_SDA) | \
525  PIN_ODR_LEVEL_LOW(LED1) | \
526  PIN_ODR_LEVEL_LOW(LED2) | \
527  PIN_ODR_LEVEL_LOW(DIS_C) | \
528  PIN_ODR_LEVEL_LOW(DIS_DP))
529 
530 #define VAL_GPIOB_AFRL (PIN_AFIO_AF(SRV2_TIM3_CH3, 0) | \
531  PIN_AFIO_AF(SRV3_TIM3_CH4, 0) | \
532  PIN_AFIO_AF(RC1, 0) | \
533  PIN_AFIO_AF(SPI1_SCK, 5) | \
534  PIN_AFIO_AF(SPI1_MISO, 5) | \
535  PIN_AFIO_AF(SPI1_MOSI, 5) | \
536  PIN_AFIO_AF(USART1_TX, 7) | \
537  PIN_AFIO_AF(USART1_RX, 7))
538 
539 #define VAL_GPIOB_AFRH (PIN_AFIO_AF(I2C1_SCL, 4) | \
540  PIN_AFIO_AF(I2C1_SDA, 4) | \
541  PIN_AFIO_AF(I2C2_SCL, 4) | \
542  PIN_AFIO_AF(I2C2_SDA, 4) | \
543  PIN_AFIO_AF(LED1, 0) | \
544  PIN_AFIO_AF(LED2, 0) | \
545  PIN_AFIO_AF(DIS_C, 0) | \
546  PIN_AFIO_AF(DIS_DP, 0))
547 
548 #define VAL_GPIOC_MODER (PIN_MODE_INPUT(PC00) | \
549  PIN_MODE_INPUT(PC01) | \
550  PIN_MODE_INPUT(AUX5) | \
551  PIN_MODE_INPUT(AUX4) | \
552  PIN_MODE_OUTPUT(EN_COMP) | \
553  PIN_MODE_INPUT(PC05) | \
554  PIN_MODE_INPUT(AUX6) | \
555  PIN_MODE_INPUT(AUX7) | \
556  PIN_MODE_ALTERNATE(SDMMC1_D0) | \
557  PIN_MODE_ALTERNATE(SDMMC1_D1) | \
558  PIN_MODE_ALTERNATE(SDMMC1_D2) | \
559  PIN_MODE_ALTERNATE(SDMMC1_D3) | \
560  PIN_MODE_ALTERNATE(SDMMC1_CK) | \
561  PIN_MODE_INPUT(PC13) | \
562  PIN_MODE_ALTERNATE(OSC32_IN) | \
563  PIN_MODE_ALTERNATE(OSC32_OUT))
564 
565 #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(PC00) | \
566  PIN_OTYPE_PUSHPULL(PC01) | \
567  PIN_OTYPE_OPENDRAIN(AUX5) | \
568  PIN_OTYPE_OPENDRAIN(AUX4) | \
569  PIN_OTYPE_PUSHPULL(EN_COMP) | \
570  PIN_OTYPE_PUSHPULL(PC05) | \
571  PIN_OTYPE_OPENDRAIN(AUX6) | \
572  PIN_OTYPE_OPENDRAIN(AUX7) | \
573  PIN_OTYPE_PUSHPULL(SDMMC1_D0) | \
574  PIN_OTYPE_PUSHPULL(SDMMC1_D1) | \
575  PIN_OTYPE_PUSHPULL(SDMMC1_D2) | \
576  PIN_OTYPE_PUSHPULL(SDMMC1_D3) | \
577  PIN_OTYPE_PUSHPULL(SDMMC1_CK) | \
578  PIN_OTYPE_PUSHPULL(PC13) | \
579  PIN_OTYPE_PUSHPULL(OSC32_IN) | \
580  PIN_OTYPE_PUSHPULL(OSC32_OUT))
581 
582 #define VAL_GPIOC_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PC00) | \
583  PIN_OSPEED_SPEED_VERYLOW(PC01) | \
584  PIN_OSPEED_SPEED_VERYLOW(AUX5) | \
585  PIN_OSPEED_SPEED_VERYLOW(AUX4) | \
586  PIN_OSPEED_SPEED_VERYLOW(EN_COMP) | \
587  PIN_OSPEED_SPEED_VERYLOW(PC05) | \
588  PIN_OSPEED_SPEED_VERYLOW(AUX6) | \
589  PIN_OSPEED_SPEED_VERYLOW(AUX7) | \
590  PIN_OSPEED_SPEED_HIGH(SDMMC1_D0) | \
591  PIN_OSPEED_SPEED_HIGH(SDMMC1_D1) | \
592  PIN_OSPEED_SPEED_HIGH(SDMMC1_D2) | \
593  PIN_OSPEED_SPEED_HIGH(SDMMC1_D3) | \
594  PIN_OSPEED_SPEED_HIGH(SDMMC1_CK) | \
595  PIN_OSPEED_SPEED_VERYLOW(PC13) | \
596  PIN_OSPEED_SPEED_HIGH(OSC32_IN) | \
597  PIN_OSPEED_SPEED_HIGH(OSC32_OUT))
598 
599 #define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLDOWN(PC00) | \
600  PIN_PUPDR_PULLDOWN(PC01) | \
601  PIN_PUPDR_PULLDOWN(AUX5) | \
602  PIN_PUPDR_PULLDOWN(AUX4) | \
603  PIN_PUPDR_FLOATING(EN_COMP) | \
604  PIN_PUPDR_PULLDOWN(PC05) | \
605  PIN_PUPDR_PULLDOWN(AUX6) | \
606  PIN_PUPDR_PULLDOWN(AUX7) | \
607  PIN_PUPDR_PULLUP(SDMMC1_D0) | \
608  PIN_PUPDR_PULLUP(SDMMC1_D1) | \
609  PIN_PUPDR_PULLUP(SDMMC1_D2) | \
610  PIN_PUPDR_PULLUP(SDMMC1_D3) | \
611  PIN_PUPDR_PULLUP(SDMMC1_CK) | \
612  PIN_PUPDR_PULLDOWN(PC13) | \
613  PIN_PUPDR_FLOATING(OSC32_IN) | \
614  PIN_PUPDR_FLOATING(OSC32_OUT))
615 
616 #define VAL_GPIOC_ODR (PIN_ODR_LEVEL_LOW(PC00) | \
617  PIN_ODR_LEVEL_LOW(PC01) | \
618  PIN_ODR_LEVEL_HIGH(AUX5) | \
619  PIN_ODR_LEVEL_HIGH(AUX4) | \
620  PIN_ODR_LEVEL_HIGH(EN_COMP) | \
621  PIN_ODR_LEVEL_LOW(PC05) | \
622  PIN_ODR_LEVEL_HIGH(AUX6) | \
623  PIN_ODR_LEVEL_HIGH(AUX7) | \
624  PIN_ODR_LEVEL_HIGH(SDMMC1_D0) | \
625  PIN_ODR_LEVEL_HIGH(SDMMC1_D1) | \
626  PIN_ODR_LEVEL_HIGH(SDMMC1_D2) | \
627  PIN_ODR_LEVEL_HIGH(SDMMC1_D3) | \
628  PIN_ODR_LEVEL_HIGH(SDMMC1_CK) | \
629  PIN_ODR_LEVEL_LOW(PC13) | \
630  PIN_ODR_LEVEL_HIGH(OSC32_IN) | \
631  PIN_ODR_LEVEL_HIGH(OSC32_OUT))
632 
633 #define VAL_GPIOC_AFRL (PIN_AFIO_AF(PC00, 0) | \
634  PIN_AFIO_AF(PC01, 0) | \
635  PIN_AFIO_AF(AUX5, 0) | \
636  PIN_AFIO_AF(AUX4, 0) | \
637  PIN_AFIO_AF(EN_COMP, 0) | \
638  PIN_AFIO_AF(PC05, 0) | \
639  PIN_AFIO_AF(AUX6, 0) | \
640  PIN_AFIO_AF(AUX7, 0))
641 
642 #define VAL_GPIOC_AFRH (PIN_AFIO_AF(SDMMC1_D0, 12) | \
643  PIN_AFIO_AF(SDMMC1_D1, 12) | \
644  PIN_AFIO_AF(SDMMC1_D2, 12) | \
645  PIN_AFIO_AF(SDMMC1_D3, 12) | \
646  PIN_AFIO_AF(SDMMC1_CK, 12) | \
647  PIN_AFIO_AF(PC13, 0) | \
648  PIN_AFIO_AF(OSC32_IN, 0) | \
649  PIN_AFIO_AF(OSC32_OUT, 0))
650 
651 #define VAL_GPIOD_MODER (PIN_MODE_ALTERNATE(CAN1_RX) | \
652  PIN_MODE_ALTERNATE(CAN1_TX) | \
653  PIN_MODE_ALTERNATE(SDMMC1_CMD) | \
654  PIN_MODE_INPUT(USART2_CTS) | \
655  PIN_MODE_INPUT(USART2_RTS) | \
656  PIN_MODE_INPUT(USART2_TX) | \
657  PIN_MODE_INPUT(USART2_RX) | \
658  PIN_MODE_INPUT(IMU_INT) | \
659  PIN_MODE_ALTERNATE(USART3_TX) | \
660  PIN_MODE_ALTERNATE(USART3_RX) | \
661  PIN_MODE_OUTPUT(LED3) | \
662  PIN_MODE_OUTPUT(LED4) | \
663  PIN_MODE_INPUT(SRV4_TIM4_CH1) | \
664  PIN_MODE_INPUT(SRV5_TIM4_CH2) | \
665  PIN_MODE_INPUT(SRV6_TIM4_CH3) | \
666  PIN_MODE_INPUT(SRV7_TIM4_CH4))
667 
668 #define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(CAN1_RX) | \
669  PIN_OTYPE_PUSHPULL(CAN1_TX) | \
670  PIN_OTYPE_PUSHPULL(SDMMC1_CMD) | \
671  PIN_OTYPE_OPENDRAIN(USART2_CTS) | \
672  PIN_OTYPE_OPENDRAIN(USART2_RTS) | \
673  PIN_OTYPE_OPENDRAIN(USART2_TX) | \
674  PIN_OTYPE_OPENDRAIN(USART2_RX) | \
675  PIN_OTYPE_OPENDRAIN(IMU_INT) | \
676  PIN_OTYPE_PUSHPULL(USART3_TX) | \
677  PIN_OTYPE_PUSHPULL(USART3_RX) | \
678  PIN_OTYPE_PUSHPULL(LED3) | \
679  PIN_OTYPE_PUSHPULL(LED4) | \
680  PIN_OTYPE_OPENDRAIN(SRV4_TIM4_CH1) | \
681  PIN_OTYPE_OPENDRAIN(SRV5_TIM4_CH2) | \
682  PIN_OTYPE_OPENDRAIN(SRV6_TIM4_CH3) | \
683  PIN_OTYPE_OPENDRAIN(SRV7_TIM4_CH4))
684 
685 #define VAL_GPIOD_OSPEEDR (PIN_OSPEED_SPEED_HIGH(CAN1_RX) | \
686  PIN_OSPEED_SPEED_HIGH(CAN1_TX) | \
687  PIN_OSPEED_SPEED_HIGH(SDMMC1_CMD) | \
688  PIN_OSPEED_SPEED_VERYLOW(USART2_CTS) | \
689  PIN_OSPEED_SPEED_VERYLOW(USART2_RTS) | \
690  PIN_OSPEED_SPEED_VERYLOW(USART2_TX) | \
691  PIN_OSPEED_SPEED_VERYLOW(USART2_RX) | \
692  PIN_OSPEED_SPEED_VERYLOW(IMU_INT) | \
693  PIN_OSPEED_SPEED_HIGH(USART3_TX) | \
694  PIN_OSPEED_SPEED_HIGH(USART3_RX) | \
695  PIN_OSPEED_SPEED_VERYLOW(LED3) | \
696  PIN_OSPEED_SPEED_VERYLOW(LED4) | \
697  PIN_OSPEED_SPEED_VERYLOW(SRV4_TIM4_CH1) | \
698  PIN_OSPEED_SPEED_VERYLOW(SRV5_TIM4_CH2) | \
699  PIN_OSPEED_SPEED_VERYLOW(SRV6_TIM4_CH3) | \
700  PIN_OSPEED_SPEED_VERYLOW(SRV7_TIM4_CH4))
701 
702 #define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(CAN1_RX) | \
703  PIN_PUPDR_FLOATING(CAN1_TX) | \
704  PIN_PUPDR_PULLUP(SDMMC1_CMD) | \
705  PIN_PUPDR_PULLDOWN(USART2_CTS) | \
706  PIN_PUPDR_PULLDOWN(USART2_RTS) | \
707  PIN_PUPDR_PULLDOWN(USART2_TX) | \
708  PIN_PUPDR_PULLDOWN(USART2_RX) | \
709  PIN_PUPDR_FLOATING(IMU_INT) | \
710  PIN_PUPDR_FLOATING(USART3_TX) | \
711  PIN_PUPDR_FLOATING(USART3_RX) | \
712  PIN_PUPDR_FLOATING(LED3) | \
713  PIN_PUPDR_FLOATING(LED4) | \
714  PIN_PUPDR_PULLDOWN(SRV4_TIM4_CH1) | \
715  PIN_PUPDR_PULLDOWN(SRV5_TIM4_CH2) | \
716  PIN_PUPDR_PULLDOWN(SRV6_TIM4_CH3) | \
717  PIN_PUPDR_PULLDOWN(SRV7_TIM4_CH4))
718 
719 #define VAL_GPIOD_ODR (PIN_ODR_LEVEL_HIGH(CAN1_RX) | \
720  PIN_ODR_LEVEL_HIGH(CAN1_TX) | \
721  PIN_ODR_LEVEL_HIGH(SDMMC1_CMD) | \
722  PIN_ODR_LEVEL_HIGH(USART2_CTS) | \
723  PIN_ODR_LEVEL_HIGH(USART2_RTS) | \
724  PIN_ODR_LEVEL_HIGH(USART2_TX) | \
725  PIN_ODR_LEVEL_HIGH(USART2_RX) | \
726  PIN_ODR_LEVEL_LOW(IMU_INT) | \
727  PIN_ODR_LEVEL_HIGH(USART3_TX) | \
728  PIN_ODR_LEVEL_HIGH(USART3_RX) | \
729  PIN_ODR_LEVEL_LOW(LED3) | \
730  PIN_ODR_LEVEL_LOW(LED4) | \
731  PIN_ODR_LEVEL_HIGH(SRV4_TIM4_CH1) | \
732  PIN_ODR_LEVEL_HIGH(SRV5_TIM4_CH2) | \
733  PIN_ODR_LEVEL_HIGH(SRV6_TIM4_CH3) | \
734  PIN_ODR_LEVEL_HIGH(SRV7_TIM4_CH4))
735 
736 #define VAL_GPIOD_AFRL (PIN_AFIO_AF(CAN1_RX, 9) | \
737  PIN_AFIO_AF(CAN1_TX, 9) | \
738  PIN_AFIO_AF(SDMMC1_CMD, 12) | \
739  PIN_AFIO_AF(USART2_CTS, 0) | \
740  PIN_AFIO_AF(USART2_RTS, 0) | \
741  PIN_AFIO_AF(USART2_TX, 0) | \
742  PIN_AFIO_AF(USART2_RX, 0) | \
743  PIN_AFIO_AF(IMU_INT, 0))
744 
745 #define VAL_GPIOD_AFRH (PIN_AFIO_AF(USART3_TX, 7) | \
746  PIN_AFIO_AF(USART3_RX, 7) | \
747  PIN_AFIO_AF(LED3, 0) | \
748  PIN_AFIO_AF(LED4, 0) | \
749  PIN_AFIO_AF(SRV4_TIM4_CH1, 0) | \
750  PIN_AFIO_AF(SRV5_TIM4_CH2, 0) | \
751  PIN_AFIO_AF(SRV6_TIM4_CH3, 0) | \
752  PIN_AFIO_AF(SRV7_TIM4_CH4, 0))
753 
754 #define VAL_GPIOE_MODER (PIN_MODE_ALTERNATE(UART8_RX) | \
755  PIN_MODE_ALTERNATE(UART8_TX) | \
756  PIN_MODE_OUTPUT(DIS_G) | \
757  PIN_MODE_OUTPUT(DIS_F) | \
758  PIN_MODE_OUTPUT(DIS_A) | \
759  PIN_MODE_OUTPUT(DIS_B) | \
760  PIN_MODE_OUTPUT(APSW) | \
761  PIN_MODE_INPUT(RC2_UART7_RX) | \
762  PIN_MODE_OUTPUT(DIS_E) | \
763  PIN_MODE_OUTPUT(DIS_D) | \
764  PIN_MODE_INPUT(PE10) | \
765  PIN_MODE_INPUT(PE11) | \
766  PIN_MODE_INPUT(PE12) | \
767  PIN_MODE_INPUT(PE13) | \
768  PIN_MODE_INPUT(PE14) | \
769  PIN_MODE_OUTPUT(XB_RST))
770 
771 #define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(UART8_RX) | \
772  PIN_OTYPE_PUSHPULL(UART8_TX) | \
773  PIN_OTYPE_PUSHPULL(DIS_G) | \
774  PIN_OTYPE_PUSHPULL(DIS_F) | \
775  PIN_OTYPE_PUSHPULL(DIS_A) | \
776  PIN_OTYPE_PUSHPULL(DIS_B) | \
777  PIN_OTYPE_PUSHPULL(APSW) | \
778  PIN_OTYPE_OPENDRAIN(RC2_UART7_RX) | \
779  PIN_OTYPE_PUSHPULL(DIS_E) | \
780  PIN_OTYPE_PUSHPULL(DIS_D) | \
781  PIN_OTYPE_PUSHPULL(PE10) | \
782  PIN_OTYPE_PUSHPULL(PE11) | \
783  PIN_OTYPE_PUSHPULL(PE12) | \
784  PIN_OTYPE_PUSHPULL(PE13) | \
785  PIN_OTYPE_PUSHPULL(PE14) | \
786  PIN_OTYPE_PUSHPULL(XB_RST))
787 
788 #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_SPEED_HIGH(UART8_RX) | \
789  PIN_OSPEED_SPEED_HIGH(UART8_TX) | \
790  PIN_OSPEED_SPEED_VERYLOW(DIS_G) | \
791  PIN_OSPEED_SPEED_VERYLOW(DIS_F) | \
792  PIN_OSPEED_SPEED_VERYLOW(DIS_A) | \
793  PIN_OSPEED_SPEED_VERYLOW(DIS_B) | \
794  PIN_OSPEED_SPEED_VERYLOW(APSW) | \
795  PIN_OSPEED_SPEED_VERYLOW(RC2_UART7_RX) | \
796  PIN_OSPEED_SPEED_VERYLOW(DIS_E) | \
797  PIN_OSPEED_SPEED_VERYLOW(DIS_D) | \
798  PIN_OSPEED_SPEED_VERYLOW(PE10) | \
799  PIN_OSPEED_SPEED_VERYLOW(PE11) | \
800  PIN_OSPEED_SPEED_VERYLOW(PE12) | \
801  PIN_OSPEED_SPEED_VERYLOW(PE13) | \
802  PIN_OSPEED_SPEED_VERYLOW(PE14) | \
803  PIN_OSPEED_SPEED_VERYLOW(XB_RST))
804 
805 #define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(UART8_RX) | \
806  PIN_PUPDR_FLOATING(UART8_TX) | \
807  PIN_PUPDR_FLOATING(DIS_G) | \
808  PIN_PUPDR_FLOATING(DIS_F) | \
809  PIN_PUPDR_FLOATING(DIS_A) | \
810  PIN_PUPDR_FLOATING(DIS_B) | \
811  PIN_PUPDR_FLOATING(APSW) | \
812  PIN_PUPDR_PULLDOWN(RC2_UART7_RX) | \
813  PIN_PUPDR_FLOATING(DIS_E) | \
814  PIN_PUPDR_FLOATING(DIS_D) | \
815  PIN_PUPDR_PULLDOWN(PE10) | \
816  PIN_PUPDR_PULLDOWN(PE11) | \
817  PIN_PUPDR_PULLDOWN(PE12) | \
818  PIN_PUPDR_PULLDOWN(PE13) | \
819  PIN_PUPDR_PULLDOWN(PE14) | \
820  PIN_PUPDR_FLOATING(XB_RST))
821 
822 #define VAL_GPIOE_ODR (PIN_ODR_LEVEL_HIGH(UART8_RX) | \
823  PIN_ODR_LEVEL_HIGH(UART8_TX) | \
824  PIN_ODR_LEVEL_LOW(DIS_G) | \
825  PIN_ODR_LEVEL_LOW(DIS_F) | \
826  PIN_ODR_LEVEL_LOW(DIS_A) | \
827  PIN_ODR_LEVEL_LOW(DIS_B) | \
828  PIN_ODR_LEVEL_HIGH(APSW) | \
829  PIN_ODR_LEVEL_HIGH(RC2_UART7_RX) | \
830  PIN_ODR_LEVEL_LOW(DIS_E) | \
831  PIN_ODR_LEVEL_LOW(DIS_D) | \
832  PIN_ODR_LEVEL_LOW(PE10) | \
833  PIN_ODR_LEVEL_LOW(PE11) | \
834  PIN_ODR_LEVEL_LOW(PE12) | \
835  PIN_ODR_LEVEL_LOW(PE13) | \
836  PIN_ODR_LEVEL_LOW(PE14) | \
837  PIN_ODR_LEVEL_HIGH(XB_RST))
838 
839 #define VAL_GPIOE_AFRL (PIN_AFIO_AF(UART8_RX, 8) | \
840  PIN_AFIO_AF(UART8_TX, 8) | \
841  PIN_AFIO_AF(DIS_G, 0) | \
842  PIN_AFIO_AF(DIS_F, 0) | \
843  PIN_AFIO_AF(DIS_A, 0) | \
844  PIN_AFIO_AF(DIS_B, 0) | \
845  PIN_AFIO_AF(APSW, 0) | \
846  PIN_AFIO_AF(RC2_UART7_RX, 0))
847 
848 #define VAL_GPIOE_AFRH (PIN_AFIO_AF(DIS_E, 0) | \
849  PIN_AFIO_AF(DIS_D, 0) | \
850  PIN_AFIO_AF(PE10, 0) | \
851  PIN_AFIO_AF(PE11, 0) | \
852  PIN_AFIO_AF(PE12, 0) | \
853  PIN_AFIO_AF(PE13, 0) | \
854  PIN_AFIO_AF(PE14, 0) | \
855  PIN_AFIO_AF(XB_RST, 0))
856 
857 #define VAL_GPIOF_MODER (PIN_MODE_INPUT(PF00) | \
858  PIN_MODE_INPUT(PF01) | \
859  PIN_MODE_INPUT(PF02) | \
860  PIN_MODE_INPUT(PF03) | \
861  PIN_MODE_INPUT(PF04) | \
862  PIN_MODE_INPUT(PF05) | \
863  PIN_MODE_INPUT(PF06) | \
864  PIN_MODE_INPUT(PF07) | \
865  PIN_MODE_INPUT(PF08) | \
866  PIN_MODE_INPUT(PF09) | \
867  PIN_MODE_INPUT(PF10) | \
868  PIN_MODE_INPUT(PF11) | \
869  PIN_MODE_INPUT(PF12) | \
870  PIN_MODE_INPUT(PF13) | \
871  PIN_MODE_INPUT(PF14) | \
872  PIN_MODE_INPUT(PF15))
873 
874 #define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(PF00) | \
875  PIN_OTYPE_PUSHPULL(PF01) | \
876  PIN_OTYPE_PUSHPULL(PF02) | \
877  PIN_OTYPE_PUSHPULL(PF03) | \
878  PIN_OTYPE_PUSHPULL(PF04) | \
879  PIN_OTYPE_PUSHPULL(PF05) | \
880  PIN_OTYPE_PUSHPULL(PF06) | \
881  PIN_OTYPE_PUSHPULL(PF07) | \
882  PIN_OTYPE_PUSHPULL(PF08) | \
883  PIN_OTYPE_PUSHPULL(PF09) | \
884  PIN_OTYPE_PUSHPULL(PF10) | \
885  PIN_OTYPE_PUSHPULL(PF11) | \
886  PIN_OTYPE_PUSHPULL(PF12) | \
887  PIN_OTYPE_PUSHPULL(PF13) | \
888  PIN_OTYPE_PUSHPULL(PF14) | \
889  PIN_OTYPE_PUSHPULL(PF15))
890 
891 #define VAL_GPIOF_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PF00) | \
892  PIN_OSPEED_SPEED_VERYLOW(PF01) | \
893  PIN_OSPEED_SPEED_VERYLOW(PF02) | \
894  PIN_OSPEED_SPEED_VERYLOW(PF03) | \
895  PIN_OSPEED_SPEED_VERYLOW(PF04) | \
896  PIN_OSPEED_SPEED_VERYLOW(PF05) | \
897  PIN_OSPEED_SPEED_VERYLOW(PF06) | \
898  PIN_OSPEED_SPEED_VERYLOW(PF07) | \
899  PIN_OSPEED_SPEED_VERYLOW(PF08) | \
900  PIN_OSPEED_SPEED_VERYLOW(PF09) | \
901  PIN_OSPEED_SPEED_VERYLOW(PF10) | \
902  PIN_OSPEED_SPEED_VERYLOW(PF11) | \
903  PIN_OSPEED_SPEED_VERYLOW(PF12) | \
904  PIN_OSPEED_SPEED_VERYLOW(PF13) | \
905  PIN_OSPEED_SPEED_VERYLOW(PF14) | \
906  PIN_OSPEED_SPEED_VERYLOW(PF15))
907 
908 #define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLDOWN(PF00) | \
909  PIN_PUPDR_PULLDOWN(PF01) | \
910  PIN_PUPDR_PULLDOWN(PF02) | \
911  PIN_PUPDR_PULLDOWN(PF03) | \
912  PIN_PUPDR_PULLDOWN(PF04) | \
913  PIN_PUPDR_PULLDOWN(PF05) | \
914  PIN_PUPDR_PULLDOWN(PF06) | \
915  PIN_PUPDR_PULLDOWN(PF07) | \
916  PIN_PUPDR_PULLDOWN(PF08) | \
917  PIN_PUPDR_PULLDOWN(PF09) | \
918  PIN_PUPDR_PULLDOWN(PF10) | \
919  PIN_PUPDR_PULLDOWN(PF11) | \
920  PIN_PUPDR_PULLDOWN(PF12) | \
921  PIN_PUPDR_PULLDOWN(PF13) | \
922  PIN_PUPDR_PULLDOWN(PF14) | \
923  PIN_PUPDR_PULLDOWN(PF15))
924 
925 #define VAL_GPIOF_ODR (PIN_ODR_LEVEL_LOW(PF00) | \
926  PIN_ODR_LEVEL_LOW(PF01) | \
927  PIN_ODR_LEVEL_LOW(PF02) | \
928  PIN_ODR_LEVEL_LOW(PF03) | \
929  PIN_ODR_LEVEL_LOW(PF04) | \
930  PIN_ODR_LEVEL_LOW(PF05) | \
931  PIN_ODR_LEVEL_LOW(PF06) | \
932  PIN_ODR_LEVEL_LOW(PF07) | \
933  PIN_ODR_LEVEL_LOW(PF08) | \
934  PIN_ODR_LEVEL_LOW(PF09) | \
935  PIN_ODR_LEVEL_LOW(PF10) | \
936  PIN_ODR_LEVEL_LOW(PF11) | \
937  PIN_ODR_LEVEL_LOW(PF12) | \
938  PIN_ODR_LEVEL_LOW(PF13) | \
939  PIN_ODR_LEVEL_LOW(PF14) | \
940  PIN_ODR_LEVEL_LOW(PF15))
941 
942 #define VAL_GPIOF_AFRL (PIN_AFIO_AF(PF00, 0) | \
943  PIN_AFIO_AF(PF01, 0) | \
944  PIN_AFIO_AF(PF02, 0) | \
945  PIN_AFIO_AF(PF03, 0) | \
946  PIN_AFIO_AF(PF04, 0) | \
947  PIN_AFIO_AF(PF05, 0) | \
948  PIN_AFIO_AF(PF06, 0) | \
949  PIN_AFIO_AF(PF07, 0))
950 
951 #define VAL_GPIOF_AFRH (PIN_AFIO_AF(PF08, 0) | \
952  PIN_AFIO_AF(PF09, 0) | \
953  PIN_AFIO_AF(PF10, 0) | \
954  PIN_AFIO_AF(PF11, 0) | \
955  PIN_AFIO_AF(PF12, 0) | \
956  PIN_AFIO_AF(PF13, 0) | \
957  PIN_AFIO_AF(PF14, 0) | \
958  PIN_AFIO_AF(PF15, 0))
959 
960 #define VAL_GPIOG_MODER (PIN_MODE_INPUT(PG00) | \
961  PIN_MODE_INPUT(PG01) | \
962  PIN_MODE_INPUT(PG02) | \
963  PIN_MODE_INPUT(PG03) | \
964  PIN_MODE_INPUT(PG04) | \
965  PIN_MODE_INPUT(PG05) | \
966  PIN_MODE_INPUT(PG06) | \
967  PIN_MODE_INPUT(PG07) | \
968  PIN_MODE_INPUT(PG08) | \
969  PIN_MODE_INPUT(PG09) | \
970  PIN_MODE_INPUT(PG10) | \
971  PIN_MODE_INPUT(PG11) | \
972  PIN_MODE_INPUT(PG12) | \
973  PIN_MODE_INPUT(PG13) | \
974  PIN_MODE_INPUT(PG14) | \
975  PIN_MODE_INPUT(PG15))
976 
977 #define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(PG00) | \
978  PIN_OTYPE_PUSHPULL(PG01) | \
979  PIN_OTYPE_PUSHPULL(PG02) | \
980  PIN_OTYPE_PUSHPULL(PG03) | \
981  PIN_OTYPE_PUSHPULL(PG04) | \
982  PIN_OTYPE_PUSHPULL(PG05) | \
983  PIN_OTYPE_PUSHPULL(PG06) | \
984  PIN_OTYPE_PUSHPULL(PG07) | \
985  PIN_OTYPE_PUSHPULL(PG08) | \
986  PIN_OTYPE_PUSHPULL(PG09) | \
987  PIN_OTYPE_PUSHPULL(PG10) | \
988  PIN_OTYPE_PUSHPULL(PG11) | \
989  PIN_OTYPE_PUSHPULL(PG12) | \
990  PIN_OTYPE_PUSHPULL(PG13) | \
991  PIN_OTYPE_PUSHPULL(PG14) | \
992  PIN_OTYPE_PUSHPULL(PG15))
993 
994 #define VAL_GPIOG_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PG00) | \
995  PIN_OSPEED_SPEED_VERYLOW(PG01) | \
996  PIN_OSPEED_SPEED_VERYLOW(PG02) | \
997  PIN_OSPEED_SPEED_VERYLOW(PG03) | \
998  PIN_OSPEED_SPEED_VERYLOW(PG04) | \
999  PIN_OSPEED_SPEED_VERYLOW(PG05) | \
1000  PIN_OSPEED_SPEED_VERYLOW(PG06) | \
1001  PIN_OSPEED_SPEED_VERYLOW(PG07) | \
1002  PIN_OSPEED_SPEED_VERYLOW(PG08) | \
1003  PIN_OSPEED_SPEED_VERYLOW(PG09) | \
1004  PIN_OSPEED_SPEED_VERYLOW(PG10) | \
1005  PIN_OSPEED_SPEED_VERYLOW(PG11) | \
1006  PIN_OSPEED_SPEED_VERYLOW(PG12) | \
1007  PIN_OSPEED_SPEED_VERYLOW(PG13) | \
1008  PIN_OSPEED_SPEED_VERYLOW(PG14) | \
1009  PIN_OSPEED_SPEED_VERYLOW(PG15))
1010 
1011 #define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLDOWN(PG00) | \
1012  PIN_PUPDR_PULLDOWN(PG01) | \
1013  PIN_PUPDR_PULLDOWN(PG02) | \
1014  PIN_PUPDR_PULLDOWN(PG03) | \
1015  PIN_PUPDR_PULLDOWN(PG04) | \
1016  PIN_PUPDR_PULLDOWN(PG05) | \
1017  PIN_PUPDR_PULLDOWN(PG06) | \
1018  PIN_PUPDR_PULLDOWN(PG07) | \
1019  PIN_PUPDR_PULLDOWN(PG08) | \
1020  PIN_PUPDR_PULLDOWN(PG09) | \
1021  PIN_PUPDR_PULLDOWN(PG10) | \
1022  PIN_PUPDR_PULLDOWN(PG11) | \
1023  PIN_PUPDR_PULLDOWN(PG12) | \
1024  PIN_PUPDR_PULLDOWN(PG13) | \
1025  PIN_PUPDR_PULLDOWN(PG14) | \
1026  PIN_PUPDR_PULLDOWN(PG15))
1027 
1028 #define VAL_GPIOG_ODR (PIN_ODR_LEVEL_LOW(PG00) | \
1029  PIN_ODR_LEVEL_LOW(PG01) | \
1030  PIN_ODR_LEVEL_LOW(PG02) | \
1031  PIN_ODR_LEVEL_LOW(PG03) | \
1032  PIN_ODR_LEVEL_LOW(PG04) | \
1033  PIN_ODR_LEVEL_LOW(PG05) | \
1034  PIN_ODR_LEVEL_LOW(PG06) | \
1035  PIN_ODR_LEVEL_LOW(PG07) | \
1036  PIN_ODR_LEVEL_LOW(PG08) | \
1037  PIN_ODR_LEVEL_LOW(PG09) | \
1038  PIN_ODR_LEVEL_LOW(PG10) | \
1039  PIN_ODR_LEVEL_LOW(PG11) | \
1040  PIN_ODR_LEVEL_LOW(PG12) | \
1041  PIN_ODR_LEVEL_LOW(PG13) | \
1042  PIN_ODR_LEVEL_LOW(PG14) | \
1043  PIN_ODR_LEVEL_LOW(PG15))
1044 
1045 #define VAL_GPIOG_AFRL (PIN_AFIO_AF(PG00, 0) | \
1046  PIN_AFIO_AF(PG01, 0) | \
1047  PIN_AFIO_AF(PG02, 0) | \
1048  PIN_AFIO_AF(PG03, 0) | \
1049  PIN_AFIO_AF(PG04, 0) | \
1050  PIN_AFIO_AF(PG05, 0) | \
1051  PIN_AFIO_AF(PG06, 0) | \
1052  PIN_AFIO_AF(PG07, 0))
1053 
1054 #define VAL_GPIOG_AFRH (PIN_AFIO_AF(PG08, 0) | \
1055  PIN_AFIO_AF(PG09, 0) | \
1056  PIN_AFIO_AF(PG10, 0) | \
1057  PIN_AFIO_AF(PG11, 0) | \
1058  PIN_AFIO_AF(PG12, 0) | \
1059  PIN_AFIO_AF(PG13, 0) | \
1060  PIN_AFIO_AF(PG14, 0) | \
1061  PIN_AFIO_AF(PG15, 0))
1062 
1063 #define VAL_GPIOH_MODER (PIN_MODE_ALTERNATE(OSC_IN) | \
1064  PIN_MODE_ALTERNATE(OSC_OUT) | \
1065  PIN_MODE_INPUT(PH02) | \
1066  PIN_MODE_INPUT(PH03) | \
1067  PIN_MODE_INPUT(PH04) | \
1068  PIN_MODE_INPUT(PH05) | \
1069  PIN_MODE_INPUT(PH06) | \
1070  PIN_MODE_INPUT(PH07) | \
1071  PIN_MODE_INPUT(PH08) | \
1072  PIN_MODE_INPUT(PH09) | \
1073  PIN_MODE_INPUT(PH10) | \
1074  PIN_MODE_INPUT(PH11) | \
1075  PIN_MODE_INPUT(PH12) | \
1076  PIN_MODE_INPUT(PH13) | \
1077  PIN_MODE_INPUT(PH14) | \
1078  PIN_MODE_INPUT(PH15))
1079 
1080 #define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(OSC_IN) | \
1081  PIN_OTYPE_PUSHPULL(OSC_OUT) | \
1082  PIN_OTYPE_PUSHPULL(PH02) | \
1083  PIN_OTYPE_PUSHPULL(PH03) | \
1084  PIN_OTYPE_PUSHPULL(PH04) | \
1085  PIN_OTYPE_PUSHPULL(PH05) | \
1086  PIN_OTYPE_PUSHPULL(PH06) | \
1087  PIN_OTYPE_PUSHPULL(PH07) | \
1088  PIN_OTYPE_PUSHPULL(PH08) | \
1089  PIN_OTYPE_PUSHPULL(PH09) | \
1090  PIN_OTYPE_PUSHPULL(PH10) | \
1091  PIN_OTYPE_PUSHPULL(PH11) | \
1092  PIN_OTYPE_PUSHPULL(PH12) | \
1093  PIN_OTYPE_PUSHPULL(PH13) | \
1094  PIN_OTYPE_PUSHPULL(PH14) | \
1095  PIN_OTYPE_PUSHPULL(PH15))
1096 
1097 #define VAL_GPIOH_OSPEEDR (PIN_OSPEED_SPEED_HIGH(OSC_IN) | \
1098  PIN_OSPEED_SPEED_HIGH(OSC_OUT) | \
1099  PIN_OSPEED_SPEED_VERYLOW(PH02) | \
1100  PIN_OSPEED_SPEED_VERYLOW(PH03) | \
1101  PIN_OSPEED_SPEED_VERYLOW(PH04) | \
1102  PIN_OSPEED_SPEED_VERYLOW(PH05) | \
1103  PIN_OSPEED_SPEED_VERYLOW(PH06) | \
1104  PIN_OSPEED_SPEED_VERYLOW(PH07) | \
1105  PIN_OSPEED_SPEED_VERYLOW(PH08) | \
1106  PIN_OSPEED_SPEED_VERYLOW(PH09) | \
1107  PIN_OSPEED_SPEED_VERYLOW(PH10) | \
1108  PIN_OSPEED_SPEED_VERYLOW(PH11) | \
1109  PIN_OSPEED_SPEED_VERYLOW(PH12) | \
1110  PIN_OSPEED_SPEED_VERYLOW(PH13) | \
1111  PIN_OSPEED_SPEED_VERYLOW(PH14) | \
1112  PIN_OSPEED_SPEED_VERYLOW(PH15))
1113 
1114 #define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(OSC_IN) | \
1115  PIN_PUPDR_FLOATING(OSC_OUT) | \
1116  PIN_PUPDR_PULLDOWN(PH02) | \
1117  PIN_PUPDR_PULLDOWN(PH03) | \
1118  PIN_PUPDR_PULLDOWN(PH04) | \
1119  PIN_PUPDR_PULLDOWN(PH05) | \
1120  PIN_PUPDR_PULLDOWN(PH06) | \
1121  PIN_PUPDR_PULLDOWN(PH07) | \
1122  PIN_PUPDR_PULLDOWN(PH08) | \
1123  PIN_PUPDR_PULLDOWN(PH09) | \
1124  PIN_PUPDR_PULLDOWN(PH10) | \
1125  PIN_PUPDR_PULLDOWN(PH11) | \
1126  PIN_PUPDR_PULLDOWN(PH12) | \
1127  PIN_PUPDR_PULLDOWN(PH13) | \
1128  PIN_PUPDR_PULLDOWN(PH14) | \
1129  PIN_PUPDR_PULLDOWN(PH15))
1130 
1131 #define VAL_GPIOH_ODR (PIN_ODR_LEVEL_HIGH(OSC_IN) | \
1132  PIN_ODR_LEVEL_HIGH(OSC_OUT) | \
1133  PIN_ODR_LEVEL_LOW(PH02) | \
1134  PIN_ODR_LEVEL_LOW(PH03) | \
1135  PIN_ODR_LEVEL_LOW(PH04) | \
1136  PIN_ODR_LEVEL_LOW(PH05) | \
1137  PIN_ODR_LEVEL_LOW(PH06) | \
1138  PIN_ODR_LEVEL_LOW(PH07) | \
1139  PIN_ODR_LEVEL_LOW(PH08) | \
1140  PIN_ODR_LEVEL_LOW(PH09) | \
1141  PIN_ODR_LEVEL_LOW(PH10) | \
1142  PIN_ODR_LEVEL_LOW(PH11) | \
1143  PIN_ODR_LEVEL_LOW(PH12) | \
1144  PIN_ODR_LEVEL_LOW(PH13) | \
1145  PIN_ODR_LEVEL_LOW(PH14) | \
1146  PIN_ODR_LEVEL_LOW(PH15))
1147 
1148 #define VAL_GPIOH_AFRL (PIN_AFIO_AF(OSC_IN, 0) | \
1149  PIN_AFIO_AF(OSC_OUT, 0) | \
1150  PIN_AFIO_AF(PH02, 0) | \
1151  PIN_AFIO_AF(PH03, 0) | \
1152  PIN_AFIO_AF(PH04, 0) | \
1153  PIN_AFIO_AF(PH05, 0) | \
1154  PIN_AFIO_AF(PH06, 0) | \
1155  PIN_AFIO_AF(PH07, 0))
1156 
1157 #define VAL_GPIOH_AFRH (PIN_AFIO_AF(PH08, 0) | \
1158  PIN_AFIO_AF(PH09, 0) | \
1159  PIN_AFIO_AF(PH10, 0) | \
1160  PIN_AFIO_AF(PH11, 0) | \
1161  PIN_AFIO_AF(PH12, 0) | \
1162  PIN_AFIO_AF(PH13, 0) | \
1163  PIN_AFIO_AF(PH14, 0) | \
1164  PIN_AFIO_AF(PH15, 0))
1165 
1166 #define VAL_GPIOI_MODER (PIN_MODE_INPUT(PI00) | \
1167  PIN_MODE_INPUT(PI01) | \
1168  PIN_MODE_INPUT(PI02) | \
1169  PIN_MODE_INPUT(PI03) | \
1170  PIN_MODE_INPUT(PI04) | \
1171  PIN_MODE_INPUT(PI05) | \
1172  PIN_MODE_INPUT(PI06) | \
1173  PIN_MODE_INPUT(PI07) | \
1174  PIN_MODE_INPUT(PI08) | \
1175  PIN_MODE_INPUT(PI09) | \
1176  PIN_MODE_INPUT(PI10) | \
1177  PIN_MODE_INPUT(PI11) | \
1178  PIN_MODE_INPUT(PI12) | \
1179  PIN_MODE_INPUT(PI13) | \
1180  PIN_MODE_INPUT(PI14) | \
1181  PIN_MODE_INPUT(PI15))
1182 
1183 #define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(PI00) | \
1184  PIN_OTYPE_PUSHPULL(PI01) | \
1185  PIN_OTYPE_PUSHPULL(PI02) | \
1186  PIN_OTYPE_PUSHPULL(PI03) | \
1187  PIN_OTYPE_PUSHPULL(PI04) | \
1188  PIN_OTYPE_PUSHPULL(PI05) | \
1189  PIN_OTYPE_PUSHPULL(PI06) | \
1190  PIN_OTYPE_PUSHPULL(PI07) | \
1191  PIN_OTYPE_PUSHPULL(PI08) | \
1192  PIN_OTYPE_PUSHPULL(PI09) | \
1193  PIN_OTYPE_PUSHPULL(PI10) | \
1194  PIN_OTYPE_PUSHPULL(PI11) | \
1195  PIN_OTYPE_PUSHPULL(PI12) | \
1196  PIN_OTYPE_PUSHPULL(PI13) | \
1197  PIN_OTYPE_PUSHPULL(PI14) | \
1198  PIN_OTYPE_PUSHPULL(PI15))
1199 
1200 #define VAL_GPIOI_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PI00) | \
1201  PIN_OSPEED_SPEED_VERYLOW(PI01) | \
1202  PIN_OSPEED_SPEED_VERYLOW(PI02) | \
1203  PIN_OSPEED_SPEED_VERYLOW(PI03) | \
1204  PIN_OSPEED_SPEED_VERYLOW(PI04) | \
1205  PIN_OSPEED_SPEED_VERYLOW(PI05) | \
1206  PIN_OSPEED_SPEED_VERYLOW(PI06) | \
1207  PIN_OSPEED_SPEED_VERYLOW(PI07) | \
1208  PIN_OSPEED_SPEED_VERYLOW(PI08) | \
1209  PIN_OSPEED_SPEED_VERYLOW(PI09) | \
1210  PIN_OSPEED_SPEED_VERYLOW(PI10) | \
1211  PIN_OSPEED_SPEED_VERYLOW(PI11) | \
1212  PIN_OSPEED_SPEED_VERYLOW(PI12) | \
1213  PIN_OSPEED_SPEED_VERYLOW(PI13) | \
1214  PIN_OSPEED_SPEED_VERYLOW(PI14) | \
1215  PIN_OSPEED_SPEED_VERYLOW(PI15))
1216 
1217 #define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLDOWN(PI00) | \
1218  PIN_PUPDR_PULLDOWN(PI01) | \
1219  PIN_PUPDR_PULLDOWN(PI02) | \
1220  PIN_PUPDR_PULLDOWN(PI03) | \
1221  PIN_PUPDR_PULLDOWN(PI04) | \
1222  PIN_PUPDR_PULLDOWN(PI05) | \
1223  PIN_PUPDR_PULLDOWN(PI06) | \
1224  PIN_PUPDR_PULLDOWN(PI07) | \
1225  PIN_PUPDR_PULLDOWN(PI08) | \
1226  PIN_PUPDR_PULLDOWN(PI09) | \
1227  PIN_PUPDR_PULLDOWN(PI10) | \
1228  PIN_PUPDR_PULLDOWN(PI11) | \
1229  PIN_PUPDR_PULLDOWN(PI12) | \
1230  PIN_PUPDR_PULLDOWN(PI13) | \
1231  PIN_PUPDR_PULLDOWN(PI14) | \
1232  PIN_PUPDR_PULLDOWN(PI15))
1233 
1234 #define VAL_GPIOI_ODR (PIN_ODR_LEVEL_LOW(PI00) | \
1235  PIN_ODR_LEVEL_LOW(PI01) | \
1236  PIN_ODR_LEVEL_LOW(PI02) | \
1237  PIN_ODR_LEVEL_LOW(PI03) | \
1238  PIN_ODR_LEVEL_LOW(PI04) | \
1239  PIN_ODR_LEVEL_LOW(PI05) | \
1240  PIN_ODR_LEVEL_LOW(PI06) | \
1241  PIN_ODR_LEVEL_LOW(PI07) | \
1242  PIN_ODR_LEVEL_LOW(PI08) | \
1243  PIN_ODR_LEVEL_LOW(PI09) | \
1244  PIN_ODR_LEVEL_LOW(PI10) | \
1245  PIN_ODR_LEVEL_LOW(PI11) | \
1246  PIN_ODR_LEVEL_LOW(PI12) | \
1247  PIN_ODR_LEVEL_LOW(PI13) | \
1248  PIN_ODR_LEVEL_LOW(PI14) | \
1249  PIN_ODR_LEVEL_LOW(PI15))
1250 
1251 #define VAL_GPIOI_AFRL (PIN_AFIO_AF(PI00, 0) | \
1252  PIN_AFIO_AF(PI01, 0) | \
1253  PIN_AFIO_AF(PI02, 0) | \
1254  PIN_AFIO_AF(PI03, 0) | \
1255  PIN_AFIO_AF(PI04, 0) | \
1256  PIN_AFIO_AF(PI05, 0) | \
1257  PIN_AFIO_AF(PI06, 0) | \
1258  PIN_AFIO_AF(PI07, 0))
1259 
1260 #define VAL_GPIOI_AFRH (PIN_AFIO_AF(PI08, 0) | \
1261  PIN_AFIO_AF(PI09, 0) | \
1262  PIN_AFIO_AF(PI10, 0) | \
1263  PIN_AFIO_AF(PI11, 0) | \
1264  PIN_AFIO_AF(PI12, 0) | \
1265  PIN_AFIO_AF(PI13, 0) | \
1266  PIN_AFIO_AF(PI14, 0) | \
1267  PIN_AFIO_AF(PI15, 0))
1268 
1269 #define VAL_GPIOJ_MODER (PIN_MODE_INPUT(PJ00) | \
1270  PIN_MODE_INPUT(PJ01) | \
1271  PIN_MODE_INPUT(PJ02) | \
1272  PIN_MODE_INPUT(PJ03) | \
1273  PIN_MODE_INPUT(PJ04) | \
1274  PIN_MODE_INPUT(PJ05) | \
1275  PIN_MODE_INPUT(PJ06) | \
1276  PIN_MODE_INPUT(PJ07) | \
1277  PIN_MODE_INPUT(PJ08) | \
1278  PIN_MODE_INPUT(PJ09) | \
1279  PIN_MODE_INPUT(PJ10) | \
1280  PIN_MODE_INPUT(PJ11) | \
1281  PIN_MODE_INPUT(PJ12) | \
1282  PIN_MODE_INPUT(PJ13) | \
1283  PIN_MODE_INPUT(PJ14) | \
1284  PIN_MODE_INPUT(PJ15))
1285 
1286 #define VAL_GPIOJ_OTYPER (PIN_OTYPE_PUSHPULL(PJ00) | \
1287  PIN_OTYPE_PUSHPULL(PJ01) | \
1288  PIN_OTYPE_PUSHPULL(PJ02) | \
1289  PIN_OTYPE_PUSHPULL(PJ03) | \
1290  PIN_OTYPE_PUSHPULL(PJ04) | \
1291  PIN_OTYPE_PUSHPULL(PJ05) | \
1292  PIN_OTYPE_PUSHPULL(PJ06) | \
1293  PIN_OTYPE_PUSHPULL(PJ07) | \
1294  PIN_OTYPE_PUSHPULL(PJ08) | \
1295  PIN_OTYPE_PUSHPULL(PJ09) | \
1296  PIN_OTYPE_PUSHPULL(PJ10) | \
1297  PIN_OTYPE_PUSHPULL(PJ11) | \
1298  PIN_OTYPE_PUSHPULL(PJ12) | \
1299  PIN_OTYPE_PUSHPULL(PJ13) | \
1300  PIN_OTYPE_PUSHPULL(PJ14) | \
1301  PIN_OTYPE_PUSHPULL(PJ15))
1302 
1303 #define VAL_GPIOJ_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PJ00) | \
1304  PIN_OSPEED_SPEED_VERYLOW(PJ01) | \
1305  PIN_OSPEED_SPEED_VERYLOW(PJ02) | \
1306  PIN_OSPEED_SPEED_VERYLOW(PJ03) | \
1307  PIN_OSPEED_SPEED_VERYLOW(PJ04) | \
1308  PIN_OSPEED_SPEED_VERYLOW(PJ05) | \
1309  PIN_OSPEED_SPEED_VERYLOW(PJ06) | \
1310  PIN_OSPEED_SPEED_VERYLOW(PJ07) | \
1311  PIN_OSPEED_SPEED_VERYLOW(PJ08) | \
1312  PIN_OSPEED_SPEED_VERYLOW(PJ09) | \
1313  PIN_OSPEED_SPEED_VERYLOW(PJ10) | \
1314  PIN_OSPEED_SPEED_VERYLOW(PJ11) | \
1315  PIN_OSPEED_SPEED_VERYLOW(PJ12) | \
1316  PIN_OSPEED_SPEED_VERYLOW(PJ13) | \
1317  PIN_OSPEED_SPEED_VERYLOW(PJ14) | \
1318  PIN_OSPEED_SPEED_VERYLOW(PJ15))
1319 
1320 #define VAL_GPIOJ_PUPDR (PIN_PUPDR_PULLDOWN(PJ00) | \
1321  PIN_PUPDR_PULLDOWN(PJ01) | \
1322  PIN_PUPDR_PULLDOWN(PJ02) | \
1323  PIN_PUPDR_PULLDOWN(PJ03) | \
1324  PIN_PUPDR_PULLDOWN(PJ04) | \
1325  PIN_PUPDR_PULLDOWN(PJ05) | \
1326  PIN_PUPDR_PULLDOWN(PJ06) | \
1327  PIN_PUPDR_PULLDOWN(PJ07) | \
1328  PIN_PUPDR_PULLDOWN(PJ08) | \
1329  PIN_PUPDR_PULLDOWN(PJ09) | \
1330  PIN_PUPDR_PULLDOWN(PJ10) | \
1331  PIN_PUPDR_PULLDOWN(PJ11) | \
1332  PIN_PUPDR_PULLDOWN(PJ12) | \
1333  PIN_PUPDR_PULLDOWN(PJ13) | \
1334  PIN_PUPDR_PULLDOWN(PJ14) | \
1335  PIN_PUPDR_PULLDOWN(PJ15))
1336 
1337 #define VAL_GPIOJ_ODR (PIN_ODR_LEVEL_LOW(PJ00) | \
1338  PIN_ODR_LEVEL_LOW(PJ01) | \
1339  PIN_ODR_LEVEL_LOW(PJ02) | \
1340  PIN_ODR_LEVEL_LOW(PJ03) | \
1341  PIN_ODR_LEVEL_LOW(PJ04) | \
1342  PIN_ODR_LEVEL_LOW(PJ05) | \
1343  PIN_ODR_LEVEL_LOW(PJ06) | \
1344  PIN_ODR_LEVEL_LOW(PJ07) | \
1345  PIN_ODR_LEVEL_LOW(PJ08) | \
1346  PIN_ODR_LEVEL_LOW(PJ09) | \
1347  PIN_ODR_LEVEL_LOW(PJ10) | \
1348  PIN_ODR_LEVEL_LOW(PJ11) | \
1349  PIN_ODR_LEVEL_LOW(PJ12) | \
1350  PIN_ODR_LEVEL_LOW(PJ13) | \
1351  PIN_ODR_LEVEL_LOW(PJ14) | \
1352  PIN_ODR_LEVEL_LOW(PJ15))
1353 
1354 #define VAL_GPIOJ_AFRL (PIN_AFIO_AF(PJ00, 0) | \
1355  PIN_AFIO_AF(PJ01, 0) | \
1356  PIN_AFIO_AF(PJ02, 0) | \
1357  PIN_AFIO_AF(PJ03, 0) | \
1358  PIN_AFIO_AF(PJ04, 0) | \
1359  PIN_AFIO_AF(PJ05, 0) | \
1360  PIN_AFIO_AF(PJ06, 0) | \
1361  PIN_AFIO_AF(PJ07, 0))
1362 
1363 #define VAL_GPIOJ_AFRH (PIN_AFIO_AF(PJ08, 0) | \
1364  PIN_AFIO_AF(PJ09, 0) | \
1365  PIN_AFIO_AF(PJ10, 0) | \
1366  PIN_AFIO_AF(PJ11, 0) | \
1367  PIN_AFIO_AF(PJ12, 0) | \
1368  PIN_AFIO_AF(PJ13, 0) | \
1369  PIN_AFIO_AF(PJ14, 0) | \
1370  PIN_AFIO_AF(PJ15, 0))
1371 
1372 #define VAL_GPIOK_MODER (PIN_MODE_INPUT(PK00) | \
1373  PIN_MODE_INPUT(PK01) | \
1374  PIN_MODE_INPUT(PK02) | \
1375  PIN_MODE_INPUT(PK03) | \
1376  PIN_MODE_INPUT(PK04) | \
1377  PIN_MODE_INPUT(PK05) | \
1378  PIN_MODE_INPUT(PK06) | \
1379  PIN_MODE_INPUT(PK07) | \
1380  PIN_MODE_INPUT(PK08) | \
1381  PIN_MODE_INPUT(PK09) | \
1382  PIN_MODE_INPUT(PK10) | \
1383  PIN_MODE_INPUT(PK11) | \
1384  PIN_MODE_INPUT(PK12) | \
1385  PIN_MODE_INPUT(PK13) | \
1386  PIN_MODE_INPUT(PK14) | \
1387  PIN_MODE_INPUT(PK15))
1388 
1389 #define VAL_GPIOK_OTYPER (PIN_OTYPE_PUSHPULL(PK00) | \
1390  PIN_OTYPE_PUSHPULL(PK01) | \
1391  PIN_OTYPE_PUSHPULL(PK02) | \
1392  PIN_OTYPE_PUSHPULL(PK03) | \
1393  PIN_OTYPE_PUSHPULL(PK04) | \
1394  PIN_OTYPE_PUSHPULL(PK05) | \
1395  PIN_OTYPE_PUSHPULL(PK06) | \
1396  PIN_OTYPE_PUSHPULL(PK07) | \
1397  PIN_OTYPE_PUSHPULL(PK08) | \
1398  PIN_OTYPE_PUSHPULL(PK09) | \
1399  PIN_OTYPE_PUSHPULL(PK10) | \
1400  PIN_OTYPE_PUSHPULL(PK11) | \
1401  PIN_OTYPE_PUSHPULL(PK12) | \
1402  PIN_OTYPE_PUSHPULL(PK13) | \
1403  PIN_OTYPE_PUSHPULL(PK14) | \
1404  PIN_OTYPE_PUSHPULL(PK15))
1405 
1406 #define VAL_GPIOK_OSPEEDR (PIN_OSPEED_SPEED_VERYLOW(PK00) | \
1407  PIN_OSPEED_SPEED_VERYLOW(PK01) | \
1408  PIN_OSPEED_SPEED_VERYLOW(PK02) | \
1409  PIN_OSPEED_SPEED_VERYLOW(PK03) | \
1410  PIN_OSPEED_SPEED_VERYLOW(PK04) | \
1411  PIN_OSPEED_SPEED_VERYLOW(PK05) | \
1412  PIN_OSPEED_SPEED_VERYLOW(PK06) | \
1413  PIN_OSPEED_SPEED_VERYLOW(PK07) | \
1414  PIN_OSPEED_SPEED_VERYLOW(PK08) | \
1415  PIN_OSPEED_SPEED_VERYLOW(PK09) | \
1416  PIN_OSPEED_SPEED_VERYLOW(PK10) | \
1417  PIN_OSPEED_SPEED_VERYLOW(PK11) | \
1418  PIN_OSPEED_SPEED_VERYLOW(PK12) | \
1419  PIN_OSPEED_SPEED_VERYLOW(PK13) | \
1420  PIN_OSPEED_SPEED_VERYLOW(PK14) | \
1421  PIN_OSPEED_SPEED_VERYLOW(PK15))
1422 
1423 #define VAL_GPIOK_PUPDR (PIN_PUPDR_PULLDOWN(PK00) | \
1424  PIN_PUPDR_PULLDOWN(PK01) | \
1425  PIN_PUPDR_PULLDOWN(PK02) | \
1426  PIN_PUPDR_PULLDOWN(PK03) | \
1427  PIN_PUPDR_PULLDOWN(PK04) | \
1428  PIN_PUPDR_PULLDOWN(PK05) | \
1429  PIN_PUPDR_PULLDOWN(PK06) | \
1430  PIN_PUPDR_PULLDOWN(PK07) | \
1431  PIN_PUPDR_PULLDOWN(PK08) | \
1432  PIN_PUPDR_PULLDOWN(PK09) | \
1433  PIN_PUPDR_PULLDOWN(PK10) | \
1434  PIN_PUPDR_PULLDOWN(PK11) | \
1435  PIN_PUPDR_PULLDOWN(PK12) | \
1436  PIN_PUPDR_PULLDOWN(PK13) | \
1437  PIN_PUPDR_PULLDOWN(PK14) | \
1438  PIN_PUPDR_PULLDOWN(PK15))
1439 
1440 #define VAL_GPIOK_ODR (PIN_ODR_LEVEL_LOW(PK00) | \
1441  PIN_ODR_LEVEL_LOW(PK01) | \
1442  PIN_ODR_LEVEL_LOW(PK02) | \
1443  PIN_ODR_LEVEL_LOW(PK03) | \
1444  PIN_ODR_LEVEL_LOW(PK04) | \
1445  PIN_ODR_LEVEL_LOW(PK05) | \
1446  PIN_ODR_LEVEL_LOW(PK06) | \
1447  PIN_ODR_LEVEL_LOW(PK07) | \
1448  PIN_ODR_LEVEL_LOW(PK08) | \
1449  PIN_ODR_LEVEL_LOW(PK09) | \
1450  PIN_ODR_LEVEL_LOW(PK10) | \
1451  PIN_ODR_LEVEL_LOW(PK11) | \
1452  PIN_ODR_LEVEL_LOW(PK12) | \
1453  PIN_ODR_LEVEL_LOW(PK13) | \
1454  PIN_ODR_LEVEL_LOW(PK14) | \
1455  PIN_ODR_LEVEL_LOW(PK15))
1456 
1457 #define VAL_GPIOK_AFRL (PIN_AFIO_AF(PK00, 0) | \
1458  PIN_AFIO_AF(PK01, 0) | \
1459  PIN_AFIO_AF(PK02, 0) | \
1460  PIN_AFIO_AF(PK03, 0) | \
1461  PIN_AFIO_AF(PK04, 0) | \
1462  PIN_AFIO_AF(PK05, 0) | \
1463  PIN_AFIO_AF(PK06, 0) | \
1464  PIN_AFIO_AF(PK07, 0))
1465 
1466 #define VAL_GPIOK_AFRH (PIN_AFIO_AF(PK08, 0) | \
1467  PIN_AFIO_AF(PK09, 0) | \
1468  PIN_AFIO_AF(PK10, 0) | \
1469  PIN_AFIO_AF(PK11, 0) | \
1470  PIN_AFIO_AF(PK12, 0) | \
1471  PIN_AFIO_AF(PK13, 0) | \
1472  PIN_AFIO_AF(PK14, 0) | \
1473  PIN_AFIO_AF(PK15, 0))
1474 
1475 #define AF_OTG_FS_DM 10U
1476 #define AF_LINE_OTG_FS_DM 10U
1477 #define AF_OTG_FS_DP 10U
1478 #define AF_LINE_OTG_FS_DP 10U
1479 #define AF_SWDIO 0U
1480 #define AF_LINE_SWDIO 0U
1481 #define AF_SWCLK 0U
1482 #define AF_LINE_SWCLK 0U
1483 #define AF_SPI1_SCK 5U
1484 #define AF_LINE_SPI1_SCK 5U
1485 #define AF_SPI1_MISO 5U
1486 #define AF_LINE_SPI1_MISO 5U
1487 #define AF_SPI1_MOSI 5U
1488 #define AF_LINE_SPI1_MOSI 5U
1489 #define AF_USART1_TX 7U
1490 #define AF_LINE_USART1_TX 7U
1491 #define AF_USART1_RX 7U
1492 #define AF_LINE_USART1_RX 7U
1493 #define AF_I2C1_SCL 4U
1494 #define AF_LINE_I2C1_SCL 4U
1495 #define AF_I2C1_SDA 4U
1496 #define AF_LINE_I2C1_SDA 4U
1497 #define AF_I2C2_SCL 4U
1498 #define AF_LINE_I2C2_SCL 4U
1499 #define AF_I2C2_SDA 4U
1500 #define AF_LINE_I2C2_SDA 4U
1501 #define AF_SDMMC1_D0 12U
1502 #define AF_LINE_SDMMC1_D0 12U
1503 #define AF_SDMMC1_D1 12U
1504 #define AF_LINE_SDMMC1_D1 12U
1505 #define AF_SDMMC1_D2 12U
1506 #define AF_LINE_SDMMC1_D2 12U
1507 #define AF_SDMMC1_D3 12U
1508 #define AF_LINE_SDMMC1_D3 12U
1509 #define AF_SDMMC1_CK 12U
1510 #define AF_LINE_SDMMC1_CK 12U
1511 #define AF_OSC32_IN 0U
1512 #define AF_LINE_OSC32_IN 0U
1513 #define AF_OSC32_OUT 0U
1514 #define AF_LINE_OSC32_OUT 0U
1515 #define AF_CAN1_RX 9U
1516 #define AF_LINE_CAN1_RX 9U
1517 #define AF_CAN1_TX 9U
1518 #define AF_LINE_CAN1_TX 9U
1519 #define AF_SDMMC1_CMD 12U
1520 #define AF_LINE_SDMMC1_CMD 12U
1521 #define AF_USART3_TX 7U
1522 #define AF_LINE_USART3_TX 7U
1523 #define AF_USART3_RX 7U
1524 #define AF_LINE_USART3_RX 7U
1525 #define AF_UART8_RX 8U
1526 #define AF_LINE_UART8_RX 8U
1527 #define AF_UART8_TX 8U
1528 #define AF_LINE_UART8_TX 8U
1529 #define AF_OSC_IN 0U
1530 #define AF_LINE_OSC_IN 0U
1531 #define AF_OSC_OUT 0U
1532 #define AF_LINE_OSC_OUT 0U
1533 
1534 
1535 #if !defined(_FROM_ASM_)
1536 #ifdef __cplusplus
1537 extern "C" {
1538 #endif
1539  void boardInit(void);
1540 #ifdef __cplusplus
1541 }
1542 #endif
1543 #endif /* _FROM_ASM_ */
1544 
void boardInit(void)
Board-specific initialization code.
Definition: board.c:122