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w5100.c
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1 /*
2  * Copyright (C) 2012 Gerard Toonstra
3  *
4  * This file is part of paparazzi.
5  *
6  * paparazzi is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2, or (at your option)
9  * any later version.
10  *
11  * paparazzi is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with paparazzi; see the file COPYING. If not, write to
18  * the Free Software Foundation, 59 Temple Place - Suite 330,
19  * Boston, MA 02111-1307, USA.
20  *
21  */
22 
28 #include "mcu_periph/sys_time.h"
30 #include "mcu_periph/spi.h"
31 #inculde "mcu_periph/gpio.h"
32 
33 #define TXBUF_BASE 0x4000
34 #define RXBUF_BASE 0x6000
35 #define SOCKETS 4
36 
37 #define CMD_SOCKET 1
38 #define TELEM_SOCKET 0
39 
40 #define SOCK_OPEN 0x01
41 #define SOCK_CLOSE 0x10
42 #define SOCK_SEND 0x20
43 #define SOCK_RECV 0x40
44 #define SNMR_UDP 0x02
45 #define SNMR_MULTI 0x80
46 #define SNIR_SEND_OK 0x10
47 #define SNIR_TIMEOUT 0x08
48 #define CH_BASE 0x0400
49 #define CH_SIZE 0x0100
50 #define SMASK 0x07FF // Tx buffer MASK
51 #define RMASK 0x07FF // Tx buffer MASK
52 
53 #define REG_MR 0x0000
54 #define REG_RX_MEM 0x001A
55 #define REG_TX_MEM 0x001B
56 
57 #define REG_GAR 0x0001
58 #define REG_SUBR 0x0005
59 #define REG_SHAR 0x0009
60 #define REG_SIPR 0x000F
61 
62 #define SOCK_MR 0x0000
63 #define SOCK_CR 0x0001
64 #define SOCK_IR 0x0002
65 #define SOCK_PORT 0x0004
66 #define SOCK_DHAR 0x0006
67 #define SOCK_DIPR 0x000C
68 #define SOCK_DPORT 0x0010
69 #define SOCK_TX_WR 0x0024
70 #define SOCK_RSR 0x0026
71 #define SOCK_RXRD 0x0028
72 
73 #ifndef W5100_SPI_DEV
74 #define W5100_SPI_DEV spi1
75 #endif
76 
77 #ifndef W5100_SLAVE_IDX
78 #define W5100_SLAVE_IDX SPI_SLAVE1
79 #endif
80 
81 #ifndef W5100_DRDY_GPIO
82 #define W5100_DRDY_GPIO GPIOB
83 #endif
84 
85 #ifndef W5100_DRDY_GPIO_PIN
86 #define W5100_DRDY_GPIO_PIN GPIO1
87 #endif
88 
92 
93 // the media access control (ethernet hardware) address for the shield.
94 static uint8_t mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
95 
96 //the IP address for the shield:
97 static uint8_t ip[] = { W5100_IP };
98 static uint8_t dest[] = { W5100_MULTICAST_IP };
99 static uint8_t subnet[] = { W5100_SUBNET };
100 static uint16_t dport = W5100_MULTICAST_PORT;
101 
102 static const uint8_t RST = 7; // Reset BIT
103 
104 uint16_t SBASE[SOCKETS]; // Tx buffer base address
105 uint16_t RBASE[SOCKETS]; // Rx buffer base address
106 static const uint16_t SSIZE = 2048; // Max Tx buffer size
107 static const uint16_t RSIZE = 2048; // Max Rx buffer size
108 
111 
112 static void w5100_close_socket( uint8_t _s );
113 static void configure_socket( uint8_t _s, uint8_t _flag, uint16_t _lport, uint16_t _dport, uint8_t *_dest );
114 static void w5100_read_data( uint8_t s, volatile uint8_t *src, volatile uint8_t *dst, uint16_t len );
115 static uint16_t w5100_read(uint16_t _addr, uint8_t *_buf, uint16_t _len);
116 
117 static inline void w5100_set(uint16_t _reg, uint8_t _val)
118 {
119  w5100_spi.output_buf[0] = 0xF0;
120  w5100_spi.output_buf[1] = _reg >> 8;
121  w5100_spi.output_buf[2] = _reg & 0xFF;
122  w5100_spi.output_buf[3] = _val;
123 
125 
126  // FIXME: no busy waiting! if really needed add a timeout!!!!
127  while(w5100_spi.status != SPITransSuccess);
128 }
129 
130 static inline uint8_t w5100_get(uint16_t _reg)
131 {
132  w5100_spi.output_buf[0] = 0x0F;
133  w5100_spi.output_buf[1] = _reg >> 8;
134  w5100_spi.output_buf[2] = _reg & 0xFF;
135 
137 
138  // FIXME: no busy waiting! if really needed add a timeout!!!!
139  while(w5100_spi.status != SPITransSuccess);
140 
141  return w5100_spi.input_buf[3];
142 }
143 
144 static inline void w5100_set_buffer(uint16_t _reg, volatile uint8_t *_buf, uint16_t _len)
145 {
146  for (int i=0; i<_len; i++) {
147  w5100_set( _reg, _buf[ i ] );
148  _reg++;
149  }
150 }
151 
152 static inline void w5100_sock_set(uint8_t _sock, uint16_t _reg, uint8_t _val) {
153  w5100_set( CH_BASE + _sock * CH_SIZE + _reg, _val );
154 }
155 
156 static inline uint8_t w5100_sock_get(uint8_t _sock, uint16_t _reg) {
157  return w5100_get( CH_BASE + _sock * CH_SIZE + _reg );
158 }
159 
160 static inline uint16_t w5100_sock_get16( uint8_t _sock, uint16_t _reg) {
161  uint16_t res = w5100_sock_get(_sock, _reg);
162  uint16_t res2 = w5100_sock_get(_sock, _reg + 1);
163  res = res << 8;
164  res2 = res2 & 0xFF;
165  res = res | res2;
166  return res;
167 }
168 
169 void w5100_init( void ) {
170 
171  // configure the SPI bus.
181 
183  chip0.curbuf = 0;
186 
187  // wait one second for proper initialization (chip getting powered up).
188  sys_time_usleep(1000000);
189 
190  // set DRDY pin
193  sys_time_usleep(200);
195 
196  // allow some time for the chip to wake up.
197  sys_time_usleep(20000);
198 
199  // write reset bit into mode register
200  w5100_set( REG_MR, 1<<RST );
201 
202  // allow some time to wake up...
203  sys_time_usleep(20000);
204 
205  // receive memory size
206  w5100_set( REG_RX_MEM, 0x55 );
207 
208  // transmit memory size
209  w5100_set( REG_TX_MEM, 0x55 );
210 
211  // Setting the required socket base addresses for reads and writes to/from sockets
212  for (int i=0; i<SOCKETS; i++) {
213  SBASE[i] = TXBUF_BASE + SSIZE * i;
214  RBASE[i] = RXBUF_BASE + RSIZE * i;
215  }
216 
217  uint8_t gateway[4];
218  gateway[0] = ip[0];
219  gateway[1] = ip[1];
220  gateway[2] = ip[2];
221  gateway[3] = 1;
222 
223  // configure gateway, subnet, mac and ip on "NIC".
224  w5100_set_buffer( REG_GAR, gateway, 4 );
228 
229  // create a socket to send telemetry through.
231 
232  // make dest zero and configure socket to receive data
233  dest[ 0 ] = 0x00;
235 }
236 
237 void w5100_transmit( uint8_t data ) {
238 
240 
241  if (temp == chip0.tx_extract_idx[ chip0.curbuf ]) {
242  // no more room in this transaction.
243  return;
244  }
245 
246  // check if in process of sending data
248  chip0.tx_insert_idx[ chip0.curbuf ] = temp;
249 }
250 
251 void w5100_send() {
252  // Now send off spi transaction.
254  uint8_t curbuf = chip0.curbuf;
255 
256  // switch to other buffer to accept more chars.
257  chip0.curbuf++;
258  if ( chip0.curbuf >= W5100_BUFFER_NUM ) {
259  chip0.curbuf = 0;
260  }
261 
263  uint16_t offset = ptr & SMASK;
264  uint16_t dstAddr = offset + SBASE[ TELEM_SOCKET ];
265 
268 
269  if (offset + len > SSIZE) {
270  // Wrap around circular buffer
271  uint16_t size = SSIZE - offset;
272  w5100_set_buffer( dstAddr, &chip0.tx_buf[curbuf][0], size );
273  w5100_set_buffer( SBASE[ TELEM_SOCKET ], &chip0.tx_buf[curbuf][0] + size, len - size);
274  }
275  else {
276  w5100_set_buffer( dstAddr, &chip0.tx_buf[curbuf][0], len);
277  }
278 
279  // Reset write pointer
280  ptr += len;
281  w5100_sock_set( TELEM_SOCKET, SOCK_TX_WR, ptr >> 8 );
282  w5100_sock_set( TELEM_SOCKET, SOCK_TX_WR+1, ptr & 0xFF );
283 
284  // send
286 
288  while ( complete != 0x00 ) {
289  complete = w5100_sock_get( TELEM_SOCKET, SOCK_CR);
290  }
291 }
292 
294  uint16_t val=0,val1=0;
295 
296  do {
297  val1 = w5100_sock_get16( _s, SOCK_RSR );
298  if (val1 != 0)
299  val = w5100_sock_get16( _s, SOCK_RSR );
300  }
301  while (val != val1);
302  return val;
303 }
304 
305 static void w5100_close_socket( uint8_t _s ) {
306  // send command to close socket
308  // clear interrupt registers
309  w5100_sock_set( _s, SOCK_IR, 0xFF );
310 }
311 
312 static void configure_socket( uint8_t _s, uint8_t _flag, uint16_t _lport, uint16_t _dport, uint8_t *_dest ) {
313  // Configure socket that receives data on 1234
314  w5100_close_socket( _s );
315  // configure type of socket
316  w5100_sock_set( _s, SOCK_MR, SNMR_UDP | _flag );
317  // configure MSB+LSB of local port number
318  w5100_sock_set( _s, SOCK_PORT, _lport >> 8 );
319  w5100_sock_set( _s, SOCK_PORT+1, _lport & 0xFF );
320  if ( _dest[0] != 0x00 ) {
321  // configure destination to send stuff to.
322  w5100_set_buffer( CH_BASE + _s * CH_SIZE + SOCK_DIPR, _dest, 4 );
323  }
324 
325  // this mac corresponds to a mac for multicasting....
326  uint8_t mac_multi[] = { 0x01, 0x00, 0x5E, 0x01, 0x01, 0x0B };
327  w5100_set_buffer( CH_BASE + _s * CH_SIZE + SOCK_DHAR, mac_multi, 6 );
328 
329  // configure destination port
330  w5100_sock_set( _s, SOCK_DPORT, _dport >> 8 );
331  w5100_sock_set( _s, SOCK_DPORT+1, _dport & 0xFF );
332 
333  // send command to open the socket
335 }
336 
338  if ( w5100_rx_size( CMD_SOCKET ) > 0 ) {
339  return TRUE;
340  }
341  return FALSE;
342 }
343 
345  uint8_t head[8];
346  uint16_t data_len=0;
347  uint16_t ptr=0;
348 
349  // Get socket read pointer
351  w5100_read_data( CMD_SOCKET, (uint8_t *)ptr, head, 0x08);
352  ptr += 8;
353  data_len = head[6];
354  data_len = (data_len << 8) + head[7];
355 
356  // read data from buffer.
357  w5100_read_data( CMD_SOCKET, (uint8_t *)ptr, buf, data_len); // data copy.
358  ptr += data_len;
359 
360  // update read pointer
361  w5100_sock_set( CMD_SOCKET, SOCK_RXRD, ptr >> 8);
362  w5100_sock_set( CMD_SOCKET, SOCK_RXRD+1, ptr & 0xFF );
363 
364  // finalize read.
366  return data_len;
367 }
368 
369 static void w5100_read_data( uint8_t s, volatile uint8_t *src, volatile uint8_t *dst, uint16_t len ) {
370  uint16_t size;
371  uint16_t src_mask;
372  uint16_t src_ptr;
373 
374  src_mask = (uint16_t)src & RMASK;
375  src_ptr = RBASE[CMD_SOCKET] + src_mask;
376 
377  if( (src_mask + len) > RSIZE ) {
378  size = RSIZE - src_mask;
379  w5100_read(src_ptr, (uint8_t *)dst, size);
380  dst += size;
381  w5100_read(RBASE[CMD_SOCKET], (uint8_t *) dst, len - size);
382  } else {
383  w5100_read(src_ptr, (uint8_t *) dst, len);
384  }
385 }
386 
387 static uint16_t w5100_read(uint16_t _addr, uint8_t *_buf, uint16_t _len)
388 {
389  for (int i=0; i<_len; i++) {
390  _buf[i] = w5100_get( _addr );
391  _addr++;
392  }
393  return _len;
394 }
395 
enum SPIBitOrder bitorder
MSB/LSB order.
Definition: spi.h:152
unsigned short uint16_t
Definition: types.h:16
volatile uint16_t tx_extract_idx[W5100_BUFFER_NUM]
Definition: w5100.h:57
uint16_t RBASE[SOCKETS]
Definition: w5100.c:105
enum SPIClockPolarity cpol
clock polarity control
Definition: spi.h:149
static void w5100_set(uint16_t _reg, uint8_t _val)
Definition: w5100.c:117
#define W5100_TX_BUFFER_SIZE
Definition: w5100.h:37
static uint8_t dest[]
Definition: w5100.c:98
static void w5100_sock_set(uint8_t _sock, uint16_t _reg, uint8_t _val)
Definition: w5100.c:152
uint8_t input_length
number of data words to read
Definition: spi.h:145
#define W5100_SLAVE_IDX
Definition: w5100.c:78
volatile uint8_t tx_buf[W5100_BUFFER_NUM][W5100_TX_BUFFER_SIZE]
Definition: w5100.h:55
static const uint16_t SSIZE
Definition: w5100.c:106
enum SPIClockPhase cpha
clock phase control
Definition: spi.h:150
volatile uint8_t work_rx[4]
Definition: w5100.h:59
#define RXBUF_BASE
Definition: w5100.c:34
#define SNMR_MULTI
Definition: w5100.c:45
struct w5100_transport w5100_tp
Definition: w5100.c:109
#define SOCK_MR
Definition: w5100.c:62
uint16_t w5100_rx_size(uint8_t _s)
Definition: w5100.c:293
static void sys_time_usleep(uint32_t us)
Busy wait, in microseconds.
Definition: sys_time_arch.h:85
void w5100_init(void)
Definition: w5100.c:169
void gpio_set(uint32_t port, uint16_t pin)
Set a gpio output to high level.
#define SOCK_CLOSE
Definition: w5100.c:41
#define SMASK
Definition: w5100.c:50
#define W5100_DRDY_GPIO
Definition: w5100.c:82
#define REG_MR
Definition: w5100.c:53
#define W5100_SPI_DEV
Definition: w5100.c:74
#define CH_BASE
Definition: w5100.c:48
#define W5100_RX_BUFFER_SIZE
Definition: w5100.h:36
#define CH_SIZE
Definition: w5100.c:49
uint8_t ck_a
Definition: w5100.c:90
#define SOCK_RECV
Definition: w5100.c:43
volatile uint8_t * input_buf
pointer to receive buffer for DMA
Definition: spi.h:143
#define SOCK_RSR
Definition: w5100.c:70
#define W5100_BUFFER_NUM
Definition: w5100.h:38
enum SPISlaveSelect select
slave selection behavior
Definition: spi.h:148
int curbuf
Definition: w5100.h:49
#define SOCK_CR
Definition: w5100.c:63
#define REG_SIPR
Definition: w5100.c:60
#define SOCK_PORT
Definition: w5100.c:65
#define FALSE
Definition: imu_chimu.h:141
uint16_t w5100_receive(uint8_t *buf, uint16_t len)
Definition: w5100.c:344
static uint8_t w5100_sock_get(uint8_t _sock, uint16_t _reg)
Definition: w5100.c:156
enum SPITransactionStatus status
Definition: spi.h:156
Architecture independent SPI (Serial Peripheral Interface) API.
static uint8_t ip[]
Definition: w5100.c:97
#define SOCK_RXRD
Definition: w5100.c:71
#define CMD_SOCKET
Definition: w5100.c:37
#define SOCK_TX_WR
Definition: w5100.c:69
#define SOCK_OPEN
Definition: w5100.c:40
volatile uint16_t tx_insert_idx[W5100_BUFFER_NUM]
Definition: w5100.h:56
Definition: spi.h:84
#define TXBUF_BASE
Definition: w5100.c:33
#define SNMR_UDP
Definition: w5100.c:44
#define REG_RX_MEM
Definition: w5100.c:54
uint8_t ck_b
Definition: w5100.c:90
enum SPIClockDiv cdiv
prescaler of main clock to use as SPI clock
Definition: spi.h:153
bool_t spi_submit(struct spi_periph *p, struct spi_transaction *t)
Submit a spi transaction.
Definition: spi_arch.c:470
Architecture independent timing functions.
#define RMASK
Definition: w5100.c:51
#define SOCK_IR
Definition: w5100.c:64
static const uint16_t RSIZE
Definition: w5100.c:107
uint16_t val[TCOUPLE_NB]
#define REG_SUBR
Definition: w5100.c:58
enum SPIDataSizeSelect dss
data transfer word size
Definition: spi.h:151
uint8_t output_length
number of data words to write
Definition: spi.h:146
static uint16_t w5100_sock_get16(uint8_t _sock, uint16_t _reg)
Definition: w5100.c:160
#define TELEM_SOCKET
Definition: w5100.c:38
enum W5100Status status
Definition: w5100.h:48
static uint16_t w5100_read(uint16_t _addr, uint8_t *_buf, uint16_t _len)
Definition: w5100.c:387
static void w5100_read_data(uint8_t s, volatile uint8_t *src, volatile uint8_t *dst, uint16_t len)
Definition: w5100.c:369
#define SOCK_DPORT
Definition: w5100.c:68
static void w5100_close_socket(uint8_t _s)
Definition: w5100.c:305
struct w5100_periph chip0
Definition: w5100.c:89
CPOL = 0.
Definition: spi.h:77
void gpio_clear(uint32_t port, uint16_t pin)
Clear a gpio output to low level.
static uint8_t subnet[]
Definition: w5100.c:99
#define TRUE
Definition: imu_chimu.h:144
uint16_t SBASE[SOCKETS]
Definition: w5100.c:104
static void w5100_set_buffer(uint16_t _reg, volatile uint8_t *_buf, uint16_t _len)
Definition: w5100.c:144
struct adc_buf * buf
Definition: adc_arch.c:586
#define SOCKETS
Definition: w5100.c:35
#define W5100_DRDY_GPIO_PIN
Definition: w5100.c:86
W5100 ethernet chip I/O.
unsigned char uint8_t
Definition: types.h:14
#define SOCK_SEND
Definition: w5100.c:42
static void gpio_setup_output(uint32_t port, uint32_t gpios)
Setup one or more pins of the given GPIO port as outputs.
Definition: gpio_arch.h:76
#define SOCK_DIPR
Definition: w5100.c:67
CPHA = 0.
Definition: spi.h:68
slave is selected before transaction and unselected after
Definition: spi.h:57
uint8_t slave_idx
slave id: SPI_SLAVE0 to SPI_SLAVE4
Definition: spi.h:147
#define REG_SHAR
Definition: w5100.c:59
struct spi_transaction w5100_spi
Definition: w5100.c:110
void w5100_send()
Definition: w5100.c:251
volatile uint8_t work_tx[4]
Definition: w5100.h:58
uint8_t w5100_rx_buf[W5100_RX_BUFFER_SIZE]
Definition: w5100.c:91
Definition: spi.h:119
static uint8_t w5100_get(uint16_t _reg)
Definition: w5100.c:130
static uint16_t dport
Definition: w5100.c:100
SPI transaction structure.
Definition: spi.h:142
void w5100_transmit(uint8_t data)
Definition: w5100.c:237
volatile uint8_t * output_buf
pointer to transmit buffer for DMA
Definition: spi.h:144
static uint8_t mac[]
Definition: w5100.c:94
#define REG_TX_MEM
Definition: w5100.c:55
#define SOCK_DHAR
Definition: w5100.c:66
#define REG_GAR
Definition: w5100.c:57
bool_t w5100_ch_available()
Definition: w5100.c:337
static const uint8_t RST
Definition: w5100.c:102
static void configure_socket(uint8_t _s, uint8_t _flag, uint16_t _lport, uint16_t _dport, uint8_t *_dest)
Definition: w5100.c:312