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adxl345_regs.h
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21 
28 #ifndef ADXL345_REGS_H
29 #define ADXL345_REGS_H
30 
32 #define ADXL345_ADDR 0xA6
33 #define ADXL345_ADDR_ALT 0x3A
34 
35 /* Registers */
36 #define ADXL345_REG_BW_RATE 0x2C
37 #define ADXL345_REG_POWER_CTL 0x2D
38 #define ADXL345_REG_INT_ENABLE 0x2E
39 #define ADXL345_REG_DATA_FORMAT 0x31
40 #define ADXL345_REG_DATA_X0 0x32
41 #define ADXL345_REG_DATA_X1 0x33
42 #define ADXL345_REG_DATA_Y0 0x34
43 #define ADXL345_REG_DATA_Y1 0x35
44 #define ADXL345_REG_DATA_Z0 0x36
45 #define ADXL345_REG_DATA_Z1 0x37
46 
60 };
61 
70 };
71 
72 /* data format bits */
73 #define ADXL345_INT_INVERT 0x20
74 #define ADXL345_FULL_RES 0x08
75 #define ADXL345_JUSTIFY_MSB 0x04
76 
77 
78 #endif /* ADXL345_REGS_H */
Adxl345Ranges
Selectable range in ADXL345_REG_DATA_FORMAT.
Definition: adxl345_regs.h:65
Adxl345Rates
Selectable data rates in ADXL345_REG_BW_RATE bandwith is always half of data rate.
Definition: adxl345_regs.h:51