Paparazzi UAS
v5.15_devel-230-gc96ce27
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px4fmu.h
Go to the documentation of this file.
1
#ifndef CONFIG_PX4FMU_5_00_H
2
#define CONFIG_PX4FMU_5_00_H
3
4
#define BOARD_PX4FMU
5
9
#include "
boards/px4fmu/chibios/v5.0/board.h
"
10
15
/*
16
* AHB_CLK
17
*/
18
#define AHB_CLK STM32_HCLK
19
20
/*
21
* LEDs
22
*/
23
#if defined(LINE_LED1)
24
#ifndef USE_LED_1
25
#define USE_LED_1 1
26
#endif
27
#define LED_1_GPIO PAL_PORT(LINE_LED1)
28
#define LED_1_GPIO_PIN PAL_PAD(LINE_LED1)
29
#define LED_1_GPIO_ON gpio_clear
30
#define LED_1_GPIO_OFF gpio_set
31
#define LED_1_AFIO_REMAP ((void)0)
32
#endif
33
34
#if defined(LINE_LED2)
35
#ifndef USE_LED_2
36
#define USE_LED_2 1
37
#endif
38
#define LED_2_GPIO PAL_PORT(LINE_LED2)
39
#define LED_2_GPIO_PIN PAL_PAD(LINE_LED2)
40
#define LED_2_GPIO_ON gpio_clear
41
#define LED_2_GPIO_OFF gpio_set
42
#define LED_2_AFIO_REMAP ((void)0)
43
#endif
44
45
#if defined(LINE_LED3)
46
#ifndef USE_LED_3
47
#define USE_LED_3 1
48
#endif
49
#define LED_3_GPIO PAL_PORT(LINE_LED3)
50
#define LED_3_GPIO_PIN PAL_PAD(LINE_LED3)
51
#define LED_3_GPIO_ON gpio_clear
52
#define LED_3_GPIO_OFF gpio_set
53
#define LED_3_AFIO_REMAP ((void)0)
54
#endif
55
56
#if defined(LINE_LED4)
57
#ifndef USE_LED_4
58
#define USE_LED_4 1
59
#endif
60
#define LED_4_GPIO PAL_PORT(LINE_LED4)
61
#define LED_4_GPIO_PIN PAL_PAD(LINE_LED4)
62
#define LED_4_GPIO_ON gpio_clear
63
#define LED_4_GPIO_OFF gpio_set
64
#define LED_4_AFIO_REMAP ((void)0)
65
#endif
66
67
/*
68
* ADCs
69
*/
70
#if defined(LINE_ADC1)
71
#ifndef USE_ADC_1
72
#define USE_ADC_1 1
73
#endif
74
#if USE_ADC_1
75
#define AD1_1_CHANNEL ADC_CHANNEL_IN0
76
#define ADC_1 AD1_1
77
#define ADC_1_GPIO_PORT PAL_PORT(LINE_ADC1)
78
#define ADC_1_GPIO_PIN PAL_PAD(LINE_ADC1)
79
#endif
80
#endif
81
82
#if defined(LINE_ADC2)
83
#ifndef USE_ADC_2
84
#define USE_ADC_2 1
85
#endif
86
#if USE_ADC_2
87
#define AD1_2_CHANNEL ADC_CHANNEL_IN1
88
#define ADC_2 AD1_2
89
#define ADC_2_GPIO_PORT PAL_PORT(LINE_ADC2)
90
#define ADC_2_GPIO_PIN PAL_PAD(LINE_ADC2)
91
#endif
92
#endif
93
94
#if defined(LINE_ADC3)
95
#ifndef USE_ADC_3
96
#define USE_ADC_3 1
97
#endif
98
#if USE_ADC_3
99
#define AD1_3_CHANNEL ADC_CHANNEL_IN2
100
#define ADC_3 AD1_3
101
#define ADC_3_GPIO_PORT PAL_PORT(LINE_ADC3)
102
#define ADC_3_GPIO_PIN PAL_PAD(LINE_ADC3)
103
#endif
104
#endif
105
106
#if defined(LINE_ADC4)
107
#ifndef USE_ADC_4
108
#define USE_ADC_4 1
109
#endif
110
#if USE_ADC_4
111
#define AD1_4_CHANNEL ADC_CHANNEL_IN3
112
#define ADC_4 AD1_4
113
#define ADC_4_GPIO_PORT PAL_PORT(LINE_ADC4)
114
#define ADC_4_GPIO_PIN PAL_PAD(LINE_ADC4)
115
#endif
116
#endif
117
118
/* allow to define ADC_CHANNEL_VSUPPLY in the airframe file*/
119
#ifndef ADC_CHANNEL_VSUPPLY
120
#define ADC_CHANNEL_VSUPPLY ADC_1
121
#endif
122
123
/* allow to define ADC_CHANNEL_CURRENT in the airframe file*/
124
#if !defined(ADC_CHANNEL_CURRENT) && !ADC_CURRENT_DISABLE
125
#define ADC_CHANNEL_CURRENT ADC_2
126
#endif
127
128
/* Default powerbrick values */
129
#define DefaultVoltageOfAdc(adc) ((3.3f/4096.0f) * 10.3208191126f * adc)
130
#define MilliAmpereOfAdc(adc) ((3.3f/4096.0f) * 24000.0f * adc)
131
132
/*
133
* PWM defines (TODO DRIVER and CHANNEL)
134
*/
135
#if defined(LINE_SERVO1)
136
#ifndef USE_PWM1
137
#define USE_PWM1 1
138
#endif
139
#if USE_PWM1
140
#define PWM_SERVO_1 0
141
#define PWM_SERVO_1_GPIO PAL_PORT(LINE_SERVO1)
142
#define PWM_SERVO_1_PIN PAL_PAD(LINE_SERVO1)
143
#define PWM_SERVO_1_AF AF_LINE_SERVO1
144
#define PWM_SERVO_1_DRIVER PWMD1
145
#define PWM_SERVO_1_CHANNEL 4-1
146
#define PWM_SERVO_1_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
147
#else
148
#define PWM_SERVO_1_ACTIVE PWM_OUTPUT_DISABLED
149
#endif
150
#endif
151
152
#if defined(LINE_SERVO2)
153
#ifndef USE_PWM2
154
#define USE_PWM2 1
155
#endif
156
#if USE_PWM2
157
#define PWM_SERVO_2 1
158
#define PWM_SERVO_2_GPIO PAL_PORT(LINE_SERVO2)
159
#define PWM_SERVO_2_PIN PAL_PAD(LINE_SERVO2)
160
#define PWM_SERVO_2_AF AF_LINE_SERVO2
161
#define PWM_SERVO_2_DRIVER PWMD1
162
#define PWM_SERVO_2_CHANNEL 3-1
163
#define PWM_SERVO_2_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
164
#else
165
#define PWM_SERVO_2_ACTIVE PWM_OUTPUT_DISABLED
166
#endif
167
#endif
168
169
#if defined(LINE_SERVO3)
170
#ifndef USE_PWM3
171
#define USE_PWM3 1
172
#endif
173
#if USE_PWM3
174
#define PWM_SERVO_3 2
175
#define PWM_SERVO_3_GPIO PAL_PORT(LINE_SERVO3)
176
#define PWM_SERVO_3_PIN PAL_PAD(LINE_SERVO3)
177
#define PWM_SERVO_3_AF AF_LINE_SERVO3
178
#define PWM_SERVO_3_DRIVER PWMD1
179
#define PWM_SERVO_3_CHANNEL 2-1
180
#define PWM_SERVO_3_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
181
#else
182
#define PWM_SERVO_3_ACTIVE PWM_OUTPUT_DISABLED
183
#endif
184
#endif
185
186
#if defined(LINE_SERVO4)
187
#ifndef USE_PWM4
188
#define USE_PWM4 1
189
#endif
190
#if USE_PWM4
191
#define PWM_SERVO_4 3
192
#define PWM_SERVO_4_GPIO PAL_PORT(LINE_SERVO4)
193
#define PWM_SERVO_4_PIN PAL_PAD(LINE_SERVO4)
194
#define PWM_SERVO_4_AF AF_LINE_SERVO4
195
#define PWM_SERVO_4_DRIVER PWMD1
196
#define PWM_SERVO_4_CHANNEL 1-1
197
#define PWM_SERVO_4_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
198
#else
199
#define PWM_SERVO_4_ACTIVE PWM_OUTPUT_DISABLED
200
#endif
201
#endif
202
203
#if defined(LINE_SERVO5)
204
#ifndef USE_PWM5
205
#define USE_PWM5 1
206
#endif
207
#if USE_PWM5
208
#define PWM_SERVO_5 4
209
#define PWM_SERVO_5_GPIO PAL_PORT(LINE_SERVO5)
210
#define PWM_SERVO_5_PIN PAL_PAD(LINE_SERVO5)
211
#define PWM_SERVO_5_AF AF_LINE_SERVO5
212
#define PWM_SERVO_5_DRIVER PWMD4
213
#define PWM_SERVO_5_CHANNEL 2-1
214
#define PWM_SERVO_5_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
215
#else
216
#define PWM_SERVO_5_ACTIVE PWM_OUTPUT_DISABLED
217
#endif
218
#endif
219
220
#if defined(LINE_SERVO6)
221
#ifndef USE_PWM6
222
#define USE_PWM6 1
223
#endif
224
#if USE_PWM6
225
#define PWM_SERVO_6 5
226
#define PWM_SERVO_6_GPIO PAL_PORT(LINE_SERVO6)
227
#define PWM_SERVO_6_PIN PAL_PAD(LINE_SERVO6)
228
#define PWM_SERVO_6_AF AF_LINE_SERVO6
229
#define PWM_SERVO_6_DRIVER PWMD4
230
#define PWM_SERVO_6_CHANNEL 3
231
#define PWM_SERVO_6_ACTIVE PWM_OUTPUT_ACTIVE_HIGH
232
#else
233
#define PWM_SERVO_6_ACTIVE PWM_OUTPUT_DISABLED
234
#endif
235
#endif
236
237
238
#ifdef STM32_PWM_USE_TIM1
239
#define PWM_CONF_TIM1 STM32_PWM_USE_TIM1
240
#else
241
#define PWM_CONF_TIM1 1
242
#endif
243
#define PWM_CONF1_DEF { \
244
PWM_FREQUENCY, \
245
PWM_FREQUENCY/TIM1_SERVO_HZ, \
246
NULL, \
247
{ \
248
{ PWM_SERVO_4_ACTIVE, NULL }, \
249
{ PWM_SERVO_3_ACTIVE, NULL }, \
250
{ PWM_SERVO_2_ACTIVE, NULL }, \
251
{ PWM_SERVO_1_ACTIVE, NULL }, \
252
}, \
253
0, \
254
0 \
255
}
256
257
#ifdef STM32_PWM_USE_TIM4
258
#define PWM_CONF_TIM4 STM32_PWM_USE_TIM4
259
#else
260
#define PWM_CONF_TIM4 1
261
#endif
262
#define PWM_CONF4_DEF { \
263
PWM_FREQUENCY, \
264
PWM_FREQUENCY/TIM4_SERVO_HZ, \
265
NULL, \
266
{ \
267
{ PWM_OUTPUT_DISABLED, NULL }, \
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{ PWM_SERVO_5_ACTIVE, NULL }, \
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{ PWM_SERVO_6_ACTIVE, NULL }, \
270
{ PWM_OUTPUT_DISABLED, NULL }, \
271
}, \
272
0, \
273
0 \
274
}
275
279
#if defined(LINE_UART1_TX)
280
#define UART1_GPIO_PORT_TX PAL_PORT(LINE_UART1_TX)
281
#define UART1_GPIO_TX PAL_PAD(LINE_UART1_TX)
282
#endif
283
#if defined(LINE_UART1_RX)
284
#define UART1_GPIO_PORT_RX PAL_PORT(LINE_UART1_RX)
285
#define UART1_GPIO_RX PAL_PAD(LINE_UART1_RX)
286
#endif
287
#if defined(AF_LINE_UART1_TX)
288
#define UART1_GPIO_AF AF_LINE_UART1_TX
289
#elif defined(AF_LINE_UART1_RX)
290
#define UART1_GPIO_AF AF_LINE_UART1_RX
291
#else
292
#define UART1_GPIO_AF ((void)0)
293
#endif
294
295
#if defined(LINE_UART2_TX)
296
#define UART2_GPIO_PORT_TX PAL_PORT(LINE_UART2_TX)
297
#define UART2_GPIO_TX PAL_PAD(LINE_UART2_TX)
298
#endif
299
#if defined(LINE_UART2_RX)
300
#define UART2_GPIO_PORT_RX PAL_PORT(LINE_UART2_RX)
301
#define UART2_GPIO_RX PAL_PAD(LINE_UART2_RX)
302
#endif
303
#if defined(AF_LINE_UART2_TX)
304
#define UART2_GPIO_AF AF_LINE_UART2_TX
305
#elif defined(AF_LINE_UART2_RX)
306
#define UART2_GPIO_AF AF_LINE_UART2_RX
307
#else
308
#define UART2_GPIO_AF ((void)0)
309
#endif
310
311
#if defined(LINE_UART3_TX)
312
#define UART3_GPIO_PORT_TX PAL_PORT(LINE_UART3_TX)
313
#define UART3_GPIO_TX PAL_PAD(LINE_UART3_TX)
314
#endif
315
#if defined(LINE_UART3_RX)
316
#define UART3_GPIO_PORT_RX PAL_PORT(LINE_UART3_RX)
317
#define UART3_GPIO_RX PAL_PAD(LINE_UART3_RX)
318
#endif
319
#if defined(AF_LINE_UART3_TX)
320
#define UART3_GPIO_AF AF_LINE_UART3_TX
321
#elif defined(AF_LINE_UART3_RX)
322
#define UART3_GPIO_AF AF_LINE_UART3_RX
323
#else
324
#define UART3_GPIO_AF ((void)0)
325
#endif
326
327
#if defined(LINE_UART4_TX)
328
#define UART4_GPIO_PORT_TX PAL_PORT(LINE_UART4_TX)
329
#define UART4_GPIO_TX PAL_PAD(LINE_UART4_TX)
330
#endif
331
#if defined(LINE_UART4_RX)
332
#define UART4_GPIO_PORT_RX PAL_PORT(LINE_UART4_RX)
333
#define UART4_GPIO_RX PAL_PAD(LINE_UART4_RX)
334
#endif
335
#if defined(AF_LINE_UART4_TX)
336
#define UART4_GPIO_AF AF_LINE_UART4_TX
337
#elif defined(AF_LINE_UART4_RX)
338
#define UART4_GPIO_AF AF_LINE_UART4_RX
339
#else
340
#define UART4_GPIO_AF ((void)0)
341
#endif
342
343
#if defined(LINE_UART5_TX)
344
#define UART5_GPIO_PORT_TX PAL_PORT(LINE_UART5_TX)
345
#define UART5_GPIO_TX PAL_PAD(LINE_UART5_TX)
346
#endif
347
#if defined(LINE_UART5_RX)
348
#define UART5_GPIO_PORT_RX PAL_PORT(LINE_UART5_RX)
349
#define UART5_GPIO_RX PAL_PAD(LINE_UART5_RX)
350
#endif
351
#if defined(AF_LINE_UART5_TX)
352
#define UART5_GPIO_AF AF_LINE_UART5_TX
353
#elif defined(AF_LINE_UART5_RX)
354
#define UART5_GPIO_AF AF_LINE_UART5_RX
355
#else
356
#define UART5_GPIO_AF ((void)0)
357
#endif
358
359
#if defined(LINE_UART6_TX)
360
#define UART6_GPIO_PORT_TX PAL_PORT(LINE_UART6_TX)
361
#define UART6_GPIO_TX PAL_PAD(LINE_UART6_TX)
362
#endif
363
#if defined(LINE_UART6_RX)
364
#define UART6_GPIO_PORT_RX PAL_PORT(LINE_UART6_RX)
365
#define UART6_GPIO_RX PAL_PAD(LINE_UART6_RX)
366
#endif
367
#if defined(AF_LINE_UART6_TX)
368
#define UART6_GPIO_AF AF_LINE_UART6_TX
369
#elif defined(AF_LINE_UART6_RX)
370
#define UART6_GPIO_AF AF_LINE_UART6_RX
371
#else
372
#define UART6_GPIO_AF ((void)0)
373
#endif
374
375
#if defined(LINE_UART7_TX)
376
#define UART7_GPIO_PORT_TX PAL_PORT(LINE_UART7_TX)
377
#define UART7_GPIO_TX PAL_PAD(LINE_UART7_TX)
378
#endif
379
#if defined(LINE_UART7_RX)
380
#define UART7_GPIO_PORT_RX PAL_PORT(LINE_UART7_RX)
381
#define UART7_GPIO_RX PAL_PAD(LINE_UART7_RX)
382
#endif
383
#if defined(AF_LINE_UART7_TX)
384
#define UART7_GPIO_AF AF_LINE_UART7_TX
385
#elif defined(AF_LINE_UART7_RX)
386
#define UART7_GPIO_AF AF_LINE_UART7_RX
387
#else
388
#define UART7_GPIO_AF ((void)0)
389
#endif
390
391
#if defined(LINE_UART8_TX)
392
#define UART8_GPIO_PORT_TX PAL_PORT(LINE_UART8_TX)
393
#define UART8_GPIO_TX PAL_PAD(LINE_UART8_TX)
394
#endif
395
#if defined(LINE_UART8_RX)
396
#define UART8_GPIO_PORT_RX PAL_PORT(LINE_UART8_RX)
397
#define UART8_GPIO_RX PAL_PAD(LINE_UART8_RX)
398
#endif
399
#if defined(AF_LINE_UART8_TX)
400
#define UART8_GPIO_AF AF_LINE_UART8_TX
401
#elif defined(AF_LINE_UART8_RX)
402
#define UART8_GPIO_AF AF_LINE_UART8_RX
403
#else
404
#define UART8_GPIO_AF ((void)0)
405
#endif
406
413
// Digital noise filter: 0 disabled, [0x1 - 0xF] enable up to n t_I2CCLK
414
#define STM32_CR1_DNF(n) ((n & 0x0f) << 8)
415
// Timing register
416
#define I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR (STM32_TIMINGR_PRESC(0U) | \
417
STM32_TIMINGR_SCLDEL(10U) | STM32_TIMINGR_SDADEL(0U) | \
418
STM32_TIMINGR_SCLH(34U) | STM32_TIMINGR_SCLL(86U))
419
#define I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR (STM32_TIMINGR_PRESC(1U) | \
420
STM32_TIMINGR_SCLDEL(9U) | STM32_TIMINGR_SDADEL(0U) | \
421
STM32_TIMINGR_SCLH(105U) | STM32_TIMINGR_SCLL(153U))
422
423
424
#ifndef I2C1_CLOCK_SPEED
425
#define I2C1_CLOCK_SPEED 400000
426
#endif
427
428
#if I2C1_CLOCK_SPEED == 400000
429
#define I2C1_CFG_DEF { \
430
.timingr = I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
431
.cr1 = STM32_CR1_DNF(0), \
432
.cr2 = 0 \
433
}
434
#elif I2C1_CLOCK_SPEED == 100000
435
#define I2C1_CFG_DEF { \
436
.timingr = I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
437
.cr1 = STM32_CR1_DNF(0), \
438
.cr2 = 0 \
439
}
440
#else
441
#error "Unknown I2C1 clock speed"
442
#endif
443
444
445
#ifndef I2C2_CLOCK_SPEED
446
#define I2C2_CLOCK_SPEED 400000
447
#endif
448
449
#if I2C2_CLOCK_SPEED == 400000
450
#define I2C2_CFG_DEF { \
451
.timingr = I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
452
.cr1 = STM32_CR1_DNF(0), \
453
.cr2 = 0 \
454
}
455
#elif I2C2_CLOCK_SPEED == 100000
456
#define I2C2_CFG_DEF { \
457
.timingr = I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
458
.cr1 = STM32_CR1_DNF(0), \
459
.cr2 = 0 \
460
}
461
#else
462
#error "Unknown I2C2 clock speed"
463
#endif
464
465
#ifndef I2C3_CLOCK_SPEED
466
#define I2C3_CLOCK_SPEED 400000
467
#endif
468
469
#if I2C3_CLOCK_SPEED == 400000
470
#define I2C3_CFG_DEF { \
471
.timingr = I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
472
.cr1 = STM32_CR1_DNF(0), \
473
.cr2 = 0 \
474
}
475
#elif I2C3_CLOCK_SPEED == 100000
476
#define I2C3_CFG_DEF { \
477
.timingr = I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
478
.cr1 = STM32_CR1_DNF(0), \
479
.cr2 = 0 \
480
}
481
#else
482
#error "Unknown I2C3 clock speed"
483
#endif
484
485
#ifndef I2C4_CLOCK_SPEED
486
#define I2C4_CLOCK_SPEED 400000
487
#endif
488
489
#if I2C4_CLOCK_SPEED == 400000
490
#define I2C4_CFG_DEF { \
491
.timingr = I2C_FAST_400KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
492
.cr1 = STM32_CR1_DNF(0), \
493
.cr2 = 0 \
494
}
495
#elif I2C4_CLOCK_SPEED == 100000
496
#define I2C4_CFG_DEF { \
497
.timingr = I2C_STD_100KHZ_DNF0_100NS_PCLK54MHZ_TIMINGR, \
498
.cr1 = STM32_CR1_DNF(0), \
499
.cr2 = 0 \
500
}
501
#else
502
#error "Unknown I2C4 clock speed"
503
#endif
504
508
#if defined(LINE_SPI1_MISO) && defined(LINE_SPI1_MOSI) && defined(LINE_SPI1_SCK)
509
#define SPI1_GPIO_PORT_MISO PAL_PORT(LINE_SPI1_MISO)
510
#define SPI1_GPIO_MISO PAL_PAD(LINE_SPI1_MISO)
511
#define SPI1_GPIO_PORT_MOSI PAL_PORT(LINE_SPI1_MOSI)
512
#define SPI1_GPIO_MOSI PAL_PAD(LINE_SPI1_MOSI)
513
#define SPI1_GPIO_PORT_SCK PAL_PORT(LINE_SPI1_SCK)
514
#define SPI1_GPIO_SCK PAL_PAD(LINE_SPI1_SCK)
515
516
#if defined(AF_LINE_SPI1_SCK)
517
#define SPI1_GPIO_AF AF_LINE_SPI1_SCK
518
#endif
519
#endif
520
521
#if defined(LINE_SPI2_MISO) && defined(LINE_SPI2_MOSI) && defined(LINE_SPI2_SCK)
522
#define SPI2_GPIO_PORT_MISO PAL_PORT(LINE_SPI2_MISO)
523
#define SPI2_GPIO_MISO PAL_PAD(LINE_SPI2_MISO)
524
#define SPI2_GPIO_PORT_MOSI PAL_PORT(LINE_SPI2_MOSI)
525
#define SPI2_GPIO_MOSI PAL_PAD(LINE_SPI2_MOSI)
526
#define SPI2_GPIO_PORT_SCK PAL_PORT(LINE_SPI2_SCK)
527
#define SPI2_GPIO_SCK PAL_PAD(LINE_SPI2_SCK)
528
529
#if defined(AF_LINE_SPI2_SCK)
530
#define SPI2_GPIO_AF AF_LINE_SPI2_SCK
531
#endif
532
#endif
533
534
#if defined(LINE_SPI3_MISO) && defined(LINE_SPI3_MOSI) && defined(LINE_SPI3_SCK)
535
#define SPI3_GPIO_PORT_MISO PAL_PORT(LINE_SPI3_MISO)
536
#define SPI3_GPIO_MISO PAL_PAD(LINE_SPI3_MISO)
537
#define SPI3_GPIO_PORT_MOSI PAL_PORT(LINE_SPI3_MOSI)
538
#define SPI3_GPIO_MOSI PAL_PAD(LINE_SPI3_MOSI)
539
#define SPI3_GPIO_PORT_SCK PAL_PORT(LINE_SPI3_SCK)
540
#define SPI3_GPIO_SCK PAL_PAD(LINE_SPI3_SCK)
541
542
#if defined(AF_LINE_SPI3_SCK)
543
#define SPI3_GPIO_AF AF_LINE_SPI3_SCK
544
#endif
545
#endif
546
547
#if defined(LINE_SPI4_MISO) && defined(LINE_SPI4_MOSI) && defined(LINE_SPI4_SCK)
548
#define SPI4_GPIO_PORT_MISO PAL_PORT(LINE_SPI4_MISO)
549
#define SPI4_GPIO_MISO PAL_PAD(LINE_SPI4_MISO)
550
#define SPI4_GPIO_PORT_MOSI PAL_PORT(LINE_SPI4_MOSI)
551
#define SPI4_GPIO_MOSI PAL_PAD(LINE_SPI4_MOSI)
552
#define SPI4_GPIO_PORT_SCK PAL_PORT(LINE_SPI4_SCK)
553
#define SPI4_GPIO_SCK PAL_PAD(LINE_SPI4_SCK)
554
555
#if defined(AF_LINE_SPI4_SCK)
556
#define SPI4_GPIO_AF AF_LINE_SPI4_SCK
557
#endif
558
#endif
559
560
#if defined(LINE_SPI5_MISO) && defined(LINE_SPI5_MOSI) && defined(LINE_SPI5_SCK)
561
#define SPI5_GPIO_PORT_MISO PAL_PORT(LINE_SPI5_MISO)
562
#define SPI5_GPIO_MISO PAL_PAD(LINE_SPI5_MISO)
563
#define SPI5_GPIO_PORT_MOSI PAL_PORT(LINE_SPI5_MOSI)
564
#define SPI5_GPIO_MOSI PAL_PAD(LINE_SPI5_MOSI)
565
#define SPI5_GPIO_PORT_SCK PAL_PORT(LINE_SPI5_SCK)
566
#define SPI5_GPIO_SCK PAL_PAD(LINE_SPI5_SCK)
567
568
#if defined(AF_LINE_SPI5_SCK)
569
#define SPI5_GPIO_AF AF_LINE_SPI5_SCK
570
#endif
571
#endif
572
573
#if defined(LINE_SPI6_MISO) && defined(LINE_SPI6_MOSI) && defined(LINE_SPI6_SCK)
574
#define SPI6_GPIO_PORT_MISO PAL_PORT(LINE_SPI6_MISO)
575
#define SPI6_GPIO_MISO PAL_PAD(LINE_SPI6_MISO)
576
#define SPI6_GPIO_PORT_MOSI PAL_PORT(LINE_SPI6_MOSI)
577
#define SPI6_GPIO_MOSI PAL_PAD(LINE_SPI6_MOSI)
578
#define SPI6_GPIO_PORT_SCK PAL_PORT(LINE_SPI6_SCK)
579
#define SPI6_GPIO_SCK PAL_PAD(LINE_SPI6_SCK)
580
581
#if defined(AF_LINE_SPI6_SCK)
582
#define SPI6_GPIO_AF AF_LINE_SPI6_SCK
583
#endif
584
#endif
585
589
#if defined(LINE_SPI_SLAVE0)
590
#define SPI_SELECT_SLAVE0_PORT PAL_PORT(LINE_SPI_SLAVE0)
591
#define SPI_SELECT_SLAVE0_PIN PAL_PAD(LINE_SPI_SLAVE0)
592
#endif
593
594
#if defined(LINE_SPI_SLAVE1)
595
#define SPI_SELECT_SLAVE1_PORT PAL_PORT(LINE_SPI_SLAVE1)
596
#define SPI_SELECT_SLAVE1_PIN PAL_PAD(LINE_SPI_SLAVE1)
597
#endif
598
599
#if defined(LINE_SPI_SLAVE2)
600
#define SPI_SELECT_SLAVE2_PORT PAL_PORT(LINE_SPI_SLAVE2)
601
#define SPI_SELECT_SLAVE2_PIN PAL_PAD(LINE_SPI_SLAVE2)
602
#endif
603
604
#if defined(LINE_SPI_SLAVE3)
605
#define SPI_SELECT_SLAVE3_PORT PAL_PORT(LINE_SPI_SLAVE3)
606
#define SPI_SELECT_SLAVE3_PIN PAL_PAD(LINE_SPI_SLAVE3)
607
#endif
608
609
#if defined(LINE_SPI_SLAVE4)
610
#define SPI_SELECT_SLAVE4_PORT PAL_PORT(LINE_SPI_SLAVE4)
611
#define SPI_SELECT_SLAVE4_PIN PAL_PAD(LINE_SPI_SLAVE4)
612
#endif
613
614
#if defined(LINE_SPI_SLAVE5)
615
#define SPI_SELECT_SLAVE5_PORT PAL_PORT(LINE_SPI_SLAVE5)
616
#define SPI_SELECT_SLAVE5_PIN PAL_PAD(LINE_SPI_SLAVE5)
617
#endif
618
619
#if defined(LINE_SPI_SLAVE6)
620
#define SPI_SELECT_SLAVE6_PORT PAL_PORT(LINE_SPI_SLAVE6)
621
#define SPI_SELECT_SLAVE6_PIN PAL_PAD(LINE_SPI_SLAVE6)
622
#endif
623
630
#ifndef USE_BARO_BOARD
631
#define USE_BARO_BOARD 1
632
#endif
633
637
#if defined(LINE_SDIO_D0) && defined(LINE_SDIO_D1) && defined(LINE_SDIO_D2) && defined(LINE_SDIO_D3) && defined(LINE_SDIO_CK) && defined(LINE_SDIO_CMD)
638
#define SDIO_D0_PORT PAL_PORT(LINE_SDIO_D0)
639
#define SDIO_D0_PIN PAL_PAD(LINE_SDIO_D0)
640
#define SDIO_D1_PORT PAL_PORT(LINE_SDIO_D1)
641
#define SDIO_D1_PIN PAL_PAD(LINE_SDIO_D1)
642
#define SDIO_D2_PORT PAL_PORT(LINE_SDIO_D2)
643
#define SDIO_D2_PIN PAL_PAD(LINE_SDIO_D2)
644
#define SDIO_D3_PORT PAL_PORT(LINE_SDIO_D3)
645
#define SDIO_D3_PIN PAL_PAD(LINE_SDIO_D3)
646
#define SDIO_CK_PORT PAL_PORT(LINE_SDIO_CK)
647
#define SDIO_CK_PIN PAL_PAD(LINE_SDIO_CK)
648
#define SDIO_CMD_PORT PAL_PORT(LINE_SDIO_CMD)
649
#define SDIO_CMD_PIN PAL_PAD(LINE_SDIO_CMD)
650
651
#if defined(AF_LINE_SDIO_CMD)
652
#define SDIO_AF AF_LINE_SDIO_CMD
653
#else
654
#define SDIO_AF ((void)0)
655
#endif
656
#endif
657
658
#if defined(LINE_USB_VBUS)
659
#define SDLOG_USB_VBUS_PORT PAL_PORT(LINE_USB_VBUS)
660
#define SDLOG_USB_VBUS_PIN PAL_PAD(LINE_USB_VBUS)
661
#endif
662
663
// bat monitoring for file closing
664
#define SDLOG_BAT_ADC ADCD1
665
#define SDLOG_BAT_CHAN AD1_1_CHANNEL
666
// usb led status
667
#define SDLOG_USB_LED 3
668
669
670
/*
671
* Actuators for fixedwing
672
*/
673
/* Default actuators driver */
674
#define DEFAULT_ACTUATORS "subsystems/actuators/actuators_pwm.h"
675
#define ActuatorDefaultSet(_x,_y) ActuatorPwmSet(_x,_y)
676
#define ActuatorsDefaultInit() ActuatorsPwmInit()
677
#define ActuatorsDefaultCommit() ActuatorsPwmCommit()
678
679
#endif
/* CONFIG_PX4FMU_4_00_H */
680
board.h
sw
airborne
boards
px4fmu
chibios
v5.0
px4fmu.h
Generated on Wed Feb 10 2021 04:33:58 for Paparazzi UAS by
1.8.8
1.8.8 
