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adc_arch.c
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2  * Copyright (C) 2010-2013 The Paparazzi Team
3  *
4  * This file is part of paparazzi.
5  *
6  * paparazzi is free software; you can redistribute it and/or modify
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10  *
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14  * GNU General Public License for more details.
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18  * the Free Software Foundation, 59 Temple Place - Suite 330,
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20  */
41 /*
42  For better understanding of timer and GPIO settings:
43 
44  Table of GPIO pins available per ADC:
45 
46  ADC1/2: ADC3:
47  C0 -> PA0 C0 -> PA0
48  C1 -> PA1 C1 -> PA1
49  C2 -> PA2 C2 -> PA2
50  C3 -> PA3 C3 -> PA3
51  C4 -> PA4 C4 -> PF6
52  C5 -> PA5 C5 -> PF7
53  C6 -> PA6 C6 -> PF8
54  C7 -> PA7 C7 -> PF9
55  C8 -> PB0 C8 -> PF10
56  C9 -> PB1
57  C10 -> PC0 C10 -> PC0
58  C11 -> PC1 C11 -> PC1
59  C12 -> PC2 C12 -> PC2
60  C13 -> PC3 C13 -> PC3
61  C14 -> PC4
62  C15 -> PC5
63 
64  Table of timers available per ADC (from libstm/src/stm32_adc.c):
65 
66  T1_TRGO: Timer1 TRGO event (ADC1, ADC2 and ADC3)
67  T1_CC4: Timer1 capture compare4 (ADC1, ADC2 and ADC3)
68  T2_TRGO: Timer2 TRGO event (ADC1 and ADC2)
69  T2_CC1: Timer2 capture compare1 (ADC1 and ADC2)
70  T3_CC4: Timer3 capture compare4 (ADC1 and ADC2)
71  T4_TRGO: Timer4 TRGO event (ADC1 and ADC2)
72  TIM8_CC4: External interrupt line 15 or Timer8 capture compare4 event (ADC1 and ADC2)
73  T4_CC3: Timer4 capture compare3 (ADC3 only)
74  T8_CC2: Timer8 capture compare2 (ADC3 only)
75  T8_CC4: Timer8 capture compare4 (ADC3 only)
76  T5_TRGO: Timer5 TRGO event (ADC3 only)
77  T5_CC4: Timer5 capture compare4 (ADC3 only)
78 
79  By setting ADC_ExternalTrigInjecConv_None, injected conversion
80  is started by software instead of external trigger for any ADC.
81 
82  Table of APB per Timer (from libstm/src/stm32_tim.c):
83 
84  RCC_APB1: TIM2, TIM3, TIM4, TIM5, TIM7 (non-advanced timers)
85  RCC_APB2: TIM1, TIM8 (advanced timers)
86 
87 */
88 
89 #include "mcu_periph/adc.h"
90 
91 #include <libopencm3/stm32/rcc.h>
92 #include <libopencm3/stm32/gpio.h>
93 #include <libopencm3/stm32/adc.h>
94 #include <libopencm3/cm3/nvic.h>
95 #include <libopencm3/stm32/timer.h>
96 #include <string.h>
97 #include "mcu_periph/gpio.h"
98 #include "mcu_arch.h"
99 #include "std.h"
100 #include BOARD_CONFIG
101 
102 
103 #ifndef NVIC_ADC_IRQ_PRIO
104 #define NVIC_ADC_IRQ_PRIO 0
105 #endif
106 
107 #if defined(STM32F1)
108 #define ADC_SAMPLE_TIME ADC_SMPR_SMP_41DOT5CYC
109 #elif defined(STM32F4)
110 #define ADC_SAMPLE_TIME ADC_SMPR_SMP_56CYC
111 #endif
112 
113 // Macros to automatically enable the correct ADC
114 
115 #if defined(AD1_1_CHANNEL) || defined(AD1_2_CHANNEL) || defined(AD1_3_CHANNEL) || defined(AD1_4_CHANNEL)
116 #ifndef USE_AD1
117 #define USE_AD1 1
118 #endif
119 #endif
120 
121 #if defined(AD2_1_CHANNEL) || defined(AD2_2_CHANNEL) || defined(AD2_3_CHANNEL) || defined(AD2_4_CHANNEL)
122 #ifndef USE_AD2
123 #define USE_AD2 1
124 #endif
125 #endif
126 
127 #if defined(STM32F4)
128 
129 #if defined(AD3_1_CHANNEL) || defined(AD3_2_CHANNEL) || defined(AD3_3_CHANNEL) || defined(AD3_4_CHANNEL)
130 #ifndef USE_AD3
131 #define USE_AD3 1
132 #endif
133 #endif
134 
135 #else // !STM32F4
136 // ADC 3 not supported on STM32F1
137 #undef USE_AD3
138 #define USE_AD3 0
139 #endif
140 
141 #if USE_AD1
142 PRINT_CONFIG_MSG("Analog to Digital Coverter 1 active")
143 #endif
144 #if USE_AD2
145 PRINT_CONFIG_MSG("Analog to Digital Coverter 2 active")
146 #endif
147 #if USE_AD3
148 PRINT_CONFIG_MSG("Analog to Digital Coverter 3 active")
149 #endif
150 #if !USE_AD1 && !USE_AD2 && !USE_AD3 && !defined FBW
151 #warning ALL ADC CONVERTERS INACTIVE
152 #endif
153 
154 #ifndef ADC_TIMER_PERIOD
155 #define ADC_TIMER_PERIOD 10000
156 #endif
157 
163 #ifndef ADC_TIMER_FREQUENCY
164 #define ADC_TIMER_FREQUENCY 2000000
165 #endif
166 
167 /***************************************/
168 /*** STATIC FUNCTION PROTOTYPES ***/
169 /***************************************/
170 
171 static inline void adc_init_single(uint32_t adc, uint8_t nb_channels, uint8_t *channel_map);
172 
173 static inline void adc_push_sample(struct adc_buf *buf,
174  uint16_t sample);
175 
176 static inline void adc_init_rcc(void);
177 static inline void adc_init_irq(void);
178 
179 
180 /********************************/
181 /*** GLOBAL VARIABLES ***/
182 /********************************/
183 
184 /* Only 4 ADC channels may be enabled at the same time
185  * on each ADC, as there are only 4 injection registers.
186  * Currently, the enums adc1_channels and adc2_channels only
187  * serve to resolve the number of channels on each ADC.
188  * There are 3 separate buffer lists, each holds the addresses of the actual adc buffers
189  * for the particular adc converter.
190  */
191 
195 
196 #if USE_AD1
197 static struct adc_buf *adc1_buffers[4];
199 #endif
200 #if USE_AD2
201 static struct adc_buf *adc2_buffers[4];
203 #endif
204 #if USE_AD3
205 static struct adc_buf *adc3_buffers[4];
207 #endif
208 
209 #if USE_ADC_WATCHDOG
210 #include "mcu_periph/sys_time.h"
211 // watchdog structure with adc bank and callback
212 static struct {
213  uint32_t timeStamp;
214  uint32_t adc;
215  adc_watchdog_callback cb;
216 } adc_watchdog;
217 #endif
218 
219 /***************************************/
220 /*** PUBLIC FUNCTION DEFINITIONS ***/
221 /***************************************/
222 
223 void adc_init(void)
224 {
225 #if USE_AD1 || USE_AD2 || USE_AD3
226  uint8_t x = 0;
227 
228  // ADC channel mapping
230 #endif
231 
232  /* Init GPIO ports for ADC operation
233  */
234 #if USE_ADC_1
235  PRINT_CONFIG_MSG("Info: Using ADC_1")
237 #endif
238 #if USE_ADC_2
239  PRINT_CONFIG_MSG("Info: Using ADC_2")
241 #endif
242 #if USE_ADC_3
243  PRINT_CONFIG_MSG("Info: Using ADC_3")
245 #endif
246 #if USE_ADC_4
247  PRINT_CONFIG_MSG("Info: Using ADC_4")
249 #endif
250 #if USE_ADC_5
251  PRINT_CONFIG_MSG("Info: Using ADC_5")
253 #endif
254 #if USE_ADC_6
255  PRINT_CONFIG_MSG("Info: Using ADC_6")
257 #endif
258 #if USE_ADC_7
259  PRINT_CONFIG_MSG("Info: Using ADC_7")
260  gpio_setup_pin_analog(ADC_7_GPIO_PORT, ADC_7_GPIO_PIN);
261 #endif
262 #if USE_ADC_8
263  PRINT_CONFIG_MSG("Info: Using ADC_8")
264  gpio_setup_pin_analog(ADC_8_GPIO_PORT, ADC_8_GPIO_PIN);
265 #endif
266 #if USE_ADC_9
267  PRINT_CONFIG_MSG("Info: Using ADC_9")
268  gpio_setup_pin_analog(ADC_9_GPIO_PORT, ADC_9_GPIO_PIN);
269 #endif
270 
271  // Init clock and irq
272  adc_init_rcc();
273  adc_init_irq();
274 
275  /* If fewer than 4 channels are active, say 3, then they are placed in to
276  * injection slots 2,3 and 4 because the stm32 architecture converts injected
277  * slots 2,3 and 4 and skips slot 1 instead of logicaly converting slots 1,2
278  * and 3 and leave slot 4.
279  * EXAMPLE OF ADC EXECUTION ORDER WHEN WE HAVE SAY 2 ADC INPUTS USED on ADC1
280  * The first board adc channel ADC1_1 is mapped to injected channel 3 and ADC1_2
281  * to injected channel 4 and because the conversions start from the lowest
282  * injection channel used, 3 in our case, injected channel 3 data will be
283  * located at JDR1 and 4 to JDR2 so JDR1 = ADC1_1 and JDR2 = ADC1_2.
284  * That's why "adc_channel_map" has this descending order.
285  */
286 
287  nb_adc1_channels = 0;
288 #if USE_AD1
289 #ifdef AD1_1_CHANNEL
290  adc_channel_map[AD1_1] = AD1_1_CHANNEL;
291  nb_adc1_channels++;
292 #endif
293 #ifdef AD1_2_CHANNEL
294  adc_channel_map[AD1_2] = AD1_2_CHANNEL;
295  nb_adc1_channels++;
296 #endif
297 #ifdef AD1_3_CHANNEL
298  adc_channel_map[AD1_3] = AD1_3_CHANNEL;
299  nb_adc1_channels++;
300 #endif
301 #ifdef AD1_4_CHANNEL
302  adc_channel_map[AD1_4] = AD1_4_CHANNEL;
303  nb_adc1_channels++;
304 #endif
305  // initialize buffer pointers with 0 (not set). Buffer null pointers will be ignored in interrupt
306  // handler, which is important as there are no buffers registered at the time the ADC trigger
307  // interrupt is enabled.
308  for (x = 0; x < 4; x++) { adc1_buffers[x] = NULL; }
309  adc_init_single(ADC1, nb_adc1_channels, adc_channel_map);
310 #endif // USE_AD1
311 
312 
313  nb_adc2_channels = 0;
314 #if USE_AD2
315 #ifdef AD2_1_CHANNEL
316  adc_channel_map[AD2_1 - nb_adc1_channels] = AD2_1_CHANNEL;
317  nb_adc2_channels++;
318 #endif
319 #ifdef AD2_2_CHANNEL
320  adc_channel_map[AD2_2 - nb_adc1_channels] = AD2_2_CHANNEL;
321  nb_adc2_channels++;
322 #endif
323 #ifdef AD2_3_CHANNEL
324  adc_channel_map[AD2_3 - nb_adc1_channels] = AD2_3_CHANNEL;
325  nb_adc2_channels++;
326 #endif
327 #ifdef AD2_4_CHANNEL
328  adc_channel_map[AD2_4 - nb_adc1_channels] = AD2_4_CHANNEL;
329  nb_adc2_channels++;
330 #endif
331  // initialize buffer pointers with 0 (not set). Buffer null pointers will be ignored in interrupt
332  // handler, which is important as there are no buffers registered at the time the ADC trigger
333  // interrupt is enabled.
334  for (x = 0; x < 4; x++) { adc2_buffers[x] = NULL; }
335  adc_init_single(ADC2, nb_adc2_channels, adc_channel_map);
336 #endif // USE_AD2
337 
338 
339  nb_adc3_channels = 0;
340 #if USE_AD3
341 #ifdef AD3_1_CHANNEL
342  adc_channel_map[AD3_1 - nb_adc1_channels - nb_adc2_channels] = AD3_1_CHANNEL;
343  nb_adc3_channels++;
344 #endif
345 #ifdef AD3_2_CHANNEL
346  adc_channel_map[AD3_2 - nb_adc1_channels - nb_adc2_channels] = AD3_2_CHANNEL;
347  nb_adc3_channels++;
348 #endif
349 #ifdef AD3_3_CHANNEL
350  adc_channel_map[AD3_3 - nb_adc1_channels - nb_adc2_channels] = AD3_3_CHANNEL;
351  nb_adc3_channels++;
352 #endif
353 #ifdef AD3_4_CHANNEL
354  adc_channel_map[AD3_4 - nb_adc1_channels - nb_adc2_channels] = AD3_4_CHANNEL;
355  nb_adc3_channels++;
356 #endif
357  // initialize buffer pointers with 0 (not set). Buffer null pointers will be ignored in interrupt
358  // handler, which is important as there are no buffers registered at the time the ADC trigger
359  // interrupt is enabled.
360  for (x = 0; x < 4; x++) { adc3_buffers[x] = NULL; }
361  adc_init_single(ADC3, nb_adc3_channels, adc_channel_map);
362 #endif // USE_AD3
363 
364 #if USE_ADC_WATCHDOG
365  adc_watchdog.cb = NULL;
366  adc_watchdog.timeStamp = 0;
367 #endif
368 
369 }
370 
371 void adc_buf_channel(uint8_t adc_channel, struct adc_buf *s, uint8_t av_nb_sample)
372 {
373 
374  if (adc_channel < nb_adc1_channels) {
375 #if USE_AD1
376  adc1_buffers[adc_channel] = s;
377 #endif
378  } else if (adc_channel < (nb_adc1_channels + nb_adc2_channels)) {
379 #if USE_AD2
380  adc2_buffers[adc_channel - nb_adc1_channels] = s;
381 #endif
382  } else if (adc_channel < (nb_adc1_channels + nb_adc2_channels + nb_adc3_channels)) {
383 #if USE_AD3
384  adc3_buffers[adc_channel - (nb_adc1_channels + nb_adc2_channels)] = s;
385 #endif
386  }
387 
388  s->av_nb_sample = av_nb_sample;
389 
390 }
391 
392 #if USE_ADC_WATCHDOG
393 void register_adc_watchdog(uint32_t adc, uint8_t chan, uint16_t low, uint16_t high, adc_watchdog_callback cb)
394 {
395  adc_watchdog.adc = adc;
396  adc_watchdog.cb = cb;
397 
398  // activated adc watchdog of a single injected channel with interrupt
399  adc_set_watchdog_low_threshold(adc, low);
400  adc_set_watchdog_high_threshold(adc, high);
401  adc_enable_analog_watchdog_injected(adc);
402  adc_enable_analog_watchdog_on_selected_channel(adc, chan);
403  adc_enable_awd_interrupt(adc);
404 }
405 #endif
406 
407 /**************************************/
408 /*** PRIVATE FUNCTION DEFINITIONS ***/
409 /**************************************/
410 
411 #if defined(USE_AD_TIM4)
412 #define TIM_ADC TIM4
413 #define RCC_TIM_ADC RCC_TIM4
414 #elif defined(USE_AD_TIM1)
415 #define TIM_ADC TIM1
416 #define RCC_TIM_ADC RCC_TIM1
417 #else
418 #define TIM_ADC TIM2
419 #define RCC_TIM_ADC RCC_TIM2
420 #endif
421 
423 static inline void adc_init_rcc(void)
424 {
425 #if USE_AD1 || USE_AD2 || USE_AD3
426  /* Timer peripheral clock enable. */
427  rcc_periph_clock_enable(RCC_TIM_ADC);
428 #if defined(STM32F4)
429  adc_set_clk_prescale(ADC_CCR_ADCPRE_BY2);
430 #endif
431 
432  /* Enable ADC peripheral clocks. */
433 #if USE_AD1
434  rcc_periph_clock_enable(RCC_ADC1);
435 #endif
436 #if USE_AD2
437  rcc_periph_clock_enable(RCC_ADC2);
438 #endif
439 #if USE_AD3
440  rcc_periph_clock_enable(RCC_ADC3);
441 #endif
442 
443  /* Time Base configuration */
444  timer_reset(TIM_ADC);
445  timer_set_mode(TIM_ADC, TIM_CR1_CKD_CK_INT,
446  TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
447  /* timer counts with ADC_TIMER_FREQUENCY */
448  uint32_t timer_clk = timer_get_frequency(TIM_ADC);
449  timer_set_prescaler(TIM_ADC, (timer_clk / ADC_TIMER_FREQUENCY) - 1);
450 
451  timer_set_period(TIM_ADC, ADC_TIMER_PERIOD);
452  /* Generate TRGO on every update (when counter reaches period reload value) */
453  timer_set_master_mode(TIM_ADC, TIM_CR2_MMS_UPDATE);
454  timer_enable_counter(TIM_ADC);
455 
456 #endif // USE_AD1 || USE_AD2 || USE_AD3
457 }
458 
460 static inline void adc_init_irq(void)
461 {
462 #if defined(STM32F1)
463  nvic_set_priority(NVIC_ADC1_2_IRQ, NVIC_ADC_IRQ_PRIO);
464  nvic_enable_irq(NVIC_ADC1_2_IRQ);
465 #elif defined(STM32F4)
466  nvic_set_priority(NVIC_ADC_IRQ, NVIC_ADC_IRQ_PRIO);
467  nvic_enable_irq(NVIC_ADC_IRQ);
468 #endif
469 }
470 
471 
472 static inline void adc_init_single(uint32_t adc, uint8_t nb_channels, uint8_t *channel_map)
473 {
474  // Paranoia, must be down for 2+ ADC clock cycles before calibration
475  adc_off(adc);
476 
477  /* Configure ADC */
478  /* Explicitly setting most registers, reset/default values are correct for most */
479  /* Set CR1 register. */
480  /* Clear AWDEN */
481  adc_disable_analog_watchdog_regular(adc);
482  /* Clear JAWDEN */
483  adc_disable_analog_watchdog_injected(adc);
484  /* Clear DISCEN */
485  adc_disable_discontinuous_mode_regular(adc);
486  /* Clear JDISCEN */
487  adc_disable_discontinuous_mode_injected(adc);
488  /* Clear JAUTO */
489  adc_disable_automatic_injected_group_conversion(adc);
490  /* Set SCAN */
491  adc_enable_scan_mode(adc);
492  /* Enable ADC<X> JEOC interrupt (Set JEOCIE) */
493  adc_enable_eoc_interrupt_injected(adc);
494  /* Clear AWDIE */
495  adc_disable_awd_interrupt(adc);
496  /* Clear EOCIE */
497  adc_disable_eoc_interrupt(adc);
498 
499  /* Set CR2 register. */
500  /* Clear TSVREFE */
501 #if defined(STM32F1)
502  adc_disable_temperature_sensor(adc);
503 #elif defined(STM32F4)
504  adc_disable_temperature_sensor();
505 #endif
506  /* Clear EXTTRIG */
507  adc_disable_external_trigger_regular(adc);
508  /* Clear ALIGN */
509  adc_set_right_aligned(adc);
510  /* Clear DMA */
511  adc_disable_dma(adc);
512  /* Clear CONT */
513  adc_set_single_conversion_mode(adc);
514 
515  //uint8_t x = 0;
516  //for (x = 0; x < nb_channels; x++) {
517  // adc_set_sample_time(adc, channel_map[x], ADC_SAMPLE_TIME);
518  //}
519  adc_set_sample_time_on_all_channels(adc, ADC_SAMPLE_TIME);
520 
521  adc_set_injected_sequence(adc, nb_channels, channel_map);
522 
523 #if USE_AD_TIM4
524  PRINT_CONFIG_MSG("Info: Using TIM4 for ADC")
525 #if defined(STM32F1)
526  adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM4_TRGO);
527 #elif defined(STM32F4)
528  adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM4_TRGO, ADC_CR2_JEXTEN_BOTH_EDGES);
529 #endif
530 #elif USE_AD_TIM1
531  PRINT_CONFIG_MSG("Info: Using TIM1 for ADC")
532 #if defined(STM32F1)
533  adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM1_TRGO);
534 #elif defined(STM32F4)
535  adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM1_TRGO, ADC_CR2_JEXTEN_BOTH_EDGES);
536 #endif
537 #else
538  PRINT_CONFIG_MSG("Info: Using default TIM2 for ADC")
539 #if defined(STM32F1)
540  adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM2_TRGO);
541 #elif defined(STM32F4)
542  adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM2_TRGO, ADC_CR2_JEXTEN_BOTH_EDGES);
543 #endif
544 #endif
545 
546  /* Enable ADC<X> */
547  adc_power_on(adc);
548 #if defined(STM32F1)
549  /* Enable ADC<X> reset calibaration register */
550  adc_reset_calibration(adc);
551  /* Check the end of ADC<X> reset calibration */
552  while ((ADC_CR2(adc) & ADC_CR2_RSTCAL) != 0);
553  /* Start ADC<X> calibaration */
554  adc_calibration(adc);
555  /* Check the end of ADC<X> calibration */
556  while ((ADC_CR2(adc) & ADC_CR2_CAL) != 0);
557 #endif
558 
559  return;
560 } // adc_init_single
561 
562 
563 static inline void adc_push_sample(struct adc_buf *buf, uint16_t value)
564 {
565  uint8_t new_head = buf->head + 1;
566 
567  if (new_head >= buf->av_nb_sample) {
568  new_head = 0;
569  }
570  buf->sum -= buf->values[new_head];
571  buf->values[new_head] = value;
572  buf->sum += value;
573  buf->head = new_head;
574 }
575 
576 /*********************************/
577 /*** ADC INTERRUPT HANDLER ***/
578 /*********************************/
579 
580 #if defined(STM32F1)
581 void adc1_2_isr(void)
582 #elif defined(STM32F4)
583 void adc_isr(void)
584 #endif
585 {
586 #if USE_AD1 || USE_AD2 || USE_AD3
587  uint8_t channel = 0;
588  uint16_t value = 0;
589  struct adc_buf *buf;
590 #endif
591 
592 #if USE_ADC_WATCHDOG
593  /*
594  We need adc sampling fast enough to detect battery plug out, but we did not
595  need to get actual actual value so fast. So timer fire adc conversion fast,
596  at least 500 hz, but we inject adc value in sampling buffer only at 50hz
597  */
598  const uint32_t timeStampDiff = get_sys_time_msec() - adc_watchdog.timeStamp;
599  const bool shouldAccumulateValue = timeStampDiff > 20;
600  if (shouldAccumulateValue) {
601  adc_watchdog.timeStamp = get_sys_time_msec();
602  }
603 
604  if (adc_watchdog.cb != NULL) {
605  if (adc_awd(adc_watchdog.adc)) {
606  ADC_SR(adc_watchdog.adc) &= ~ADC_SR_AWD; // clear int flag
607  adc_watchdog.cb();
608  }
609  }
610 #endif
611 
612 #if USE_AD1
613  // Clear Injected End Of Conversion
614  if (adc_eoc_injected(ADC1)) {
615  ADC_SR(ADC1) &= ~ADC_SR_JEOC;
616 #if USE_ADC_WATCHDOG
617  if (shouldAccumulateValue) {
618 #endif
619  for (channel = 0; channel < nb_adc1_channels; channel++) {
620  buf = adc1_buffers[channel];
621  if (buf) {
622  value = adc_read_injected(ADC1, channel + 1);
623  adc_push_sample(buf, value);
624  }
625  }
626 #if USE_ADC_WATCHDOG
627  }
628 #endif
629  }
630 #endif // USE_AD1
631 
632 #if USE_AD2
633  if (adc_eoc_injected(ADC2)) {
634  ADC_SR(ADC2) &= ~ADC_SR_JEOC;
635 #if USE_ADC_WATCHDOG
636  if (shouldAccumulateValue) {
637 #endif
638  for (channel = 0; channel < nb_adc2_channels; channel++) {
639  buf = adc2_buffers[channel];
640  if (buf) {
641  value = adc_read_injected(ADC2, channel + 1);
642  adc_push_sample(buf, value);
643  }
644  }
645 #if USE_ADC_WATCHDOG
646  }
647 #endif
648  }
649 #endif // USE_AD2
650 
651 #if USE_AD3
652  if (adc_eoc_injected(ADC3)) {
653  ADC_SR(ADC3) &= ~ADC_SR_JEOC;
654 #if USE_ADC_WATCHDOG
655  if (shouldAccumulateValue) {
656 #endif
657  for (channel = 0; channel < nb_adc3_channels; channel++) {
658  buf = adc3_buffers[channel];
659  if (buf) {
660  value = adc_read_injected(ADC3, channel + 1);
661  adc_push_sample(buf, value);
662  }
663  }
664 #if USE_ADC_WATCHDOG
665  }
666 #endif
667  }
668 #endif // USE_AD3
669 
670  return;
671 }
uint8_t av_nb_sample
Definition: adc.h:57
#define ADC1
Definition: LPC21xx.h:370
unsigned short uint16_t
Definition: types.h:16
static void adc_init_single(uint32_t adc, uint8_t nb_channels, uint8_t *channel_map)
Definition: adc_arch.c:472
#define ADC_4_GPIO_PIN
Definition: board.h:758
#define AD3_2_CHANNEL
uint32_t get_sys_time_msec(void)
Definition: sys_time_arch.c:78
#define AD1_1_CHANNEL
Definition: cjmcu.h:62
Some architecture independent helper functions for GPIOs.
void adc_buf_channel(uint8_t adc_channel, struct adc_buf *s, uint8_t av_nb_sample)
Link between ChibiOS ADC drivers and Paparazzi adc_buffers.
Definition: adc_arch.c:265
uint32_t sum
Definition: adc.h:54
uint32_t timer_get_frequency(uint32_t timer_peripheral)
Get Timer clock frequency (before prescaling) Only valid if using the internal clock for the timer...
Definition: mcu_arch.c:258
#define ADC_6_GPIO_PIN
uint8_t head
Definition: adc.h:56
arch independent ADC (Analog to Digital Converter) API
#define ADC_5_GPIO_PORT
#define ADC_1_GPIO_PORT
Definition: cjmcu.h:64
static uint8_t nb_adc3_channels
Definition: adc_arch.c:194
#define ADC_3_GPIO_PIN
Definition: lisa_l_1.0.h:151
static struct adc_buf * adc1_buffers[ADC_NUM_CHANNELS]
Definition: adc_arch.c:133
Generic interface for all ADC hardware drivers, independent from microcontroller architecture.
Definition: adc.h:53
#define NVIC_ADC_IRQ_PRIO
Definition: adc_arch.c:104
static uint8_t nb_adc1_channels
Definition: adc_arch.c:192
static const uint8_t adc_channel_map[ADC_NUM_CHANNELS]
#endif
Definition: adc_arch.c:71
Architecture independent timing functions.
#define AD2_2_CHANNEL
unsigned long uint32_t
Definition: types.h:18
PRINT_CONFIG_MSG("USE_INS_NAV_INIT defaulting to TRUE")
void gpio_setup_pin_analog(ioportid_t port, uint16_t pin)
Setup a gpio for analog use.
Definition: gpio_arch.c:68
#define ADC_1_GPIO_PIN
Definition: cjmcu.h:65
#define AD1_4_CHANNEL
Definition: board.h:755
#define ADC_TIMER_FREQUENCY
Timer frequency for ADC Timer will trigger an update event after reaching the period reload value...
Definition: adc_arch.c:164
static void adc_push_sample(struct adc_buf *buf, uint16_t sample)
Definition: adc_arch.c:563
#define ADC_TIMER_PERIOD
Definition: adc_arch.c:155
#define ADC_4_GPIO_PORT
Definition: board.h:757
uint16_t values[MAX_AV_NB_SAMPLE]
Definition: adc.h:55
#define ADC_3_GPIO_PORT
Definition: lisa_l_1.0.h:150
#define AD3_1_CHANNEL
unsigned char uint8_t
Definition: types.h:14
#define TIM_ADC
Definition: adc_arch.c:418
static void adc_init_irq(void)
Configure and enable ADC interrupt.
Definition: adc_arch.c:460
void adc_init(void)
Adc init.
Definition: adc_arch.c:286
#define AD2_1_CHANNEL
#define ADC_6_GPIO_PORT
static uint8_t nb_adc2_channels
Definition: adc_arch.c:193
static uint8_t channel
Definition: ADS8344.c:80
#define RCC_TIM_ADC
Definition: adc_arch.c:419
#define AD1_3_CHANNEL
Definition: lisa_l_1.0.h:148
#define ADC_5_GPIO_PIN
static void adc_init_rcc(void)
Configure and enable RCC for peripherals (ADC1, ADC2, Timer)
Definition: adc_arch.c:423