Paparazzi UAS  v5.0.5_stable-7-g4b8bbb7
Paparazzi is a free software Unmanned Aircraft System.
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lcd_dogm_hw.c
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1 /*
2  * Copyright (C) 2009 ENAC
3  *
4  * This file is part of paparazzi.
5  *
6  * paparazzi is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2, or (at your option)
9  * any later version.
10  *
11  * paparazzi is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with paparazzi; see the file COPYING. If not, write to
18  * the Free Software Foundation, 59 Temple Place - Suite 330,
19  * Boston, MA 02111-1307, USA.
20  *
21  */
22 
23 #include "LPC21xx.h"
24 #include "interrupt_hw.h"
25 #include "lcd_dogm_hw.h"
26 
27 
28 static void SPI1_ISR(void) __attribute__((naked));
29 
30 #define PINSEL1_SCK (2 << 2)
31 #define PINSEL1_MOSI (2 << 6)
32 #define PINSEL1_SSEL (2 << 8)
33 
34 /* SSPCR0 settings */
35 #define SSP_DSS 0x07 << 0 /* data size : 8 bits */
36 #define SSP_FRF 0x00 << 4 /* frame format : SPI */
37 #define SSP_CPOL 0x01 << 6 /* clock polarity : idle high */
38 #define SSP_CPHA 0x01 << 7 /* clock phase : low->high */
39 #define SSP_SCR 0x1F << 8 /* serial clock rate : 29.3kHz, SSP input clock / 16 */
40 
41 /* SSPCR1 settings */
42 #define SSP_LBM 0x00 << 0 /* loopback mode : disabled */
43 #define SSP_SSE 0x00 << 1 /* SSP enable : disabled */
44 #define SSP_MS 0x00 << 2 /* master slave mode : master */
45 #define SSP_SOD 0x00 << 3 /* slave output disable : don't care when master */
46 
47 #ifndef SSPCPSR_VAL
48 #define SSPCPSR_VAL 0x04
49 #endif
50 
51 #warning "This driver should be updated to use the new SPI peripheral"
52 
53 #ifndef SPI1_VIC_SLOT
54 #define SPI1_VIC_SLOT 7
55 #endif
56 
57 void lcd_spi_tx(uint8_t data) {
58  SpiClearRti();
59  SpiEnableRti();
60  SpiEnable();
61  SSPDR = data;
62 }
63 
64 void lcd_dogm_init_hw( void ) {
65  /* setup pins for SSP (SCK, MOSI) */
67 
68  /* setup SSP */
71  SSPCPSR = SSPCPSR_VAL; /* Prescaler */
72 
73  /* SS, RS pin is output */
76  /* unselected lcd */
78 
79  /* Configure interrupt vector for SPI */
80  VICIntSelect &= ~VIC_BIT(VIC_SPI1); /* SPI1 selected as IRQ */
81  VICIntEnable = VIC_BIT(VIC_SPI1); /* SPI1 interrupt enabled */
83  _VIC_CNTL(SPI1_VIC_SLOT) = (uint32_t)SPI1_ISR; /* address of the ISR */
84 }
85 
86 void SPI1_ISR(void) {
87  ISR_ENTRY();
88 
89  while (bit_is_set(SSPSR, RNE)) {
90  uint16_t foo __attribute__ ((unused));
91  foo = SSPDR;
92  }
93  SpiClearRti(); /* clear interrupt */
94  SpiDisableRti();
95  SpiDisable ();
97 
98  VICVectAddr = 0x00000000; /* clear this interrupt from the VIC */
99  ISR_EXIT();
100 }
101 
#define VICIntSelect
Definition: LPC21xx.h:430
unsigned short uint16_t
Definition: types.h:16
#define PINSEL1_MOSI
Definition: lcd_dogm_hw.c:31
#define SSP_FRF
Definition: lcd_dogm_hw.c:36
static void SpiClearRti(struct spi_periph *p)
Definition: spi_arch.c:151
#define SSPCPSR
Definition: LPC21xx.h:226
#define _VIC_CNTL(idx)
Definition: armVIC.h:19
#define SSP_CPOL
Definition: lcd_dogm_hw.c:37
#define SSP_SCR
Definition: lcd_dogm_hw.c:39
#define SSP_MS
Definition: lcd_dogm_hw.c:44
#define SpiDisable()
#define SSPCR0
Definition: LPC21xx.h:222
static void SpiEnableRti(struct spi_periph *p)
Definition: spi_arch.c:143
#define SSP_SOD
Definition: lcd_dogm_hw.c:45
#define SSPSR
Definition: LPC21xx.h:225
#define SSP_LBM
Definition: lcd_dogm_hw.c:42
void lcd_dogm_init_hw(void)
Definition: lcd_dogm_hw.c:64
#define VICVectAddr
Definition: LPC21xx.h:436
unsigned long uint32_t
Definition: types.h:18
#define SpiEnable()
uint16_t foo
Definition: main_demo5.c:54
void lcd_spi_tx(uint8_t data)
Definition: lcd_dogm_hw.c:57
#define LCDDOGM_SS_PIN
Definition: lcd_dogm_hw.h:11
#define VIC_BIT(chan)
Definition: lpcVIC.h:105
#define SSPCPSR_VAL
Definition: lcd_dogm_hw.c:48
#define RNE
Definition: LPC21xx.h:279
unsigned char uint8_t
Definition: types.h:14
#define SSPDR
Definition: LPC21xx.h:224
#define ISR_EXIT()
Definition: armVIC.h:61
#define VICIntEnable
Definition: LPC21xx.h:431
#define PINSEL1
Definition: LPC21xx.h:348
#define lcddogmUnselect()
Definition: lcd_dogm_hw.h:31
#define VIC_SPI1
Definition: lpcVIC.h:81
#define SPI1_VIC_SLOT
Definition: lcd_dogm_hw.c:54
static void SpiDisableRti(struct spi_periph *p)
Definition: spi_arch.c:147
#define LCDDOGM_RS_IODIR
Definition: lcd_dogm_hw.h:24
#define SSP_DSS
Definition: lcd_dogm_hw.c:35
#define SSPCR1
Definition: LPC21xx.h:223
#define PINSEL1_SCK
Definition: lcd_dogm_hw.c:30
#define LCDDOGM_SS_IODIR
Definition: lcd_dogm_hw.h:20
#define LCDDOGM_RS_PIN
Definition: lcd_dogm_hw.h:14
#define ISR_ENTRY()
Definition: armVIC.h:40
static void SPI1_ISR(void)
Definition: lcd_dogm_hw.c:86
#define VIC_ENABLE
Definition: lpcVIC.h:102
#define SSP_CPHA
Definition: lcd_dogm_hw.c:38