Paparazzi UAS  v4.2.2_stable-4-gcc32f65
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imu_b2_arch.c
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1 /*
2  * $Id$
3  *
4  * Copyright (C) 20010 Antoine Drouin <poinix@gmail.com>
5  *
6  * This file is part of Paparazzi.
7  *
8  * Paparazzi is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2, or (at your option)
11  * any later version.
12  *
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14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
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20  * the Free Software Foundation, 59 Temple Place - Suite 330,
21  * Boston, MA 02111-1307, USA.
22  */
23 
24 #include "subsystems/imu.h"
25 
26 #include <stm32/gpio.h>
27 #include <stm32/rcc.h>
28 #include <stm32/spi.h>
29 #include <stm32/exti.h>
30 #include <stm32/misc.h>
31 #include <stm32/dma.h>
32 
33 #define IMU_SSP_STA_IDLE 0
34 #define IMU_SSP_STA_BUSY_MAX1168 1
35 #define IMU_SSP_STA_BUSY_MS2100 2
36 
38 
39 void dma1_c4_irq_handler(void);
40 void spi2_irq_handler(void);
41 
42 void imu_b2_arch_init(void) {
43 
44  /* Enable SPI2 Periph clock -------------------------------------------------*/
45  RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
46  /* Enable SPI_2 DMA clock ---------------------------------------------------*/
47  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
48  /* Enable PORTB GPIO clock --------------------------------------------------*/
49  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO , ENABLE);
50  /* Configure GPIOs: SCK, MISO and MOSI -------------------------------------*/
51  GPIO_InitTypeDef GPIO_InitStructure;
52  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
53  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
54  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
55  GPIO_Init(GPIOB, &GPIO_InitStructure);
56  /* Enable DMA1 channel4 IRQ Channel */
57  NVIC_InitTypeDef NVIC_init_struct = {
58  .NVIC_IRQChannel = DMA1_Channel4_IRQn,
59  .NVIC_IRQChannelPreemptionPriority = 0,
60  .NVIC_IRQChannelSubPriority = 0,
61  .NVIC_IRQChannelCmd = ENABLE
62  };
63  NVIC_Init(&NVIC_init_struct);
64  /* Enable SPI2 IRQ Channel */
65  NVIC_InitTypeDef NVIC_init_structure_spi = {
66  .NVIC_IRQChannel = SPI2_IRQn,
67  .NVIC_IRQChannelPreemptionPriority = 0,
68  .NVIC_IRQChannelSubPriority = 1,
69  .NVIC_IRQChannelCmd = ENABLE
70  };
71  NVIC_Init(&NVIC_init_structure_spi);
72 
74 }
75 
76 void imu_periodic(void) {
77  // check ssp idle
78  // ASSERT((imu_status == IMU_STA_IDLE), DEBUG_IMU, IMU_ERR_OVERUN);
81  SPI_Cmd(SPI2, ENABLE);
82  max1168_read();
83 #if IMU_B2_MAG_TYPE == IMU_B2_MAG_HMC5843
85 #endif
86 }
87 
88 /* used for spi2 */
89 void dma1_c4_irq_handler(void) {
90  switch (imu_ssp_status) {
93  SPI_Cmd(SPI2, DISABLE);
94 #if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100
95  if (ms2100_status == MS2100_IDLE) {
96  Ms2100SendReq();
98  }
100  Ms2100ReadRes();
102  }
103  else
104 #endif
106  break;
108 #if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100
109  Ms2100OnDmaIrq();
110 #endif
111  break;
112  default:
113  // POST_ERROR(DEBUG_IMU, IMU_ERR_SUPRIOUS_DMA1_C4_IRQ);
115  }
116 }
117 
118 
119 void spi2_irq_handler(void) {
120 #if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100
121  Ms2100OnSpiIrq();
122 #endif
123 }
void dma1_c4_irq_handler(void)
Definition: imu_b2_arch.c:89
#define IMU_SSP_STA_IDLE
Definition: imu_b2_arch.c:33
#define Ms2100OnDmaIrq()
Definition: ms2100_arch.h:125
void imu_periodic(void)
Definition: imu_b2_arch.c:83
volatile uint8_t imu_ssp_status
Definition: imu_b2_arch.c:27
#define Ms2100SendReq()
Definition: ms2100_arch.h:62
#define IMU_SSP_STA_BUSY_MAX1168
Definition: imu_b2_arch.c:34
#define MS2100_WAITING_EOC
Definition: ms2100.h:38
void spi2_irq_handler(void)
Definition: imu_b2_arch.c:119
#define Ms2100HasEOC()
Definition: ms2100_arch.h:39
volatile uint8_t ms2100_status
Definition: ms2100.c:26
void imu_b2_arch_init(void)
Definition: imu_b2_arch.c:42
#define IMU_SSP_STA_BUSY_MS2100
Definition: imu_b2_arch.c:35
Inertial Measurement Unit interface.
#define Max1168OnDmaIrq()
Definition: max1168_arch.h:38
unsigned char uint8_t
Definition: types.h:14
void hmc5843_periodic(void)
Definition: hmc5843.c:103
#define Ms2100OnSpiIrq()
Definition: ms2100_arch.h:143
void max1168_read(void)
Definition: max1168_arch.c:52
#define Max1168ConfigureSPI()
Definition: max1168_arch.h:55
#define MS2100_IDLE
Definition: ms2100.h:35
#define Ms2100ReadRes()
Definition: ms2100_arch.h:75