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ms2100_arch.h
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1 #ifndef MS2100_ARCH_H
2 #define MS2100_ARCH_H
3 
4 /*
5  * $Id$
6  *
7  * Copyright (C) 2010 Antoine Drouin <poinix@gmail.com>
8  *
9  * This file is part of paparazzi.
10  *
11  * paparazzi is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2, or (at your option)
14  * any later version.
15  *
16  * paparazzi is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with paparazzi; see the file COPYING. If not, write to
23  * the Free Software Foundation, 59 Temple Place - Suite 330,
24  * Boston, MA 02111-1307, USA.
25  */
26 
27 #include <stm32/gpio.h>
28 #include <stm32/spi.h>
29 
30 extern uint8_t ms2100_cur_axe;
32 
33 #define Ms2100Select() GPIOC->BRR = GPIO_Pin_12
34 #define Ms2100Unselect() GPIOC->BSRR = GPIO_Pin_12
35 
36 #define Ms2100Reset() GPIOC->BSRR = GPIO_Pin_13;
37 #define Ms2100Set() GPIOC->BRR = GPIO_Pin_13
38 
39 #define Ms2100HasEOC() GPIO_ReadInputDataBit(GPIOB, GPIO_Pin_5)
40 
41 #define Ms2100SendReq() { \
42  Ms2100Select(); \
43  __IO uint32_t nCount = 4;for(; nCount != 0; nCount--); \
44  Ms2100Reset(); \
45  ms2100_status = MS2100_SENDING_REQ; \
46  nCount = 4;for(; nCount != 0; nCount--); \
47  Ms2100Set(); \
48  uint16_t ctl_byte = ((ms2100_cur_axe+1) | (MS2100_DIVISOR << 4)); \
49  nCount = 20;for(; nCount != 0; nCount--); \
50  SPI_Cmd(SPI2, DISABLE); \
51  SPI_InitTypeDef SPI_InitStructure = { \
52  .SPI_Direction = SPI_Direction_2Lines_FullDuplex, \
53  .SPI_Mode = SPI_Mode_Master, \
54  .SPI_DataSize = SPI_DataSize_8b, \
55  .SPI_CPOL = SPI_CPOL_Low, \
56  .SPI_CPHA = SPI_CPHA_1Edge, \
57  .SPI_NSS = SPI_NSS_Soft, \
58  .SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64, \
59  .SPI_FirstBit = SPI_FirstBit_MSB, \
60  .SPI_CRCPolynomial = 7 \
61  }; \
62  SPI_Init(SPI2, &SPI_InitStructure); \
63  SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_RXNE, ENABLE); \
64  SPI_Cmd(SPI2, ENABLE); \
65  SPI_I2S_SendData(SPI2, ctl_byte); \
66  }
67 
68 #define Ms2100ReadRes() { \
69  ms2100_status = MS2100_READING_RES; \
70  Ms2100Select(); \
71  SPI_Cmd(SPI2, DISABLE); \
72  SPI_InitTypeDef SPI_InitStructure = { \
73  .SPI_Direction = SPI_Direction_2Lines_FullDuplex, \
74  .SPI_Mode = SPI_Mode_Master, \
75  .SPI_DataSize = SPI_DataSize_16b, \
76  .SPI_CPOL = SPI_CPOL_Low, \
77  .SPI_CPHA = SPI_CPHA_1Edge, \
78  .SPI_NSS = SPI_NSS_Soft, \
79  .SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64, \
80  .SPI_FirstBit = SPI_FirstBit_MSB, \
81  .SPI_CRCPolynomial = 7 \
82  }; \
83  SPI_Init(SPI2, &SPI_InitStructure); \
84  SPI_Cmd(SPI2, ENABLE); \
85  \
86  /* trigger 2 frames read */ \
87  /* SPI2_Rx_DMA_Channel configuration ------------------------------------*/ \
88  DMA_InitTypeDef DMA_InitStructure; \
89  DMA_DeInit(DMA1_Channel4); \
90  DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C); \
91  DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)(&ms2100_last_reading); \
92  DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; \
93  DMA_InitStructure.DMA_BufferSize = 1; \
94  DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; \
95  DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; \
96  DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; \
97  DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; \
98  DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; \
99  DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; \
100  DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; \
101  DMA_Init(DMA1_Channel4, &DMA_InitStructure); \
102  /* SPI2_Tx_DMA_Channel configuration ------------------------------------*/ \
103  DMA_DeInit(DMA1_Channel5); \
104  DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C); \
105  DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&ms2100_values; \
106  DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; \
107  DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; \
108  DMA_Init(DMA1_Channel5, &DMA_InitStructure); \
109  \
110  /* Enable SPI_2 Rx request */ \
111  SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, ENABLE); \
112  /* Enable DMA1 Channel4 */ \
113  DMA_Cmd(DMA1_Channel4, ENABLE); \
114  \
115  /* Enable SPI_2 Tx request */ \
116  SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE); \
117  /* Enable DMA1 Channel5 */ \
118  DMA_Cmd(DMA1_Channel5, ENABLE); \
119  \
120  /* Enable DMA1 Channel4 Transfer Complete interrupt */ \
121  DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, ENABLE); \
122  \
123  }
124 
125 #define Ms2100OnDmaIrq() { \
126  /* ASSERT((ms2100_status == MS2100_READING_RES), \
127  * DEBUG_MS2100, MS2100_ERR_SPURIOUS_DMA_IRQ); \
128  */ \
129  if (abs(ms2100_last_reading) < 1000) \
130  ms2100_values[ms2100_cur_axe] = ms2100_last_reading; \
131  Ms2100Unselect(); \
132  ms2100_cur_axe++; \
133  if (ms2100_cur_axe > 2) { \
134  ms2100_cur_axe = 0; \
135  ms2100_status = MS2100_DATA_AVAILABLE; \
136  } \
137  else \
138  ms2100_status = MS2100_IDLE; \
139  SPI_Cmd(SPI2, DISABLE); \
140  DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, DISABLE); \
141  }
142 
143 #define Ms2100OnSpiIrq() { \
144  /* ASSERT((ms2100_status == MS2100_SENDING_REQ), \
145  * DEBUG_MS2100, MS2100_ERR_SPURIOUS_SPI_IRQ); \
146  */ \
147  /* read unused control byte reply */ \
148  uint8_t foo __attribute__ ((unused)) = SPI_I2S_ReceiveData(SPI2); \
149  Ms2100Unselect(); \
150  ms2100_status = MS2100_WAITING_EOC; \
151  SPI_Cmd(SPI2, DISABLE); \
152  SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_RXNE, DISABLE); \
153  }
154 
155 #endif /* MS2100_ARCH_H */
volatile uint8_t ms2100_cur_axe
Definition: ms2100_arch.c:11
signed short int16_t
Definition: types.h:17
int16_t ms2100_last_reading
Definition: ms2100_arch.c:33
unsigned char uint8_t
Definition: types.h:14