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uart_arch.c
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1 /*
2  * Paparazzi $Id$
3  *
4  * Copyright (C) 2009 Antoine Drouin <poinix@gmail.com>
5  *
6  * This file is part of paparazzi.
7  *
8  * paparazzi is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2, or (at your option)
11  * any later version.
12  *
13  * paparazzi is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
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20  * the Free Software Foundation, 59 Temple Place - Suite 330,
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22  */
23 
24 #include "mcu_periph/uart.h"
25 
26 #include <stm32/rcc.h>
27 #include <stm32/misc.h>
28 #include <stm32/usart.h>
29 #include <stm32/gpio.h>
30 #include "std.h"
31 #include "pprz_baudrate.h"
32 
33 void uart_periph_set_baudrate(struct uart_periph* p, uint32_t baud, bool_t hw_flow_control) {
34 
35  /* Configure USART */
36  USART_InitTypeDef usart;
37  usart.USART_BaudRate = baud;
38  usart.USART_WordLength = USART_WordLength_8b;
39  usart.USART_StopBits = USART_StopBits_1;
40  usart.USART_Parity = USART_Parity_No;
41  if (hw_flow_control) {
42  usart.USART_HardwareFlowControl = USART_HardwareFlowControl_RTS_CTS;
43  }
44  else {
45  usart.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
46  }
47  usart.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
48  USART_Init(p->reg_addr, &usart);
49  /* Enable USART1 Receive interrupts */
50  USART_ITConfig(p->reg_addr, USART_IT_RXNE, ENABLE);
51 
53 
54  /* Enable the USART */
55  USART_Cmd(p->reg_addr, ENABLE);
56 
57 }
58 // TODO set_mode function
59 
60 void uart_transmit(struct uart_periph* p, uint8_t data ) {
61 
62  uint16_t temp = (p->tx_insert_idx + 1) % UART_TX_BUFFER_SIZE;
63 
64  if (temp == p->tx_extract_idx)
65  return; // no room
66 
67  USART_ITConfig(p->reg_addr, USART_IT_TXE, DISABLE);
68 
69  // check if in process of sending data
70  if (p->tx_running) { // yes, add to queue
71  p->tx_buf[p->tx_insert_idx] = data;
72  p->tx_insert_idx = temp;
73  }
74  else { // no, set running flag and write to output register
75  p->tx_running = TRUE;
76  USART_SendData(p->reg_addr, data);
77  }
78 
79  USART_ITConfig(p->reg_addr, USART_IT_TXE, ENABLE);
80 
81 }
82 
83 static inline void usart_irq_handler(struct uart_periph* p) {
84 
85  if(USART_GetITStatus(p->reg_addr, USART_IT_TXE) != RESET){
86  // check if more data to send
87  if (p->tx_insert_idx != p->tx_extract_idx) {
88  USART_SendData(p->reg_addr,p->tx_buf[p->tx_extract_idx]);
89  p->tx_extract_idx++;
91  }
92  else {
93  p->tx_running = FALSE; // clear running flag
94  USART_ITConfig(p->reg_addr, USART_IT_TXE, DISABLE);
95  }
96  }
97 
98  if(USART_GetITStatus(p->reg_addr, USART_IT_RXNE) != RESET){
99  uint16_t temp = (p->rx_insert_idx + 1) % UART_RX_BUFFER_SIZE;;
100  p->rx_buf[p->rx_insert_idx] = USART_ReceiveData(p->reg_addr);
101  // check for more room in queue
102  if (temp != p->rx_extract_idx)
103  p->rx_insert_idx = temp; // update insert index
104  }
105 
106 }
107 
108 static inline void usart_enable_irq(IRQn_Type IRQn) {
109  /* Enable USART interrupts */
110  NVIC_InitTypeDef nvic;
111  nvic.NVIC_IRQChannel = IRQn;
112  nvic.NVIC_IRQChannelPreemptionPriority = 2;
113  nvic.NVIC_IRQChannelSubPriority = 1;
114  nvic.NVIC_IRQChannelCmd = ENABLE;
115  NVIC_Init(&nvic);
116 }
117 
118 #ifdef USE_UART1
119 
120 void uart1_init( void ) {
121 
122  uart_periph_init(&uart1);
123  uart1.reg_addr = USART1;
124 
125  /* init RCC */
126  RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
127  RCC_APB2PeriphClockCmd(UART1_Periph, ENABLE);
128 
129  /* Enable USART1 interrupts */
130  usart_enable_irq(USART1_IRQn);
131 
132  /* Init GPIOS */
133  GPIO_InitTypeDef gpio;
134  /* GPIOA: GPIO_Pin_9 USART1 Tx push-pull */
135  gpio.GPIO_Pin = UART1_TxPin;
136  gpio.GPIO_Mode = GPIO_Mode_AF_PP;
137  gpio.GPIO_Speed = GPIO_Speed_50MHz;
138  GPIO_Init(UART1_TxPort, &gpio);
139  /* GPIOA: GPIO_Pin_10 USART1 Rx pin as floating input */
140  gpio.GPIO_Pin = UART1_RxPin;
141  gpio.GPIO_Mode = GPIO_Mode_IN_FLOATING;
142  GPIO_Init(UART1_RxPort, &gpio);
143 
144 #if UART1_HW_FLOW_CONTROL
145 #warning "USING UART1 HW FLOW CONTROL. Make sure to pull down CTS if you are not connecting any flow-control-capable hardware."
146  /* GPIOA: GPIO_Pin_12 USART1 Rts push-pull */
147  gpio.GPIO_Pin = UART1_RtsPin;
148  gpio.GPIO_Mode = GPIO_Mode_AF_PP;
149  gpio.GPIO_Speed = GPIO_Speed_50MHz;
150  GPIO_Init(UART1_FlowControlPort, &gpio);
151 
152  /* GPIOA: GPIO_Pin_11 USART1 Cts pin as floating input */
153  gpio.GPIO_Pin = UART1_CtsPin;
154  gpio.GPIO_Mode = GPIO_Mode_IN_FLOATING;
155  GPIO_Init(UART1_FlowControlPort, &gpio);
156 
157  /* Configure USART1, enable hardware flow control*/
158  uart_periph_set_baudrate(&uart1, UART1_BAUD, TRUE);
159 #else
160  /* Configure USART1, no flow control */
161  uart_periph_set_baudrate(&uart1, UART1_BAUD, FALSE);
162 #endif
163 }
164 
165 void usart1_irq_handler(void) { usart_irq_handler(&uart1); }
166 
167 #endif /* USE_UART1 */
168 
169 #ifdef USE_UART2
170 
171 void uart2_init( void ) {
172 
173  uart_periph_init(&uart2);
174  uart2.reg_addr = USART2;
175 
176  /* init RCC */
177  RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
178  RCC_APB2PeriphClockCmd(UART2_Periph, ENABLE);
179 
180  /* Enable USART2 interrupts */
181  usart_enable_irq(USART2_IRQn);
182 
183  /* Init GPIOS */
184  GPIO_InitTypeDef gpio;
185  /* GPIOA: GPIO_Pin_2 USART2 Tx push-pull */
186  gpio.GPIO_Pin = UART2_TxPin; // ;
187  gpio.GPIO_Mode = GPIO_Mode_AF_PP;
188  gpio.GPIO_Speed = GPIO_Speed_50MHz;
189  GPIO_Init(UART2_TxPort, &gpio);
190  /* GPIOA: GPIO_Pin_3 USART2 Rx pin as floating input */
191  gpio.GPIO_Pin = UART2_RxPin; // ;
192  gpio.GPIO_Mode = GPIO_Mode_IN_FLOATING;
193  GPIO_Init(UART2_RxPort, &gpio);
194 
195  /* Configure USART2 */
196  uart_periph_set_baudrate(&uart2, UART2_BAUD, FALSE);
197 }
198 
199 void usart2_irq_handler(void) { usart_irq_handler(&uart2); }
200 
201 #endif /* USE_UART2 */
202 
203 #ifdef USE_UART3
204 
205 void uart3_init( void ) {
206 
207  uart_periph_init(&uart3);
208  uart3.reg_addr = USART3;
209 
210  /* init RCC */
211  RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
212  RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
213  RCC_APB2PeriphClockCmd(UART3_Periph, ENABLE);
214 
215  /* Enable USART3 interrupts */
216  usart_enable_irq(USART3_IRQn);
217 
218  /* Init GPIOS */
219  GPIO_PinRemapConfig(GPIO_PartialRemap_USART3, ENABLE);
220  GPIO_InitTypeDef gpio;
221  /* GPIOC: GPIO_Pin_10 USART3 Tx push-pull */
222  gpio.GPIO_Pin = UART3_TxPin;
223  gpio.GPIO_Mode = GPIO_Mode_AF_PP;
224  gpio.GPIO_Speed = GPIO_Speed_50MHz;
225  GPIO_Init(UART3_TxPort, &gpio);
226  /* GPIOC: GPIO_Pin_11 USART3 Rx pin as floating input */
227  gpio.GPIO_Pin = UART3_RxPin;
228  gpio.GPIO_Mode = GPIO_Mode_IN_FLOATING;
229  GPIO_Init(UART3_RxPort, &gpio);
230 
231  /* Configure USART3 */
232  uart_periph_set_baudrate(&uart3, UART3_BAUD, FALSE);
233 }
234 
235 void usart3_irq_handler(void) { usart_irq_handler(&uart3); }
236 
237 #endif /* USE_UART3 */
238 
239 #ifdef USE_UART5
240 
241 void uart5_init( void ) {
242 
243  uart_periph_init(&uart5);
244  uart5.reg_addr = USART5;
245 
246  /* init RCC */
247  RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE);
248  RCC_APB2PeriphClockCmd(UART5_PeriphTx, ENABLE);
249  RCC_APB2PeriphClockCmd(UART5_PeriphRx, ENABLE);
250 
251  /* Enable UART5 interrupts */
252  usart_enable_irq(UART5_IRQn);
253 
254  /* Init GPIOS */
255  GPIO_InitTypeDef gpio;
256  /* GPIOC: GPIO_Pin_10 UART5 Tx push-pull */
257  gpio.GPIO_Pin = UART5_TxPin;
258  gpio.GPIO_Mode = GPIO_Mode_AF_PP;
259  gpio.GPIO_Speed = GPIO_Speed_50MHz;
260  GPIO_Init(UART5_TxPort, &gpio);
261  /* GPIOC: GPIO_Pin_11 UART5 Rx pin as floating input */
262  gpio.GPIO_Pin = UART5_RxPin;
263  gpio.GPIO_Mode = GPIO_Mode_IN_FLOATING;
264  GPIO_Init(UART5_RxPort, &gpio);
265 
266  /* Configure UART5 */
267  uart_periph_set_baudrate(&uart5, UART5_BAUD, FALSE);
268 }
269 
270 void usart5_irq_handler(void) { usart_irq_handler(&uart5); }
271 
272 #endif /* USE_UART5 */
unsigned short uint16_t
Definition: types.h:16
#define UART3_Periph
Definition: uart_arch.h:75
arch independent UART (Universal Asynchronous Receiver/Transmitter) API
#define UART5_RxPort
Definition: uart_arch.h:69
#define UART1_Periph
Definition: uart_arch.h:73
#define pprz_usart_set_baudrate(x, y)
Definition: pprz_baudrate.h:10
#define UART2_TxPort
Definition: uart_arch.h:62
#define UART3_TxPin
Definition: uart_arch.h:50
#define UART5_PeriphTx
Definition: uart_arch.h:76
#define UART5_TxPin
Definition: uart_arch.h:51
uint8_t tx_running
Definition: uart.h:52
void * reg_addr
Definition: uart.h:54
#define UART1_RxPin
Definition: uart_arch.h:53
uint16_t tx_extract_idx
Definition: uart.h:51
#define UART2_RxPort
Definition: uart_arch.h:67
void uart_transmit(struct uart_periph *p, uint8_t data)
Definition: uart_arch.c:65
#define UART3_RxPort
Definition: uart_arch.h:68
#define UART1_TxPin
Definition: uart_arch.h:48
#define FALSE
Definition: imu_chimu.h:141
void uart_periph_set_baudrate(struct uart_periph *p, uint32_t baud, bool_t hw_flow_control __attribute__((unused)))
Definition: uart_arch.c:59
#define UART2_Periph
Definition: uart_arch.h:74
UART peripheral.
Definition: uart.h:43
#define UART_TX_BUFFER_SIZE
Definition: uart.h:37
void uart_periph_init(struct uart_periph *p)
Definition: uart.c:47
unsigned long uint32_t
Definition: types.h:18
#define UART5_TxPort
Definition: uart_arch.h:64
static void usart_enable_irq(IRQn_Type IRQn)
Definition: uart_arch.c:108
uint16_t rx_insert_idx
Definition: uart.h:46
#define UART2_RxPin
Definition: uart_arch.h:54
#define TRUE
Definition: imu_chimu.h:144
uint8_t tx_buf[UART_TX_BUFFER_SIZE]
Definition: uart.h:49
#define UART5_PeriphRx
Definition: uart_arch.h:77
#define USART5
Definition: uart_arch.h:45
unsigned char uint8_t
Definition: types.h:14
#define UART1_CtsPin
Definition: uart_arch.h:58
#define UART2_TxPin
Definition: uart_arch.h:49
uint16_t tx_insert_idx
Definition: uart.h:50
#define UART1_FlowControlPort
Definition: uart_arch.h:71
static void usart_irq_handler(struct uart_periph *p)
Definition: uart_arch.c:83
uint8_t rx_buf[UART_RX_BUFFER_SIZE]
Definition: uart.h:45
uint16_t rx_extract_idx
Definition: uart.h:47
#define UART3_TxPort
Definition: uart_arch.h:63
#define UART5_RxPin
Definition: uart_arch.h:56
#define RESET
Definition: humid_sht.h:40
#define UART1_TxPort
Definition: uart_arch.h:61
#define UART_RX_BUFFER_SIZE
Definition: uart.h:36
#define UART3_RxPin
Definition: uart_arch.h:55
#define UART1_RxPort
Definition: uart_arch.h:66
#define UART1_RtsPin
Definition: uart_arch.h:59