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max11040_hw.c
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1 /*
2  * $Id$
3  *
4  * Copyright (C) 2010 Martin Mueller
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24 
32 #include "armVIC.h"
33 #include "max11040_hw.h"
34 #include "adcs/max11040.h"
35 
36 #ifdef LOGGER
37 extern unsigned int getclock(void);
38 #endif
39 
40 volatile uint8_t num_irqs = 0;
41 
42 static void SSP_ISR(void) __attribute__((naked));
43 static void EXTINT_ISR(void) __attribute__((naked));
44 
45 
46 static void SSP_ISR(void) {
47  int i;
48  ISR_ENTRY();
49 
50  switch (max11040_status) {
51 
52  case MAX11040_RESET:
53  {
54  /* read dummy control byte reply */
55  uint8_t foo __attribute__ ((unused));
56  foo = SSPDR;
57  foo = SSPDR;
58  /* write configuration register */
59  SSP_Send(0x60); /* wr conf */
60  SSP_Send(0x30); /* adc0: en24bit, xtalen, no faultdis */
61  for (i=1; i<MAXM_NB_ADCS; i++) {
62  SSP_Send(0x20); /* adcx: en24bit, no xtalen, no faultdis */
63  }
65  SSP_ClearRti();
66  }
67  break;
68 
69  case MAX11040_CONF:
70  {
71  /* read dummy control byte reply */
72  uint8_t foo __attribute__ ((unused));
73  foo = SSPDR;
74  for (i=0; i<MAXM_NB_ADCS; i++) {
75  foo = SSPDR;
76  }
77  /* write sampling instant register */
78  SSP_Send(0x40); /* wr instant */
79  for (i=0; i<MAXM_NB_ADCS; i++) {
80  SSP_Send(0); /* adcx: no delay */
81  SSP_Send(0);
82  SSP_Send(0);
83  SSP_Send(0);
84  }
86  SSP_ClearRti();
87  }
88  break;
89 
90  case MAX11040_INSTANT:
91  {
92  /* read dummy control byte reply */
93  uint8_t foo __attribute__ ((unused));
94  foo = SSPDR;
95  for (i=0; i<MAXM_NB_ADCS; i++) {
96  foo = SSPDR;
97  foo = SSPDR;
98  foo = SSPDR;
99  foo = SSPDR;
100  }
101  /* write data rate control register */
102  SSP_Send(0x50); /* wr rate */
103  SSP_Send(0x26); /* adc: 250.1 sps */
104  SSP_Send(0x00);
106  SSP_ClearRti();
107  }
108  break;
109 
110  case MAX11040_RATE:
111  {
112  uint8_t foo __attribute__ ((unused));
113  foo = SSPDR;
114  foo = SSPDR;
115  foo = SSPDR;
116  /* read data register */
117  SSP_Send(0xF0); /* rd data */
118  for (i=0; i<MAXM_NB_ADCS; i++) {
119  SSP_Send(0x00); /* adcx: data */
120  SSP_Send(0x00);
121  SSP_Send(0x00);
122  SSP_Send(0x00);
123  SSP_Send(0x00);
124  SSP_Send(0x00);
125  SSP_Send(0x00);
126  SSP_Send(0x00);
127  SSP_Send(0x00);
128  SSP_Send(0x00);
129  SSP_Send(0x00);
130  SSP_Send(0x00);
131  }
133  SSP_ClearRti();
134  }
135  break;
136 
137  case MAX11040_DATA:
138  {
139  uint8_t foo __attribute__ ((unused));
140  foo = SSPDR;
141  for (i=0; i<MAXM_NB_ADCS; i++) {
142  foo = SSPDR;
143  foo = SSPDR;
144  foo = SSPDR;
145  foo = SSPDR;
146  foo = SSPDR;
147  foo = SSPDR;
148  foo = SSPDR;
149  foo = SSPDR;
150  foo = SSPDR;
151  foo = SSPDR;
152  foo = SSPDR;
153  foo = SSPDR;
154  }
155 
156  /* read data */
157  /* read data register */
158  SSP_Send(0xF0); /* rd data */
159  for (i=0; i<MAXM_NB_ADCS; i++) {
160  SSP_Send(0x00); /* adc0: data */
161  SSP_Send(0x00);
162  SSP_Send(0x00);
163  SSP_Send(0x00);
164  SSP_Send(0x00);
165  SSP_Send(0x00);
166  SSP_Send(0x00);
167  SSP_Send(0x00);
168  SSP_Send(0x00);
169  SSP_Send(0x00);
170  SSP_Send(0x00);
171  SSP_Send(0x00);
172  }
173 
174  SSP_ClearRti();
175  }
176  break;
177 
178  case MAX11040_DATA2:
179  {
180  uint8_t foo __attribute__ ((unused));
181 
182  SSP_ClearRti();
183  SSP_ClearRxi();
184 
185  if (max11040_count <= MAXM_NB_CHAN+2)
186  {
187  SSP_Send(0x00);
188  SSP_Send(0x00);
189  SSP_Send(0x00);
190  SSP_Send(0x00);
191  SSP_Send(0x00);
192  SSP_Send(0x00);
193  }
194 
195  if (max11040_count == 0) foo = SSPDR;
196 
202 
203  max11040_count++;
204 
210 
211  max11040_count++;
212 
214  {
215  MaxmUnselect();
217  i = max11040_buf_in+1;
218  if (i >= MAX11040_BUF_SIZE) i=0;
219  if (i != max11040_buf_out) {
220  max11040_buf_in = i;
221  } else {
222  //throw error;
223  }
224  }
225  }
226  break;
227 
228  }
229 
230  VICVectAddr = 0x00000000; /* clear this interrupt from the VIC */
231  ISR_EXIT();
232 }
233 
234 void EXTINT_ISR(void) {
235  ISR_ENTRY();
236 
237  if (num_irqs++ == 5)
238  {
239  /* switch SSEL P0.20 to be used as GPIO */
240  PINSEL1 &= ~(3 << 8);
241  IO0DIR |= 1 << 20;
243  }
244 
246 
247 #ifdef LOGGER
248  max11040_timestamp[max11040_buf_in] = getclock();
249 #endif
250 
251  MaxmSelect();
252 
253  /* read data */
254  SSP_Send(0xF0);
255  SSP_Send(0x00);
256  SSP_Send(0x00);
257  SSP_Send(0x00);
258  SSP_Send(0x00);
259  SSP_Send(0x00);
260  SSP_Send(0x00);
261 
262  max11040_count = 0;
263  }
264 
265  /* clear EINT */
266  SetBit(EXTINT, MAXM_DRDY_EINT);
267 
268  VICVectAddr = 0x00000000; /* clear this interrupt from the VIC */
269  ISR_EXIT();
270 }
271 
272 
273 void max11040_hw_init( void ) {
274  int i;
275 
276  /* *** configure SPI *** */
277  /* setup pins for SSP (SCK, MISO, MOSI, SSEL) */
279 
280  /* setup SSP */
281  SSPCR0 = SSPCR0_VAL;;
282  SSPCR1 = SSPCR1_VAL;
283  SSPCPSR = 0x02;
284 
285  /* initialize interrupt vector */
286  VICIntSelect &= ~VIC_BIT( VIC_SPI1 ); /* SPI1 selected as IRQ */
287  VICIntEnable = VIC_BIT( VIC_SPI1 ); /* enable it */
288  _VIC_CNTL(SSP_VIC_SLOT) = VIC_ENABLE | VIC_SPI1;
289  _VIC_ADDR(SSP_VIC_SLOT) = (uint32_t)SSP_ISR; /* address of the ISR */
290 
291 
292  /* *** configure DRDY pin*** */
293  /* connected pin to EXINT */
294  MAXM_DRDY_PINSEL |= MAXM_DRDY_PINSEL_VAL << MAXM_DRDY_PINSEL_BIT;
295  SetBit(EXTMODE, MAXM_DRDY_EINT); /* EINT is edge trigered */
296  ClearBit(EXTPOLAR, MAXM_DRDY_EINT); /* EINT is trigered on falling edge */
297  SetBit(EXTINT, MAXM_DRDY_EINT); /* clear pending EINT */
298 
299  /* initialize interrupt vector */
300  VICIntSelect &= ~VIC_BIT( MAXM_DRDY_VIC_IT ); /* select EINT as IRQ source */
301  VICIntEnable = VIC_BIT( MAXM_DRDY_VIC_IT ); /* enable it */
302  _VIC_CNTL(MAX11040_DRDY_VIC_SLOT) = VIC_ENABLE | MAXM_DRDY_VIC_IT;
303  _VIC_ADDR(MAX11040_DRDY_VIC_SLOT) = (uint32_t)EXTINT_ISR; /* address of the ISR */
304 
305 
306  /* write configuration register */
307  SSP_Send(0x60); /* wr conf */
308  for (i=0; i<MAXM_NB_ADCS; i++) {
309  SSP_Send(0x40); /* adcx: reset */
310  }
311  SSP_Enable();
312  SSP_ClearRti();
313  SSP_EnableRti();
314 }
315 
#define VICIntSelect
Definition: LPC21xx.h:398
#define MAX11040_INSTANT
Definition: max11040.h:22
volatile uint8_t num_irqs
Definition: max11040_hw.c:40
#define SSP_ClearRxi()
Definition: max11040_hw.h:48
static void SSP_ISR(void)
Definition: max11040_hw.c:42
#define SSP_Send(_a)
Definition: ssp_hw.h:16
#define SSPCPSR
Definition: LPC21xx.h:226
#define _VIC_CNTL(idx)
Definition: armVIC.h:19
#define SSPCR0_VAL
#define EXTMODE
Definition: LPC21xx.h:387
#define MaxmSelect()
Definition: max11040_hw.h:56
#define SSPCR1_VAL
#define SSP_Enable()
Definition: max11040_hw.h:44
#define MAX11040_RESET
Definition: max11040.h:20
#define SSP_PINSEL1_SSEL
volatile uint8_t max11040_data
Definition: max11040.c:38
#define MAXM_NB_CHAN
Definition: max11040.h:7
#define SSPCR0
Definition: LPC21xx.h:222
#define MAX11040_CONF
Definition: max11040.h:21
#define _VIC_ADDR(idx)
Definition: armVIC.h:20
#define MAX11040_DATA2
Definition: max11040.h:26
#define SSP_PINSEL1_SCK
#define EXTPOLAR
Definition: LPC21xx.h:388
#define EXTINT
Definition: LPC21xx.h:385
volatile uint32_t max11040_buf_in
Definition: max11040.c:42
#define VICVectAddr
Definition: LPC21xx.h:404
unsigned long uint32_t
Definition: types.h:18
volatile uint32_t max11040_timestamp[MAX11040_BUF_SIZE]
Definition: max11040.c:40
uint16_t foo
Definition: main_demo5.c:54
void EXTINT_ISR(void)
Definition: max11040_hw.c:234
#define MAXM_NB_ADCS
Definition: max11040.h:8
#define VIC_BIT(chan)
Definition: lpcVIC.h:105
#define SSP_EnableRti()
Definition: max11040_hw.h:52
volatile uint8_t max11040_status
Definition: max11040.c:37
#define IO0DIR
Definition: LPC21xx.h:303
#define MAX11040_DATA
Definition: max11040.h:25
unsigned char uint8_t
Definition: types.h:14
#define SSPDR
Definition: LPC21xx.h:224
#define ISR_EXIT()
Definition: armVIC.h:61
#define SSP_ClearRti()
Definition: max11040_hw.h:54
volatile uint8_t max11040_count
Definition: max11040.c:41
#define VICIntEnable
Definition: LPC21xx.h:399
#define PINSEL1
Definition: LPC21xx.h:316
#define SSP_PINSEL1_MOSI
#define VIC_SPI1
Definition: lpcVIC.h:81
volatile int32_t max11040_values[MAX11040_BUF_SIZE][MAXM_NB_CHAN]
Definition: max11040.c:39
#define MAX11040_DATA_AVAILABLE
Definition: max11040.h:29
#define SSP_PINSEL1_MISO
#define MAX11040_BUF_SIZE
Definition: max11040.h:9
#define SSPCR1
Definition: LPC21xx.h:223
__attribute__((always_inline))
Definition: i2c_arch.c:35
#define ISR_ENTRY()
Definition: armVIC.h:40
#define MAX11040_RATE
Definition: max11040.h:23
#define VIC_ENABLE
Definition: lpcVIC.h:102
volatile uint32_t max11040_buf_out
Definition: max11040.c:43
#define MaxmUnselect()
Definition: max11040_hw.h:57
void max11040_hw_init(void)
Definition: max11040_hw.c:273