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adc_arch.c
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1 /*
2  * $Id$
3  *
4  * Copyright (C) 2008 Pascal Brisset, Antoine Drouin
5  *
6  * This file is part of paparazzi.
7  *
8  * paparazzi is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2, or (at your option)
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12  *
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15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
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23  */
24 
25 #include "mcu_periph/adc.h"
26 
27 #include "LPC21xx.h"
28 #include "armVIC.h"
29 #include BOARD_CONFIG
30 
31 
32 #ifdef USE_AD0
33 #ifndef AD0_VIC_SLOT
34 #define AD0_VIC_SLOT 2
35 #endif
36 #endif
37 
38 #ifdef USE_AD1
39 #ifndef AD1_VIC_SLOT
40 #define AD1_VIC_SLOT 4
41 #endif
42 #endif
43 
44 
46 static struct adc_buf* buffers[NB_ADC*2];
47 
48 volatile uint16_t adc0_val[NB_ADC] = {1, 2, 3, 4, 5, 6, 7, 8};
49 volatile uint16_t adc1_val[NB_ADC] = {9, 10, 11, 12, 13, 14, 15, 16};
50 
51 void adcISR0 ( void ) __attribute__((naked));
52 void adcISR1 ( void ) __attribute__((naked));
53 
54 void adc_buf_channel(uint8_t adc_channel, struct adc_buf* s, uint8_t av_nb_sample) {
55  buffers[adc_channel] = s;
57 }
58 
59 /*
60 
61 pin11 AD0.0 P0.27 PINSEL1 1 << 22
62 pin13 AD0.1 P0.28 PINSEL1 1 << 24
63 pin14 AD0.2 P0.29 PINSEL1 1 << 26
64 pin15 AD0.3 P0.30 PINSEL1 1 << 28
65 pin9 AD0.4 P0.25 PINSEL1 1 << 18
66 pin10 AD0.5 P0.26 PINSEL1 1 << 20
67 pin27 AD0.6 P0.4 PINSEL0 3 << 8
68 pin29 AD0.7 P0.5 PINSEL0 3 << 10
69 
70 pin30 AD1.0 P0.6 PINSEL0 3 << 12
71 pin33 AD1.1 P0.8 PINSEL0 3 << 16
72 pin35 AD1.2 P0.10 PINSEL0 3 << 20
73 pin38 AD1.3 P0.12 PINSEL0 3 << 24
74 pin39 AD1.4 P0.13 PINSEL0 3 << 26
75 pin45 AD1.5 P0.15 PINSEL0 3 << 30
76 pin1 AD1.6 P0.21 PINSEL1 2 << 10
77 pin2 AD1.7 P0.22 PINSEL1 1 << 12
78 
79 */
80 
81 static const uint32_t ADC_PINSEL0_ONES = 0
82 #if defined USE_AD0_6
83  | 3 << 8
84 #endif
85 #if defined USE_AD0_7
86  | 3 << 10
87 #endif
88 #if defined USE_AD1_0
89  | 3 << 12
90 #endif
91 #if defined USE_AD1_1
92  | 3 << 16
93 #endif
94 #if defined USE_AD1_2
95  | 3 << 20
96 #endif
97 #if defined USE_AD1_3
98  | 3 << 24
99 #endif
100 #if defined USE_AD1_4
101  | 3 << 26
102 #endif
103 #if defined USE_AD1_5
104  | 3 << 30
105 #endif
106 ;
107 
108 static const uint32_t ADC_PINSEL1_ONES = 0
109 #if defined USE_AD0_0
110  | 1 << 22
111 #endif
112 #if defined USE_AD0_1
113  | 1 << 24
114 #endif
115 #if defined USE_AD0_2
116  | 1 << 26
117 #endif
118 #if defined USE_AD0_3
119  | 1 << 28
120 #endif
121 #if defined USE_AD0_4
122  | 1 << 18
123 #endif
124 #if defined USE_AD0_5
125  | 1 << 20
126 #endif
127 #if defined USE_AD1_6
128  | 2 << 10
129 #endif
130 #if defined USE_AD1_7
131  | 1 << 12
132 #endif
133 ;
134 
136 #if defined USE_AD0_0
137  | 1 << 0
138 #endif
139 #if defined USE_AD0_1
140  | 1 << 1
141 #endif
142 #if defined USE_AD0_2
143  | 1 << 2
144 #endif
145 #if defined USE_AD0_3
146  | 1 << 3
147 #endif
148 #if defined USE_AD0_4
149  | 1 << 4
150 #endif
151 #if defined USE_AD0_5
152  | 1 << 5
153 #endif
154 #if defined USE_AD0_6
155  | 1 << 6
156 #endif
157 #if defined USE_AD0_7
158  | 1 << 7
159 #endif
160 ;
161 
163 #if defined USE_AD1_0
164  | 1 << 0
165 #endif
166 #if defined USE_AD1_1
167  | 1 << 1
168 #endif
169 #if defined USE_AD1_2
170  | 1 << 2
171 #endif
172 #if defined USE_AD1_3
173  | 1 << 3
174 #endif
175 #if defined USE_AD1_4
176  | 1 << 4
177 #endif
178 #if defined USE_AD1_5
179  | 1 << 5
180 #endif
181 #if defined USE_AD1_6
182  | 1 << 6
183 #endif
184 #if defined USE_AD1_7
185  | 1 << 7
186 #endif
187 ;
188 
189 void adc_init( void ) {
190 
191  /* connect pins for selected ADCs */
194 
195 #ifdef USE_AD0
196  /* FIXME: this needs to be investigated, we should run just below 4.5MHz,
197  but we are a lot slower (e.g. 58.6kHz with PCLK = 15MHz), see
198  lpc_vor_convertions.c for right timing code */
199  /* setup hw scan - PCLK/256 ( 58.6kHz/117.2kHz/234.4kHz ) - BURST ON */
200  AD0CR = ADC_AD0CR_SEL_HW_SCAN | 0xFF << 8 | 1 << 16 | 0x01 << 21 ;
201  /* AD0 selected as IRQ */
203  /* AD0 interrupt enabled */
205  /* AD0 interrupt as VIC2 */
206  _VIC_CNTL(AD0_VIC_SLOT) = VIC_ENABLE | VIC_AD0;
207  _VIC_ADDR(AD0_VIC_SLOT) = (uint32_t)adcISR0;
208 #endif
209 
210 #ifdef USE_AD1
211  /* FIXME: this needs to be investigated, we should run just below 4.5MHz,
212  but we are a lot slower (e.g. 58.6kHz with PCLK = 15MHz), see
213  lpc_vor_convertions.c for right timing code */
214  /* setup hw scan - PCLK/256 ( 58.6kHz/117.2kHz/234.4kHz ) - BURST ON */
215  AD1CR = ADC_AD1CR_SEL_HW_SCAN | 0xFF << 8 | 1 << 16 | 0x01 << 21 ;
216  /* AD1 selected as IRQ */
218  /* AD1 interrupt enabled */
220  /* AD1 interrupt as VIC2 */
221  _VIC_CNTL(AD1_VIC_SLOT) = VIC_ENABLE | VIC_AD1;
222  _VIC_ADDR(AD1_VIC_SLOT) = (uint32_t)adcISR1;
223 #endif
224 
225 }
226 
227 
228 void adcISR0 ( void ) {
229  ISR_ENTRY();
230  uint32_t tmp = AD0GDR;
231  uint8_t channel = (uint8_t)(tmp >> 24) & 0x07;
232  uint16_t value = (uint16_t)(tmp >> 6) & 0x03FF;
233  adc0_val[channel] = value;
234 
235  struct adc_buf* buf = buffers[channel];
236  if (buf) {
237  uint8_t new_head = buf->head + 1;
238  if (new_head >= buf->av_nb_sample) new_head = 0;
239  buf->sum -= buf->values[new_head];
240  buf->values[new_head] = value;
241  buf->sum += value;
242  buf->head = new_head;
243  }
244 
245  VICVectAddr = 0x00000000; // clear this interrupt from the VIC
246  ISR_EXIT(); // recover registers and return
247 }
248 
249 void adcISR1 ( void ) {
250  ISR_ENTRY();
251  uint32_t tmp = AD1GDR;
252  uint8_t channel = (uint8_t)(tmp >> 24) & 0x07;
253  uint16_t value = (uint16_t)(tmp >> 6) & 0x03FF;
254  adc1_val[channel] = value;
255  struct adc_buf* buf = buffers[channel+NB_ADC];
256  if (buf) {
257  uint8_t new_head = buf->head + 1;
258  if (new_head >= buf->av_nb_sample) new_head = 0;
259  buf->sum -= buf->values[new_head];
260  buf->values[new_head] = value;
261  buf->sum += value;
262  buf->head = new_head;
263  }
264 
265  VICVectAddr = 0x00000000; // clear this interrupt from the VIC
266  ISR_EXIT(); // recover registers and return
267 }
#define VICIntSelect
Definition: LPC21xx.h:398
unsigned short uint16_t
Definition: types.h:16
#define VIC_AD0
Definition: lpcVIC.h:88
volatile uint16_t adc0_val[NB_ADC]
Definition: adc_arch.c:48
#define _VIC_CNTL(idx)
Definition: armVIC.h:19
static const uint32_t ADC_PINSEL1_ONES
Definition: adc_arch.c:108
uint16_t values[MAX_AV_NB_SAMPLE]
Definition: adc.h:62
uint8_t av_nb_sample
Definition: adc.h:64
void adcISR1(void)
Definition: adc_arch.c:249
arch independent ADC (Analog to Digital Converter) API
#define _VIC_ADDR(idx)
Definition: armVIC.h:20
uint32_t sum
Definition: adc.h:61
volatile uint16_t adc1_val[NB_ADC]
Definition: adc_arch.c:49
#define AD0CR
Definition: LPC21xx.h:324
#define AD1CR
Definition: LPC21xx.h:341
void adc_buf_channel(uint8_t adc_channel __attribute__((unused)), struct adc_buf *s __attribute__((unused)), uint8_t av_nb_sample __attribute__((unused)))
Definition: adc_arch.c:3
Generic interface for all ADC hardware drivers, independent from microcontroller architecture.
Definition: adc.h:60
#define VICVectAddr
Definition: LPC21xx.h:404
static volatile uint8_t channel
unsigned long uint32_t
Definition: types.h:18
void adcISR0(void)
Definition: adc_arch.c:51
static const uint32_t ADC_PINSEL0_ONES
Definition: adc_arch.c:81
#define VIC_BIT(chan)
Definition: lpcVIC.h:105
#define PINSEL0
Definition: LPC21xx.h:315
static struct adc_buf * buffers[NB_ADC *2]
First NB_ADC for bank 0, others for bank 2.
Definition: adc_arch.c:46
unsigned char uint8_t
Definition: types.h:14
#define ISR_EXIT()
Definition: armVIC.h:61
static const uint32_t ADC_AD0CR_SEL_HW_SCAN
Definition: adc_arch.c:135
#define VICIntEnable
Definition: LPC21xx.h:399
#define PINSEL1
Definition: LPC21xx.h:316
void adc_init(void)
Starts conversions.
Definition: adc_arch.c:189
#define VIC_AD1
Definition: lpcVIC.h:91
#define NB_ADC
Definition: adc_arch.h:79
static const uint32_t ADC_AD1CR_SEL_HW_SCAN
Definition: adc_arch.c:162
uint8_t head
Definition: adc.h:63
__attribute__((always_inline))
Definition: i2c_arch.c:35
#define ISR_ENTRY()
Definition: armVIC.h:40
#define AD1GDR
Definition: LPC21xx.h:342
#define VIC_ENABLE
Definition: lpcVIC.h:102
#define AD0GDR
Definition: LPC21xx.h:325