Paparazzi UAS  v4.0.4_stable-3-gf39211a
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max1168_arch.h File Reference
#include <stm32/gpio.h>
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Macros

#define Max1168Unselect()   GPIOB->BSRR = GPIO_Pin_12
 
#define Max1168Select()   GPIOB->BRR = GPIO_Pin_12
 
#define Max1168OnDmaIrq()
 
#define Max1168ConfigureSPI()
 

Macro Definition Documentation

#define Max1168ConfigureSPI ( )
Value:
{ \
SPI_InitTypeDef SPI_InitStructure; \
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; \
SPI_InitStructure.SPI_Mode = SPI_Mode_Master; \
SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b; \
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; \
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; \
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; \
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_16; \
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; \
SPI_InitStructure.SPI_CRCPolynomial = 7; \
SPI_Init(SPI2, &SPI_InitStructure); \
}

Definition at line 55 of file max1168_arch.h.

Referenced by imu_periodic(), and main_spi2_init().

#define Max1168OnDmaIrq ( )
Value:
{ \
/* ASSERT((max1168_status == STA_MAX1168_READING_RES), \
* DEBUG_MAX_1168, MAX1168_ERR_SPURIOUS_DMA_IRQ); \
*/ \
DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, DISABLE); \
/* Disable SPI_2 Rx and TX request */ \
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, DISABLE); \
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, DISABLE); \
/* Disable DMA1 Channel4 and 5 */ \
DMA_Cmd(DMA1_Channel4, DISABLE); \
DMA_Cmd(DMA1_Channel5, DISABLE); \
\
}
#define Max1168Unselect()
Definition: max1168_arch.h:35
volatile uint8_t max1168_status
Definition: max1168.c:28
#define STA_MAX1168_DATA_AVAILABLE
Definition: max1168.h:36

Definition at line 38 of file max1168_arch.h.

Referenced by dma1_c4_irq_handler(), and exti2_irq_handler().

#define Max1168Select ( )    GPIOB->BRR = GPIO_Pin_12

Definition at line 36 of file max1168_arch.h.

#define Max1168Unselect ( )    GPIOB->BSRR = GPIO_Pin_12

Definition at line 35 of file max1168_arch.h.