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uart_arch.c
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1 /*
2  * Paparazzi $Id$
3  *
4  * Copyright (C) 2009 Antoine Drouin <poinix@gmail.com>
5  *
6  * This file is part of paparazzi.
7  *
8  * paparazzi is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2, or (at your option)
11  * any later version.
12  *
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14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
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20  * the Free Software Foundation, 59 Temple Place - Suite 330,
21  * Boston, MA 02111-1307, USA.
22  */
23 
24 #include "mcu_periph/uart.h"
25 
26 #include <stm32/rcc.h>
27 #include <stm32/misc.h>
28 #include <stm32/usart.h>
29 #include <stm32/gpio.h>
30 #include "std.h"
31 #include "pprz_baudrate.h"
32 
34 
35  /* Configure USART */
36  USART_InitTypeDef usart;
37  usart.USART_BaudRate = baud;
38  usart.USART_WordLength = USART_WordLength_8b;
39  usart.USART_StopBits = USART_StopBits_1;
40  usart.USART_Parity = USART_Parity_No;
41  usart.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
42  usart.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
43  USART_Init(p->reg_addr, &usart);
44  /* Enable USART1 Receive interrupts */
45  USART_ITConfig(p->reg_addr, USART_IT_RXNE, ENABLE);
46 
48 
49  /* Enable the USART */
50  USART_Cmd(p->reg_addr, ENABLE);
51 
52 }
53 // TODO set_mode function
54 
55 void uart_transmit(struct uart_periph* p, uint8_t data ) {
56 
57  uint16_t temp = (p->tx_insert_idx + 1) % UART_TX_BUFFER_SIZE;
58 
59  if (temp == p->tx_extract_idx)
60  return; // no room
61 
62  USART_ITConfig(p->reg_addr, USART_IT_TXE, DISABLE);
63 
64  // check if in process of sending data
65  if (p->tx_running) { // yes, add to queue
66  p->tx_buf[p->tx_insert_idx] = data;
67  p->tx_insert_idx = temp;
68  }
69  else { // no, set running flag and write to output register
70  p->tx_running = TRUE;
71  USART_SendData(p->reg_addr, data);
72  }
73 
74  USART_ITConfig(p->reg_addr, USART_IT_TXE, ENABLE);
75 
76 }
77 
78 static inline void usart_irq_handler(struct uart_periph* p) {
79 
80  if(USART_GetITStatus(p->reg_addr, USART_IT_TXE) != RESET){
81  // check if more data to send
82  if (p->tx_insert_idx != p->tx_extract_idx) {
83  USART_SendData(p->reg_addr,p->tx_buf[p->tx_extract_idx]);
84  p->tx_extract_idx++;
86  }
87  else {
88  p->tx_running = FALSE; // clear running flag
89  USART_ITConfig(p->reg_addr, USART_IT_TXE, DISABLE);
90  }
91  }
92 
93  if(USART_GetITStatus(p->reg_addr, USART_IT_RXNE) != RESET){
94  uint16_t temp = (p->rx_insert_idx + 1) % UART_RX_BUFFER_SIZE;;
95  p->rx_buf[p->rx_insert_idx] = USART_ReceiveData(p->reg_addr);
96  // check for more room in queue
97  if (temp != p->rx_extract_idx)
98  p->rx_insert_idx = temp; // update insert index
99  }
100 
101 }
102 
103 static inline void usart_enable_irq(IRQn_Type IRQn) {
104  /* Enable USART interrupts */
105  NVIC_InitTypeDef nvic;
106  nvic.NVIC_IRQChannel = IRQn;
107  nvic.NVIC_IRQChannelPreemptionPriority = 2;
108  nvic.NVIC_IRQChannelSubPriority = 1;
109  nvic.NVIC_IRQChannelCmd = ENABLE;
110  NVIC_Init(&nvic);
111 }
112 
113 #ifdef USE_UART1
114 
115 void uart1_init( void ) {
116 
117  uart_periph_init(&uart1);
118  uart1.reg_addr = USART1;
119 
120  /* init RCC */
121  RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
122  RCC_APB2PeriphClockCmd(UART1_Periph, ENABLE);
123 
124  /* Enable USART1 interrupts */
125  usart_enable_irq(USART1_IRQn);
126 
127  /* Init GPIOS */
128  GPIO_InitTypeDef gpio;
129  /* GPIOA: GPIO_Pin_9 USART1 Tx push-pull */
130  gpio.GPIO_Pin = UART1_TxPin;
131  gpio.GPIO_Mode = GPIO_Mode_AF_PP;
132  gpio.GPIO_Speed = GPIO_Speed_50MHz;
133  GPIO_Init(UART1_TxPort, &gpio);
134  /* GPIOA: GPIO_Pin_10 USART1 Rx pin as floating input */
135  gpio.GPIO_Pin = UART1_RxPin;
136  gpio.GPIO_Mode = GPIO_Mode_IN_FLOATING;
137  GPIO_Init(UART1_RxPort, &gpio);
138 
139  /* Configure USART1 */
140  uart_periph_set_baudrate(&uart1, UART1_BAUD);
141 }
142 
143 void usart1_irq_handler(void) { usart_irq_handler(&uart1); }
144 
145 #endif /* USE_UART1 */
146 
147 #ifdef USE_UART2
148 
149 void uart2_init( void ) {
150 
151  uart_periph_init(&uart2);
152  uart2.reg_addr = USART2;
153 
154  /* init RCC */
155  RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
156  RCC_APB2PeriphClockCmd(UART2_Periph, ENABLE);
157 
158  /* Enable USART2 interrupts */
159  usart_enable_irq(USART2_IRQn);
160 
161  /* Init GPIOS */
162  GPIO_InitTypeDef gpio;
163  /* GPIOA: GPIO_Pin_2 USART2 Tx push-pull */
164  gpio.GPIO_Pin = UART2_TxPin; // ;
165  gpio.GPIO_Mode = GPIO_Mode_AF_PP;
166  gpio.GPIO_Speed = GPIO_Speed_50MHz;
167  GPIO_Init(UART2_TxPort, &gpio);
168  /* GPIOA: GPIO_Pin_3 USART2 Rx pin as floating input */
169  gpio.GPIO_Pin = UART2_RxPin; // ;
170  gpio.GPIO_Mode = GPIO_Mode_IN_FLOATING;
171  GPIO_Init(UART2_RxPort, &gpio);
172 
173  /* Configure USART2 */
174  uart_periph_set_baudrate(&uart2, UART2_BAUD);
175 }
176 
177 void usart2_irq_handler(void) { usart_irq_handler(&uart2); }
178 
179 #endif /* USE_UART2 */
180 
181 #ifdef USE_UART3
182 
183 void uart3_init( void ) {
184 
185  uart_periph_init(&uart3);
186  uart3.reg_addr = USART3;
187 
188  /* init RCC */
189  RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
190  RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
191  RCC_APB2PeriphClockCmd(UART3_Periph, ENABLE);
192 
193  /* Enable USART3 interrupts */
194  usart_enable_irq(USART3_IRQn);
195 
196  /* Init GPIOS */
197  GPIO_PinRemapConfig(GPIO_PartialRemap_USART3, ENABLE);
198  GPIO_InitTypeDef gpio;
199  /* GPIOC: GPIO_Pin_10 USART3 Tx push-pull */
200  gpio.GPIO_Pin = UART3_TxPin;
201  gpio.GPIO_Mode = GPIO_Mode_AF_PP;
202  gpio.GPIO_Speed = GPIO_Speed_50MHz;
203  GPIO_Init(UART3_TxPort, &gpio);
204  /* GPIOC: GPIO_Pin_11 USART3 Rx pin as floating input */
205  gpio.GPIO_Pin = UART3_RxPin;
206  gpio.GPIO_Mode = GPIO_Mode_IN_FLOATING;
207  GPIO_Init(UART3_RxPort, &gpio);
208 
209  /* Configure USART3 */
210  uart_periph_set_baudrate(&uart3, UART3_BAUD);
211 }
212 
213 void usart3_irq_handler(void) { usart_irq_handler(&uart3); }
214 
215 #endif /* USE_UART3 */
216 
217 #ifdef USE_UART5
218 
219 void uart5_init( void ) {
220 
221  uart_periph_init(&uart5);
222  uart5.reg_addr = USART5;
223 
224  /* init RCC */
225  RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE);
226  RCC_APB2PeriphClockCmd(UART5_PeriphTx, ENABLE);
227  RCC_APB2PeriphClockCmd(UART5_PeriphRx, ENABLE);
228 
229  /* Enable UART5 interrupts */
230  usart_enable_irq(UART5_IRQn);
231 
232  /* Init GPIOS */
233  GPIO_InitTypeDef gpio;
234  /* GPIOC: GPIO_Pin_10 UART5 Tx push-pull */
235  gpio.GPIO_Pin = UART5_TxPin;
236  gpio.GPIO_Mode = GPIO_Mode_AF_PP;
237  gpio.GPIO_Speed = GPIO_Speed_50MHz;
238  GPIO_Init(UART5_TxPort, &gpio);
239  /* GPIOC: GPIO_Pin_11 UART5 Rx pin as floating input */
240  gpio.GPIO_Pin = UART5_RxPin;
241  gpio.GPIO_Mode = GPIO_Mode_IN_FLOATING;
242  GPIO_Init(UART5_RxPort, &gpio);
243 
244  /* Configure UART5 */
245  uart_periph_set_baudrate(&uart5, UART5_BAUD);
246 }
247 
248 void usart5_irq_handler(void) { usart_irq_handler(&uart5); }
249 
250 #endif /* USE_UART5 */
251 
unsigned short uint16_t
Definition: types.h:16
#define UART3_Periph
Definition: uart_arch.h:70
arch independent UART (Universal Asynchronous Receiver/Transmitter) API
#define UART5_RxPort
Definition: uart_arch.h:66
#define UART1_Periph
Definition: uart_arch.h:68
#define pprz_usart_set_baudrate(x, y)
Definition: pprz_baudrate.h:10
#define UART2_TxPort
Definition: uart_arch.h:59
#define UART3_TxPin
Definition: uart_arch.h:50
#define UART5_PeriphTx
Definition: uart_arch.h:71
#define UART5_TxPin
Definition: uart_arch.h:51
uint8_t tx_running
Definition: uart.h:52
void * reg_addr
Definition: uart.h:54
#define UART1_RxPin
Definition: uart_arch.h:53
uint16_t tx_extract_idx
Definition: uart.h:51
#define UART2_RxPort
Definition: uart_arch.h:64
void uart_transmit(struct uart_periph *p, uint8_t data)
Definition: uart_arch.c:65
#define UART3_RxPort
Definition: uart_arch.h:65
#define UART1_TxPin
Definition: uart_arch.h:48
#define FALSE
Definition: imu_chimu.h:141
#define UART2_Periph
Definition: uart_arch.h:69
UART peripheral.
Definition: uart.h:43
#define UART_TX_BUFFER_SIZE
Definition: uart.h:37
void uart_periph_init(struct uart_periph *p)
Definition: uart.c:47
unsigned long uint32_t
Definition: types.h:18
#define UART5_TxPort
Definition: uart_arch.h:61
static void usart_enable_irq(IRQn_Type IRQn)
Definition: uart_arch.c:103
uint16_t rx_insert_idx
Definition: uart.h:46
#define UART2_RxPin
Definition: uart_arch.h:54
#define TRUE
Definition: imu_chimu.h:144
uint8_t tx_buf[UART_TX_BUFFER_SIZE]
Definition: uart.h:49
#define UART5_PeriphRx
Definition: uart_arch.h:72
#define USART5
Definition: uart_arch.h:45
unsigned char uint8_t
Definition: types.h:14
#define UART2_TxPin
Definition: uart_arch.h:49
uint16_t tx_insert_idx
Definition: uart.h:50
static void usart_irq_handler(struct uart_periph *p)
Definition: uart_arch.c:78
uint8_t rx_buf[UART_RX_BUFFER_SIZE]
Definition: uart.h:45
uint16_t rx_extract_idx
Definition: uart.h:47
#define UART3_TxPort
Definition: uart_arch.h:60
#define UART5_RxPin
Definition: uart_arch.h:56
#define RESET
Definition: humid_sht.h:40
#define UART1_TxPort
Definition: uart_arch.h:58
#define UART_RX_BUFFER_SIZE
Definition: uart.h:36
#define UART3_RxPin
Definition: uart_arch.h:55
#define UART1_RxPort
Definition: uart_arch.h:63
void uart_periph_set_baudrate(struct uart_periph *p, uint32_t baud)
Definition: uart_arch.c:59