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imu_b2_arch.c File Reference
#include "subsystems/imu.h"
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Macros

#define SSP_DDS8   0x07 << 0 /* data size : 8 bits */
 
#define SSP_DDS16   0x0F << 0 /* data size : 16 bits */
 
#define SSP_FRF   0x00 << 4 /* frame format : SPI */
 
#define SSP_CPOL   0x00 << 6 /* clock polarity : data captured on first clock transition */
 
#define SSP_CPHA   0x00 << 7 /* clock phase : SCK idles low */
 
#define SSP_SCR   0x0F << 8 /* serial clock rate : divide by 16 */
 
#define SSP_LBM   0x00 << 0 /* loopback mode : disabled */
 
#define SSP_SSE   0x00 << 1 /* SSP enable : disabled */
 
#define SSP_MS   0x00 << 2 /* master slave mode : master */
 
#define SSP_SOD   0x00 << 3 /* slave output disable : don't care when master */
 
#define SSPCR0_VAL8   (SSP_DDS8 | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR )
 
#define SSPCR0_VAL16   (SSP_DDS16 | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR )
 
#define SSPCR1_VAL   (SSP_LBM | SSP_SSE | SSP_MS | SSP_SOD )
 
#define SSP_PINSEL1_SCK   (2<<2)
 
#define SSP_PINSEL1_MISO   (2<<4)
 
#define SSP_PINSEL1_MOSI   (2<<6)
 
#define ImuSetSSP8bits()
 
#define ImuSetSSP16bits()
 

Functions

static void SSP_ISR (void)
 
void imu_periodic (void)
 

Variables

int imu_overrun = 0
 
volatile uint8_t imu_ssp_status
 

Macro Definition Documentation

#define ImuSetSSP16bits ( )
Value:
{ \
}
#define SSPCR0
Definition: LPC21xx.h:222
#define SSPCR0_VAL16

Referenced by imu_periodic().

#define ImuSetSSP8bits ( )
Value:
{ \
}
#define SSPCR0
Definition: LPC21xx.h:222
#define SSPCR0_VAL8
#define SSP_CPHA   0x00 << 7 /* clock phase : SCK idles low */
#define SSP_CPOL   0x00 << 6 /* clock polarity : data captured on first clock transition */
#define SSP_DDS16   0x0F << 0 /* data size : 16 bits */
#define SSP_DDS8   0x07 << 0 /* data size : 8 bits */
#define SSP_FRF   0x00 << 4 /* frame format : SPI */
#define SSP_LBM   0x00 << 0 /* loopback mode : disabled */
#define SSP_MS   0x00 << 2 /* master slave mode : master */
#define SSP_PINSEL1_MISO   (2<<4)

Referenced by SSP_ISR().

#define SSP_PINSEL1_MOSI   (2<<6)

Referenced by SSP_ISR().

#define SSP_PINSEL1_SCK   (2<<2)

Referenced by SSP_ISR().

#define SSP_SCR   0x0F << 8 /* serial clock rate : divide by 16 */
#define SSP_SOD   0x00 << 3 /* slave output disable : don't care when master */
#define SSP_SSE   0x00 << 1 /* SSP enable : disabled */
#define SSPCR0_VAL16   (SSP_DDS16 | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR )

Referenced by SSP_ISR().

#define SSPCR0_VAL8   (SSP_DDS8 | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR )
#define SSPCR1_VAL   (SSP_LBM | SSP_SSE | SSP_MS | SSP_SOD )

Referenced by SSP_ISR().

Function Documentation

void imu_periodic ( void  )

Definition at line 83 of file imu_b2_arch.c.

Referenced by main_periodic(), main_periodic_task(), and sensors_task().

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Variable Documentation

int imu_overrun = 0

Definition at line 26 of file imu_b2_arch.c.

Referenced by imu_periodic().

volatile uint8_t imu_ssp_status

Definition at line 27 of file imu_b2_arch.c.

Referenced by dma1_c4_irq_handler(), imu_b2_arch_init(), imu_periodic(), and SSP_ISR().