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mcuconf.h
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1 /*
2  ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3 
4  Licensed under the Apache License, Version 2.0 (the "License");
5  you may not use this file except in compliance with the License.
6  You may obtain a copy of the License at
7 
8  http://www.apache.org/licenses/LICENSE-2.0
9 
10  Unless required by applicable law or agreed to in writing, software
11  distributed under the License is distributed on an "AS IS" BASIS,
12  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  See the License for the specific language governing permissions and
14  limitations under the License.
15 */
16 
17 #ifndef MCUCONF_H
18 #define MCUCONF_H
19 
20 /*
21  * STM32F37x drivers configuration.
22  * The following settings override the default settings present in
23  * the various device driver implementation headers.
24  * Note that the settings for each driver only have effect if the whole
25  * driver is enabled in halconf.h.
26  *
27  * IRQ priorities:
28  * 15...0 Lowest...Highest.
29  *
30  * DMA priorities:
31  * 0...3 Lowest...Highest.
32  */
33 
34 #define STM32F37x_MCUCONF
35 
36 /*
37  * HAL driver system settings.
38  */
39 #define STM32_NO_INIT FALSE
40 #define STM32_PVD_ENABLE FALSE
41 #define STM32_PLS STM32_PLS_LEV0
42 #define STM32_HSI_ENABLED TRUE
43 #define STM32_LSI_ENABLED TRUE
44 #define STM32_HSE_ENABLED TRUE
45 #define STM32_LSE_ENABLED FALSE
46 #define STM32_SW STM32_SW_PLL
47 #define STM32_PLLSRC STM32_PLLSRC_HSE
48 #define STM32_PREDIV_VALUE 2
49 #define STM32_PLLMUL_VALUE 9
50 #define STM32_HPRE STM32_HPRE_DIV1
51 #define STM32_PPRE1 STM32_PPRE1_DIV2
52 #define STM32_PPRE2 STM32_PPRE2_DIV2
53 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
54 #define STM32_ADCPRE STM32_ADCPRE_DIV4
55 #define STM32_SDPRE STM32_SDPRE_DIV12
56 #define STM32_USART1SW STM32_USART1SW_PCLK
57 #define STM32_USART2SW STM32_USART2SW_PCLK
58 #define STM32_USART3SW STM32_USART3SW_PCLK
59 #define STM32_I2C1SW STM32_I2C1SW_SYSCLK
60 #define STM32_I2C2SW STM32_I2C2SW_SYSCLK
61 #define STM32_RTCSEL STM32_RTCSEL_LSI
62 #define STM32_USB_CLOCK_REQUIRED TRUE
63 #define STM32_USBPRE STM32_USBPRE_DIV1P5
64 
65 /*
66  * ADC driver system settings.
67  */
68 #define STM32_ADC_USE_ADC1 TRUE
69 #define STM32_ADC_USE_SDADC1 FALSE
70 #define STM32_ADC_USE_SDADC2 FALSE
71 #define STM32_ADC_USE_SDADC3 FALSE
72 #define STM32_ADC_ADC1_DMA_PRIORITY 2
73 #define STM32_ADC_SDADC1_DMA_PRIORITY 2
74 #define STM32_ADC_SDADC2_DMA_PRIORITY 2
75 #define STM32_ADC_SDADC3_DMA_PRIORITY 2
76 #define STM32_ADC_ADC1_IRQ_PRIORITY 5
77 #define STM32_ADC_SDADC1_IRQ_PRIORITY 5
78 #define STM32_ADC_SDADC2_IRQ_PRIORITY 5
79 #define STM32_ADC_SDADC3_IRQ_PRIORITY 5
80 #define STM32_ADC_SDADC1_DMA_IRQ_PRIORITY 5
81 #define STM32_ADC_SDADC2_DMA_IRQ_PRIORITY 5
82 #define STM32_ADC_SDADC3_DMA_IRQ_PRIORITY 5
83 
84 /*
85  * CAN driver system settings.
86  */
87 #if USE_CAN1
88 #define STM32_CAN_USE_CAN1 TRUE
89 #else
90 #define STM32_CAN_USE_CAN1 FALSE
91 #endif
92 #define STM32_CAN_CAN1_IRQ_PRIORITY 11
93 
94 /*
95  * EXT driver system settings.
96  */
97 #define STM32_EXT_EXTI0_IRQ_PRIORITY 6
98 #define STM32_EXT_EXTI1_IRQ_PRIORITY 6
99 #define STM32_EXT_EXTI2_IRQ_PRIORITY 6
100 #define STM32_EXT_EXTI3_IRQ_PRIORITY 6
101 #define STM32_EXT_EXTI4_IRQ_PRIORITY 6
102 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
103 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
104 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6
105 #define STM32_EXT_EXTI17_IRQ_PRIORITY 6
106 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6
107 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6
108 #define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6
109 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6
110 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6
111 
112 /*
113  * GPT driver system settings.
114  */
115 #define STM32_GPT_USE_TIM2 FALSE
116 #define STM32_GPT_USE_TIM3 FALSE
117 #define STM32_GPT_USE_TIM4 FALSE
118 #define STM32_GPT_USE_TIM5 FALSE
119 #define STM32_GPT_USE_TIM6 FALSE
120 #define STM32_GPT_USE_TIM7 FALSE
121 #define STM32_GPT_USE_TIM12 FALSE
122 #define STM32_GPT_USE_TIM14 FALSE
123 #define STM32_GPT_TIM2_IRQ_PRIORITY 7
124 #define STM32_GPT_TIM3_IRQ_PRIORITY 7
125 #define STM32_GPT_TIM4_IRQ_PRIORITY 7
126 #define STM32_GPT_TIM5_IRQ_PRIORITY 7
127 #define STM32_GPT_TIM6_IRQ_PRIORITY 7
128 #define STM32_GPT_TIM7_IRQ_PRIORITY 7
129 #define STM32_GPT_TIM12_IRQ_PRIORITY 7
130 #define STM32_GPT_TIM14_IRQ_PRIORITY 7
131 
132 /*
133  * I2C driver system settings.
134  */
135 #if USE_I2C1
136 #define STM32_I2C_USE_I2C1 TRUE
137 #else
138 #define STM32_I2C_USE_I2C1 FALSE
139 #endif
140 #if USE_I2C2
141 #define STM32_I2C_USE_I2C2 TRUE
142 #else
143 #define STM32_I2C_USE_I2C2 FALSE
144 #endif
145 #define STM32_I2C_BUSY_TIMEOUT 50
146 #define STM32_I2C_I2C1_IRQ_PRIORITY 10
147 #define STM32_I2C_I2C2_IRQ_PRIORITY 10
148 #define STM32_I2C_USE_DMA TRUE
149 #define STM32_I2C_I2C1_DMA_PRIORITY 1
150 #define STM32_I2C_I2C2_DMA_PRIORITY 1
151 #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
152 
153 /*
154  * ICU driver system settings.
155  */
156 #define STM32_ICU_USE_TIM2 FALSE
157 #define STM32_ICU_USE_TIM3 FALSE
158 #define STM32_ICU_USE_TIM4 FALSE
159 #define STM32_ICU_USE_TIM5 FALSE
160 #define STM32_ICU_TIM2_IRQ_PRIORITY 7
161 #define STM32_ICU_TIM3_IRQ_PRIORITY 7
162 #define STM32_ICU_TIM4_IRQ_PRIORITY 7
163 #define STM32_ICU_TIM5_IRQ_PRIORITY 7
164 
165 /*
166  * PWM driver system settings.
167  */
168 #define STM32_PWM_USE_TIM2 FALSE
169 #define STM32_PWM_USE_TIM3 FALSE
170 #define STM32_PWM_USE_TIM4 FALSE
171 #define STM32_PWM_USE_TIM5 TRUE
172 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
173 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
174 #define STM32_PWM_TIM4_IRQ_PRIORITY 7
175 #define STM32_PWM_TIM5_IRQ_PRIORITY 7
176 
177 /*
178  * SERIAL driver system settings.
179  */
180 #if USE_UART1
181 #define STM32_SERIAL_USE_USART1 TRUE
182 #else
183 #define STM32_SERIAL_USE_USART1 FALSE
184 #endif
185 #if USE_UART2
186 #define STM32_SERIAL_USE_USART2 TRUE
187 #else
188 #define STM32_SERIAL_USE_USART2 FALSE
189 #endif
190 #if USE_UART3
191 #define STM32_SERIAL_USE_USART3 TRUE
192 #else
193 #define STM32_SERIAL_USE_USART3 FALSE
194 #endif
195 #if USE_UART4
196 #define STM32_SERIAL_USE_UART4 TRUE
197 #else
198 #define STM32_SERIAL_USE_UART4 FALSE
199 #endif
200 #if USE_UART5
201 #define STM32_SERIAL_USE_UART5 TRUE
202 #else
203 #define STM32_SERIAL_USE_UART5 FALSE
204 #endif
205 #define STM32_SERIAL_USART1_PRIORITY 12
206 #define STM32_SERIAL_USART2_PRIORITY 12
207 #define STM32_SERIAL_USART3_PRIORITY 12
208 #define STM32_SERIAL_UART4_PRIORITY 12
209 #define STM32_SERIAL_UART5_PRIORITY 12
210 
211 /*
212  * SPI driver system settings.
213  */
214 #if USE_SPI1
215 #define STM32_SPI_USE_SPI1 TRUE
216 #else
217 #define STM32_SPI_USE_SPI1 FALSE
218 #endif
219 #if USE_SPI2
220 #define STM32_SPI_USE_SPI2 TRUE
221 #else
222 #define STM32_SPI_USE_SPI2 FALSE
223 #endif
224 #if USE_SPI3
225 #define STM32_SPI_USE_SPI3 TRUE
226 #else
227 #define STM32_SPI_USE_SPI3 FALSE
228 #endif
229 #define STM32_SPI_SPI1_DMA_PRIORITY 1
230 #define STM32_SPI_SPI2_DMA_PRIORITY 1
231 #define STM32_SPI_SPI3_DMA_PRIORITY 1
232 #define STM32_SPI_SPI1_IRQ_PRIORITY 10
233 #define STM32_SPI_SPI2_IRQ_PRIORITY 10
234 #define STM32_SPI_SPI3_IRQ_PRIORITY 10
235 #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
236 
237 /*
238  * ST driver system settings.
239  */
240 #define STM32_ST_IRQ_PRIORITY 8
241 #define STM32_ST_USE_TIMER 2
242 
243 /*
244  * UART driver system settings.
245  */
246 #define STM32_UART_USE_USART1 TRUE
247 #define STM32_UART_USE_USART2 TRUE
248 #define STM32_UART_USE_USART3 FALSE
249 #define STM32_UART_USART1_IRQ_PRIORITY 12
250 #define STM32_UART_USART2_IRQ_PRIORITY 12
251 #define STM32_UART_USART3_IRQ_PRIORITY 12
252 #define STM32_UART_USART1_DMA_PRIORITY 0
253 #define STM32_UART_USART2_DMA_PRIORITY 0
254 #define STM32_UART_USART3_DMA_PRIORITY 0
255 #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
256 
257 /*
258  * USB driver system settings.
259  */
260 #define STM32_USB_USE_USB1 FALSE
261 #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
262 #define STM32_USB_USB1_HP_IRQ_PRIORITY 13
263 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14
264 
265 /*
266  * WDG driver system settings.
267  */
268 #define STM32_WDG_USE_IWDG FALSE
269 
270 #endif /* MCUCONF_H */