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mcuconf.h
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1 /*
2  ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
3 
4  Licensed under the Apache License, Version 2.0 (the "License");
5  you may not use this file except in compliance with the License.
6  You may obtain a copy of the License at
7 
8  http://www.apache.org/licenses/LICENSE-2.0
9 
10  Unless required by applicable law or agreed to in writing, software
11  distributed under the License is distributed on an "AS IS" BASIS,
12  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  See the License for the specific language governing permissions and
14  limitations under the License.
15 */
16 
17 /*
18  * STM32F4xx drivers configuration.
19  * The following settings override the default settings present in
20  * the various device driver implementation headers.
21  * Note that the settings for each driver only have effect if the whole
22  * driver is enabled in halconf.h.
23  *
24  * IRQ priorities:
25  * 15...0 Lowest...Highest.
26  *
27  * DMA priorities:
28  * 0...3 Lowest...Highest.
29  */
30 
31 #define STM32F4xx_MCUCONF
32 
33 /*
34  * HAL driver system settings.
35  */
36 #define STM32_NO_INIT FALSE
37 #define STM32_HSI_ENABLED TRUE
38 #define STM32_LSI_ENABLED TRUE
39 #define STM32_HSE_ENABLED TRUE
40 #define STM32_LSE_ENABLED FALSE
41 #define STM32_CLOCK48_REQUIRED TRUE
42 #define STM32_SW STM32_SW_PLL
43 #define STM32_PLLSRC STM32_PLLSRC_HSE
44 #define STM32_PLLM_VALUE 25
45 #define STM32_PLLN_VALUE 432
46 #define STM32_PLLP_VALUE 4
47 #define STM32_PLLQ_VALUE 9
48 #define STM32_HPRE STM32_HPRE_DIV1
49 #define STM32_PPRE1 STM32_PPRE1_DIV4
50 #define STM32_PPRE2 STM32_PPRE2_DIV2
51 #define STM32_RTCSEL STM32_RTCSEL_LSI
52 #define STM32_RTCPRE_VALUE 8
53 #define STM32_MCO1SEL STM32_MCO1SEL_HSI
54 #define STM32_MCO1PRE STM32_MCO1PRE_DIV1
55 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
56 #define STM32_MCO2PRE STM32_MCO2PRE_DIV5
57 #define STM32_I2SSRC STM32_I2SSRC_CKIN
58 #define STM32_PLLI2SN_VALUE 192
59 #define STM32_PLLI2SR_VALUE 5
60 #define STM32_PVD_ENABLE FALSE
61 #define STM32_PLS STM32_PLS_LEV0
62 
63 /*
64  * ADC driver system settings.
65  */
66 #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
67 #define STM32_ADC_USE_ADC1 TRUE
68 #define STM32_ADC_USE_ADC2 FALSE
69 #define STM32_ADC_USE_ADC3 FALSE
70 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
71 #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
72 #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
73 #define STM32_ADC_ADC1_DMA_PRIORITY 2
74 #define STM32_ADC_ADC2_DMA_PRIORITY 2
75 #define STM32_ADC_ADC3_DMA_PRIORITY 2
76 #define STM32_ADC_IRQ_PRIORITY 6
77 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
78 #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6
79 #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6
80 
81 /*
82  * CAN driver system settings.
83  */
84 #if USE_CAN1
85 #define STM32_CAN_USE_CAN1 TRUE
86 #else
87 #define STM32_CAN_USE_CAN1 FALSE
88 #endif
89 #if USE_CAN2
90 #define STM32_CAN_USE_CAN2 TRUE
91 #else
92 #define STM32_CAN_USE_CAN2 FALSE
93 #endif
94 #define STM32_CAN_CAN1_IRQ_PRIORITY 11
95 #define STM32_CAN_CAN2_IRQ_PRIORITY 11
96 
97 /*
98  * DAC driver system settings.
99  */
100 #define STM32_DAC_DUAL_MODE FALSE
101 #if USE_DAC1
102 #define STM32_DAC_USE_DAC1_CH1 TRUE
103 #else
104 #define STM32_DAC_USE_DAC1_CH1 FALSE
105 #endif
106 #if USE_DAC2
107 #define STM32_DAC_USE_DAC1_CH2 TRUE
108 #else
109 #define STM32_DAC_USE_DAC1_CH2 FALSE
110 #endif
111 #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
112 #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
113 #define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
114 #define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
115 #define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
116 #define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
117 
118 /*
119  * EXT driver system settings.
120  */
121 #define STM32_EXT_EXTI0_IRQ_PRIORITY 6
122 #define STM32_EXT_EXTI1_IRQ_PRIORITY 6
123 #define STM32_EXT_EXTI2_IRQ_PRIORITY 6
124 #define STM32_EXT_EXTI3_IRQ_PRIORITY 6
125 #define STM32_EXT_EXTI4_IRQ_PRIORITY 6
126 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
127 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
128 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6
129 #define STM32_EXT_EXTI17_IRQ_PRIORITY 15
130 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6
131 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6
132 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6
133 #define STM32_EXT_EXTI21_IRQ_PRIORITY 15
134 #define STM32_EXT_EXTI22_IRQ_PRIORITY 15
135 
136 /*
137  * GPT driver system settings.
138  */
139 #define STM32_GPT_USE_TIM1 FALSE
140 #define STM32_GPT_USE_TIM2 FALSE
141 #define STM32_GPT_USE_TIM3 FALSE
142 #define STM32_GPT_USE_TIM4 FALSE
143 #define STM32_GPT_USE_TIM5 FALSE
144 #define STM32_GPT_USE_TIM6 FALSE
145 #define STM32_GPT_USE_TIM7 FALSE
146 #define STM32_GPT_USE_TIM8 FALSE
147 #define STM32_GPT_USE_TIM9 FALSE
148 #define STM32_GPT_USE_TIM11 FALSE
149 #define STM32_GPT_USE_TIM12 FALSE
150 #define STM32_GPT_USE_TIM14 FALSE
151 #define STM32_GPT_TIM1_IRQ_PRIORITY 7
152 #define STM32_GPT_TIM2_IRQ_PRIORITY 7
153 #define STM32_GPT_TIM3_IRQ_PRIORITY 7
154 #define STM32_GPT_TIM4_IRQ_PRIORITY 7
155 #define STM32_GPT_TIM5_IRQ_PRIORITY 7
156 #define STM32_GPT_TIM6_IRQ_PRIORITY 7
157 #define STM32_GPT_TIM7_IRQ_PRIORITY 7
158 #define STM32_GPT_TIM8_IRQ_PRIORITY 7
159 #define STM32_GPT_TIM9_IRQ_PRIORITY 7
160 #define STM32_GPT_TIM11_IRQ_PRIORITY 7
161 #define STM32_GPT_TIM12_IRQ_PRIORITY 7
162 #define STM32_GPT_TIM14_IRQ_PRIORITY 7
163 
164 /*
165  * I2C driver system settings.
166  */
167 #if USE_I2C1
168 #define STM32_I2C_USE_I2C1 TRUE
169 #else
170 #define STM32_I2C_USE_I2C1 FALSE
171 #endif
172 #if USE_I2C2
173 #define STM32_I2C_USE_I2C2 TRUE
174 #else
175 #define STM32_I2C_USE_I2C2 FALSE
176 #endif
177 #if USE_I2C3
178 #define STM32_I2C_USE_I2C3 TRUE
179 #else
180 #define STM32_I2C_USE_I2C3 FALSE
181 #endif
182 #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
183 #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
184 #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
185 #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
186 #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
187 #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
188 #define STM32_I2C_I2C1_IRQ_PRIORITY 5
189 #define STM32_I2C_I2C2_IRQ_PRIORITY 5
190 #define STM32_I2C_I2C3_IRQ_PRIORITY 5
191 #define STM32_I2C_I2C1_DMA_PRIORITY 3
192 #define STM32_I2C_I2C2_DMA_PRIORITY 3
193 #define STM32_I2C_I2C3_DMA_PRIORITY 3
194 #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
195 
196 /*
197  * ICU driver system settings.
198  */
199 #define STM32_ICU_USE_TIM1 TRUE
200 #define STM32_ICU_USE_TIM2 FALSE
201 #define STM32_ICU_USE_TIM3 FALSE
202 #define STM32_ICU_USE_TIM4 FALSE
203 #define STM32_ICU_USE_TIM5 FALSE
204 #define STM32_ICU_USE_TIM8 FALSE
205 #define STM32_ICU_USE_TIM9 FALSE
206 #define STM32_ICU_TIM1_IRQ_PRIORITY 7
207 #define STM32_ICU_TIM2_IRQ_PRIORITY 7
208 #define STM32_ICU_TIM3_IRQ_PRIORITY 7
209 #define STM32_ICU_TIM4_IRQ_PRIORITY 7
210 #define STM32_ICU_TIM5_IRQ_PRIORITY 7
211 #define STM32_ICU_TIM8_IRQ_PRIORITY 7
212 #define STM32_ICU_TIM9_IRQ_PRIORITY 7
213 
214 /*
215  * MAC driver system settings.
216  */
217 #define STM32_MAC_TRANSMIT_BUFFERS 2
218 #define STM32_MAC_RECEIVE_BUFFERS 4
219 #define STM32_MAC_BUFFERS_SIZE 1522
220 #define STM32_MAC_PHY_TIMEOUT 100
221 #define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE
222 #define STM32_MAC_ETH1_IRQ_PRIORITY 13
223 #define STM32_MAC_IP_CHECKSUM_OFFLOAD 0
224 
225 /*
226  * PWM driver system settings.
227  */
228 #define STM32_PWM_USE_ADVANCED FALSE
229 #define STM32_PWM_USE_TIM1 FALSE
230 #define STM32_PWM_USE_TIM2 FALSE
231 #define STM32_PWM_USE_TIM3 TRUE
232 #define STM32_PWM_USE_TIM4 FALSE
233 #define STM32_PWM_USE_TIM5 TRUE
234 #define STM32_PWM_USE_TIM8 FALSE
235 #define STM32_PWM_USE_TIM9 FALSE
236 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
237 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
238 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
239 #define STM32_PWM_TIM4_IRQ_PRIORITY 7
240 #define STM32_PWM_TIM5_IRQ_PRIORITY 7
241 #define STM32_PWM_TIM8_IRQ_PRIORITY 7
242 #define STM32_PWM_TIM9_IRQ_PRIORITY 7
243 
244 /*
245  * SERIAL driver system settings.
246  */
247 #if USE_UART1
248 #define STM32_SERIAL_USE_USART1 TRUE
249 #else
250 #define STM32_SERIAL_USE_USART1 FALSE
251 #endif
252 #if USE_UART2
253 #define STM32_SERIAL_USE_USART2 TRUE
254 #else
255 #define STM32_SERIAL_USE_USART2 FALSE
256 #endif
257 #if USE_UART3
258 #define STM32_SERIAL_USE_USART3 TRUE
259 #else
260 #define STM32_SERIAL_USE_USART3 FALSE
261 #endif
262 #if USE_UART4
263 #define STM32_SERIAL_USE_UART4 TRUE
264 #else
265 #define STM32_SERIAL_USE_UART4 FALSE
266 #endif
267 #if USE_UART5
268 #define STM32_SERIAL_USE_UART5 TRUE
269 #else
270 #define STM32_SERIAL_USE_UART5 FALSE
271 #endif
272 #if USE_UART6
273 #define STM32_SERIAL_USE_USART6 TRUE
274 #else
275 #define STM32_SERIAL_USE_USART6 FALSE
276 #endif
277 #define STM32_SERIAL_USART1_PRIORITY 12
278 #define STM32_SERIAL_USART2_PRIORITY 12
279 #define STM32_SERIAL_USART3_PRIORITY 12
280 #define STM32_SERIAL_UART4_PRIORITY 12
281 #define STM32_SERIAL_UART5_PRIORITY 15
282 #define STM32_SERIAL_USART6_PRIORITY 12
283 
284 /*
285  * SPI driver system settings.
286  */
287 #if USE_SPI1
288 #define STM32_SPI_USE_SPI1 TRUE
289 #else
290 #define STM32_SPI_USE_SPI1 FALSE
291 #endif
292 #if USE_SPI2
293 #define STM32_SPI_USE_SPI2 TRUE
294 #else
295 #define STM32_SPI_USE_SPI2 FALSE
296 #endif
297 #if USE_SPI3
298 #define STM32_SPI_USE_SPI3 TRUE
299 #else
300 #define STM32_SPI_USE_SPI3 FALSE
301 #endif
302 #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
303 #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
304 #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
305 #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
306 #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
307 #define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
308 #define STM32_SPI_SPI1_DMA_PRIORITY 1
309 #define STM32_SPI_SPI2_DMA_PRIORITY 1
310 #define STM32_SPI_SPI3_DMA_PRIORITY 1
311 #define STM32_SPI_SPI1_IRQ_PRIORITY 10
312 #define STM32_SPI_SPI2_IRQ_PRIORITY 10
313 #define STM32_SPI_SPI3_IRQ_PRIORITY 10
314 #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
315 
316 
317 /*
318  * UART driver system settings.
319  */
320 #if USE_UARTD1
321 #define STM32_UART_USE_USART1 TRUE
322 #else
323 #define STM32_UART_USE_USART1 FALSE
324 #endif
325 #if USE_UARTD2
326 #define STM32_UART_USE_USART2 TRUE
327 #else
328 #define STM32_UART_USE_USART2 FALSE
329 #endif
330 #if USE_UARTD3
331 #define STM32_UART_USE_USART3 TRUE
332 #else
333 #define STM32_UART_USE_USART3 FALSE
334 #endif
335 #if USE_UARTD6
336 #define STM32_UART_USE_USART6 TRUE
337 #else
338 #define STM32_UART_USE_USART6 FALSE
339 #endif
340 #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
341 #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
342 #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
343 #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
344 #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
345 #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
346 #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
347 #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
348 #define STM32_UART_USART1_IRQ_PRIORITY 7
349 #define STM32_UART_USART2_IRQ_PRIORITY 6
350 #define STM32_UART_USART3_IRQ_PRIORITY 12
351 #define STM32_UART_USART6_IRQ_PRIORITY 13
352 #define STM32_UART_USART1_DMA_PRIORITY 0
353 #define STM32_UART_USART2_DMA_PRIORITY 0
354 #define STM32_UART_USART3_DMA_PRIORITY 0
355 #define STM32_UART_USART6_DMA_PRIORITY 0
356 #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
357 
358 /*
359  * USB driver system settings.
360  */
361 #if USE_USB_SERIAL
362 #define STM32_USB_USE_OTG1 TRUE
363 #else
364 #define STM32_USB_USE_OTG1 FALSE
365 #endif
366 #define STM32_USB_USE_OTG2 FALSE
367 #define STM32_USB_OTG1_IRQ_PRIORITY 14
368 #define STM32_USB_OTG2_IRQ_PRIORITY 14
369 #define STM32_USB_OTG1_RX_FIFO_SIZE 512
370 #define STM32_USB_OTG2_RX_FIFO_SIZE 1024
371 #define STM32_USB_OTG_THREAD_PRIO LOWPRIO
372 #define STM32_USB_OTG_THREAD_STACK_SIZE 128
373 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0
374