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mcuconf.h
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1 /*
2  ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3 
4  Licensed under the Apache License, Version 2.0 (the "License");
5  you may not use this file except in compliance with the License.
6  You may obtain a copy of the License at
7 
8  http://www.apache.org/licenses/LICENSE-2.0
9 
10  Unless required by applicable law or agreed to in writing, software
11  distributed under the License is distributed on an "AS IS" BASIS,
12  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  See the License for the specific language governing permissions and
14  limitations under the License.
15 */
16 
17 #ifndef MCUCONF_H
18 #define MCUCONF_H
19 
20 /*
21  * STM32F3xx drivers configuration.
22  * The following settings override the default settings present in
23  * the various device driver implementation headers.
24  * Note that the settings for each driver only have effect if the whole
25  * driver is enabled in halconf.h.
26  *
27  * IRQ priorities:
28  * 15...0 Lowest...Highest.
29  *
30  * DMA priorities:
31  * 0...3 Lowest...Highest.
32  */
33 
34 #define STM32F3xx_MCUCONF
35 
36 /*
37  * HAL driver system settings.
38  */
39 #define STM32_NO_INIT FALSE
40 #define STM32_PVD_ENABLE FALSE
41 #define STM32_PLS STM32_PLS_LEV0
42 #define STM32_HSI_ENABLED TRUE
43 #define STM32_LSI_ENABLED TRUE
44 #define STM32_HSE_ENABLED TRUE
45 #define STM32_LSE_ENABLED FALSE
46 #define STM32_SW STM32_SW_PLL
47 #define STM32_PLLSRC STM32_PLLSRC_HSE
48 #define STM32_PREDIV_VALUE 1
49 #define STM32_PLLMUL_VALUE 9
50 #define STM32_HPRE STM32_HPRE_DIV1
51 #define STM32_PPRE1 STM32_PPRE1_DIV2
52 #define STM32_PPRE2 STM32_PPRE2_DIV2
53 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
54 #define STM32_ADC12PRES STM32_ADC12PRES_DIV1
55 #define STM32_ADC34PRES STM32_ADC34PRES_DIV1
56 #define STM32_USART1SW STM32_USART1SW_PCLK
57 #define STM32_USART2SW STM32_USART2SW_PCLK
58 #define STM32_USART3SW STM32_USART3SW_PCLK
59 #define STM32_UART4SW STM32_UART4SW_PCLK
60 #define STM32_UART5SW STM32_UART5SW_PCLK
61 #define STM32_I2C1SW STM32_I2C1SW_SYSCLK
62 #define STM32_I2C2SW STM32_I2C2SW_SYSCLK
63 #define STM32_TIM1SW STM32_TIM1SW_PCLK2
64 #define STM32_TIM8SW STM32_TIM8SW_PCLK2
65 #define STM32_RTCSEL STM32_RTCSEL_LSI
66 #define STM32_USB_CLOCK_REQUIRED TRUE
67 #define STM32_USBPRE STM32_USBPRE_DIV1P5
68 
69 /*
70  * ADC driver system settings.
71  */
72 #define STM32_ADC_DUAL_MODE FALSE
73 #define STM32_ADC_COMPACT_SAMPLES FALSE
74 #define STM32_ADC_USE_ADC1 TRUE
75 #define STM32_ADC_USE_ADC2 FALSE
76 #define STM32_ADC_USE_ADC3 FALSE
77 #define STM32_ADC_USE_ADC4 FALSE
78 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
79 #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
80 #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
81 #define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
82 #define STM32_ADC_ADC1_DMA_PRIORITY 2
83 #define STM32_ADC_ADC2_DMA_PRIORITY 2
84 #define STM32_ADC_ADC3_DMA_PRIORITY 2
85 #define STM32_ADC_ADC4_DMA_PRIORITY 2
86 #define STM32_ADC_ADC12_IRQ_PRIORITY 5
87 #define STM32_ADC_ADC3_IRQ_PRIORITY 5
88 #define STM32_ADC_ADC4_IRQ_PRIORITY 5
89 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
90 #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
91 #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
92 #define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5
93 #define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
94 #define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
95 
96 /*
97  * CAN driver system settings.
98  */
99 #if USE_CAN1
100 #define STM32_CAN_USE_CAN1 TRUE
101 #else
102 #define STM32_CAN_USE_CAN1 FALSE
103 #endif
104 #define STM32_CAN_CAN1_IRQ_PRIORITY 11
105 
106 /*
107  * DAC driver system settings.
108  */
109 #define STM32_DAC_DUAL_MODE FALSE
110 #define STM32_DAC_USE_DAC1_CH1 TRUE
111 #define STM32_DAC_USE_DAC1_CH2 TRUE
112 #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
113 #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
114 #define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
115 #define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
116 
117 /*
118  * EXT driver system settings.
119  */
120 #define STM32_EXT_EXTI0_IRQ_PRIORITY 6
121 #define STM32_EXT_EXTI1_IRQ_PRIORITY 6
122 #define STM32_EXT_EXTI2_IRQ_PRIORITY 6
123 #define STM32_EXT_EXTI3_IRQ_PRIORITY 6
124 #define STM32_EXT_EXTI4_IRQ_PRIORITY 6
125 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
126 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
127 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6
128 #define STM32_EXT_EXTI17_IRQ_PRIORITY 6
129 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6
130 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6
131 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6
132 #define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6
133 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6
134 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6
135 
136 /*
137  * GPT driver system settings.
138  */
139 #define STM32_GPT_USE_TIM1 FALSE
140 #define STM32_GPT_USE_TIM2 FALSE
141 #define STM32_GPT_USE_TIM3 FALSE
142 #define STM32_GPT_USE_TIM4 FALSE
143 #define STM32_GPT_USE_TIM6 FALSE
144 #define STM32_GPT_USE_TIM7 FALSE
145 #define STM32_GPT_USE_TIM8 FALSE
146 #define STM32_GPT_TIM1_IRQ_PRIORITY 7
147 #define STM32_GPT_TIM2_IRQ_PRIORITY 7
148 #define STM32_GPT_TIM3_IRQ_PRIORITY 7
149 #define STM32_GPT_TIM4_IRQ_PRIORITY 7
150 #define STM32_GPT_TIM6_IRQ_PRIORITY 7
151 #define STM32_GPT_TIM7_IRQ_PRIORITY 7
152 #define STM32_GPT_TIM8_IRQ_PRIORITY 7
153 
154 /*
155  * I2C driver system settings.
156  */
157 #if USE_I2C1
158 #define STM32_I2C_USE_I2C1 TRUE
159 #else
160 #define STM32_I2C_USE_I2C1 FALSE
161 #endif
162 #if USE_I2C2
163 #define STM32_I2C_USE_I2C2 TRUE
164 #else
165 #define STM32_I2C_USE_I2C2 FALSE
166 #endif
167 #define STM32_I2C_BUSY_TIMEOUT 50
168 #define STM32_I2C_I2C1_IRQ_PRIORITY 10
169 #define STM32_I2C_I2C2_IRQ_PRIORITY 10
170 #define STM32_I2C_USE_DMA TRUE
171 #define STM32_I2C_I2C1_DMA_PRIORITY 1
172 #define STM32_I2C_I2C2_DMA_PRIORITY 1
173 #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
174 
175 /*
176  * ICU driver system settings.
177  */
178 #define STM32_ICU_USE_TIM1 FALSE
179 #define STM32_ICU_USE_TIM2 FALSE
180 #define STM32_ICU_USE_TIM3 FALSE
181 #define STM32_ICU_USE_TIM4 FALSE
182 #define STM32_ICU_USE_TIM8 FALSE
183 #define STM32_ICU_TIM1_IRQ_PRIORITY 7
184 #define STM32_ICU_TIM2_IRQ_PRIORITY 7
185 #define STM32_ICU_TIM3_IRQ_PRIORITY 7
186 #define STM32_ICU_TIM4_IRQ_PRIORITY 7
187 #define STM32_ICU_TIM8_IRQ_PRIORITY 7
188 
189 /*
190  * PWM driver system settings.
191  */
192 #define STM32_PWM_USE_ADVANCED FALSE
193 #define STM32_PWM_USE_TIM1 FALSE
194 #ifndef STM32_PWM_USE_TIM2
195 #define STM32_PWM_USE_TIM2 TRUE
196 #endif
197 #ifndef STM32_PWM_USE_TIM3
198 #define STM32_PWM_USE_TIM3 TRUE
199 #endif
200 #define STM32_PWM_USE_TIM4 FALSE
201 #define STM32_PWM_USE_TIM8 FALSE
202 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
203 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
204 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
205 #define STM32_PWM_TIM4_IRQ_PRIORITY 7
206 #define STM32_PWM_TIM8_IRQ_PRIORITY 7
207 
208 /*
209  * SERIAL driver system settings.
210  */
211 #if USE_UART1
212 #define STM32_SERIAL_USE_USART1 TRUE
213 #else
214 #define STM32_SERIAL_USE_USART1 FALSE
215 #endif
216 #if USE_UART2
217 #define STM32_SERIAL_USE_USART2 TRUE
218 #else
219 #define STM32_SERIAL_USE_USART2 FALSE
220 #endif
221 #if USE_UART3
222 #define STM32_SERIAL_USE_USART3 TRUE
223 #else
224 #define STM32_SERIAL_USE_USART3 FALSE
225 #endif
226 #if USE_UART4
227 #define STM32_SERIAL_USE_UART4 TRUE
228 #else
229 #define STM32_SERIAL_USE_UART4 FALSE
230 #endif
231 #if USE_UART5
232 #define STM32_SERIAL_USE_UART5 TRUE
233 #else
234 #define STM32_SERIAL_USE_UART5 FALSE
235 #endif
236 #define STM32_SERIAL_USART1_PRIORITY 12
237 #define STM32_SERIAL_USART2_PRIORITY 12
238 #define STM32_SERIAL_USART3_PRIORITY 12
239 #define STM32_SERIAL_UART4_PRIORITY 12
240 #define STM32_SERIAL_UART5_PRIORITY 12
241 
242 /*
243  * SPI driver system settings.
244  */
245 #if USE_SPI1
246 #define STM32_SPI_USE_SPI1 TRUE
247 #else
248 #define STM32_SPI_USE_SPI1 FALSE
249 #endif
250 #if USE_SPI2
251 #define STM32_SPI_USE_SPI2 TRUE
252 #else
253 #define STM32_SPI_USE_SPI2 FALSE
254 #endif
255 #if USE_SPI3
256 #define STM32_SPI_USE_SPI3 TRUE
257 #else
258 #define STM32_SPI_USE_SPI3 FALSE
259 #endif
260 #define STM32_SPI_SPI1_DMA_PRIORITY 1
261 #define STM32_SPI_SPI2_DMA_PRIORITY 1
262 #define STM32_SPI_SPI3_DMA_PRIORITY 1
263 #define STM32_SPI_SPI1_IRQ_PRIORITY 10
264 #define STM32_SPI_SPI2_IRQ_PRIORITY 10
265 #define STM32_SPI_SPI3_IRQ_PRIORITY 10
266 #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
267 
268 /*
269  * ST driver system settings.
270  */
271 #define STM32_ST_IRQ_PRIORITY 8
272 #define STM32_ST_USE_TIMER 2
273 
274 /*
275  * UART driver system settings.
276  */
277 #define STM32_UART_USE_USART1 FALSE
278 #define STM32_UART_USE_USART2 FALSE
279 #define STM32_UART_USE_USART3 FALSE
280 #define STM32_UART_USART1_IRQ_PRIORITY 12
281 #define STM32_UART_USART2_IRQ_PRIORITY 12
282 #define STM32_UART_USART3_IRQ_PRIORITY 12
283 #define STM32_UART_USART1_DMA_PRIORITY 0
284 #define STM32_UART_USART2_DMA_PRIORITY 0
285 #define STM32_UART_USART3_DMA_PRIORITY 0
286 #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
287 
288 /*
289  * USB driver system settings.
290  */
291 #define STM32_USB_USE_USB1 TRUE
292 #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
293 #define STM32_USB_USB1_HP_IRQ_PRIORITY 13
294 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14
295 
296 /*
297  * WDG driver system settings.
298  */
299 #define STM32_WDG_USE_IWDG FALSE
300 
301 #endif /* MCUCONF_H */